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  Subjects -> ELECTRONICS (Total: 207 journals)
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IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
Number of Followers: 3  
 
  Hybrid Journal Hybrid journal (It can contain Open Access articles)
ISSN (Online) 2329-9231
Published by IEEE Homepage  [228 journals]
  • Voltage-Controlled Domain Wall Motion-Based Neuron and Stochastic Magnetic
           Tunnel Junction Synapse for Neuromorphic Computing Applications

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      Authors: Aijaz H. Lone;S. Amara;H. Fariborzi;
      Pages: 1 - 9
      Abstract: This work discusses the proposal of a spintronic neuromorphic system with spin orbit torque-driven domain wall motion (DWM)-based neurons and synapses. We propose a voltage-controlled magnetic anisotropy DWM-based magnetic tunnel junction (MTJ) neuron. We investigate how the electric field at the gate (pinning site), generated by the voltage signals from pre-neurons, modulates the DWM, which reflects in the nonlinear switching behavior of neuron magnetization. For the implementation of synaptic weights, we propose a 3-terminal MTJ with stochastic DWM in the free layer. We incorporate intrinsic pinning effects by creating triangular notches on the sides of the free layer. The pinning of the domain wall and intrinsic thermal noise of the device lead to the stochastic behavior of DWM. The control of this stochasticity by the spin orbit torque is shown to realize the potentiation and depression of the synaptic weight. The micromagnetics and spin transport studies in synapses and neurons are carried out by developing a coupled micromagnetic non-equilibrium Green’s function (MuMag-NEGF) model. The minimization of the writing current pulsewidth by leveraging the thermal noise and demagnetization energy is also presented. Finally, we discuss the implementation of digit recognition by the proposed system using a spike time-dependent algorithm.
      PubDate: June 2022
      Issue No: Vol. 8, No. 1 (2022)
       
  • Physics-Based Models for Magneto-Electric Spin-Orbit Logic Circuits

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      Authors: Hai Li;Dmitri E. Nikonov;Chia-Ching Lin;Kerem Camsari;Yu-Ching Liao;Chia-Sheng Hsu;Azad Naeemi;Ian A. Young;
      Pages: 10 - 18
      Abstract: Spintronic devices provide a promising beyond-complementary metal-oxide-semiconductor (CMOS) device option, thanks to their energy efficiency and compatibility with CMOS. To accurately capture their multiphysics dynamics, a rigorous treatment of both spin and charge and their inter-conversion is required. Here, we present physics-based device models based on $4times4$ matrices for the spin-orbit coupling (SOC) part of the magneto-electric spin-orbit (MESO) device. Also, a more rigorous physics model of ferroelectric and magnetoelectric (ME) switching of ferromagnets, based on Landau–Lifshitz–Gilbert (LLG) and Landau–Khalatnikov (LK) equations, are presented. With the combined model implemented in a SPICE circuit simulator environment, simulation results were obtained which show feasibility of the MESO implementation and the functional operation of buffers, synchronous oscillators, and majority gates.
      PubDate: June 2022
      Issue No: Vol. 8, No. 1 (2022)
       
  • A FeFET-Based Hybrid Memory Accessible by Content and by Address

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      Authors: Cédric Marchand;Ian O’Connor;Mayeul Cantan;Evelyn T. Breyer;Stefan Slesazeck;Thomas Mikolajick;
      Pages: 19 - 26
      Abstract: Emerging nonvolatile memory technologies are attracting interest from the system design level to implement alternatives to conventional von-Neumann computing architectures. In particular, the hafnium oxide-based ferroelectric (FE) memory technology is fully CMOS-compatible and has already been used for logic-in-memory architectures or compact ternary content addressable memory (TCAM) cells. These enable the tight combination of different functionalities in the same circuit to reduce implementation area and energy consumption. In this article, we propose a new hybrid memory circuit that combines TCAM and normal memory capability: the Ternary Content addressable and MEMory (TC-MEM). A 1-bit TC-MEM circuit is proposed and discussed in detail, both as a concept and through its implementation in a 28-nm ferroelectric field-effect transistor (FeFET) technology. Measurement results demonstrate the circuit functionality. We also discuss how to scale it to multibit circuits, as well as its use both as a TCAM and as a normal memory allowing the implementation of reversible functions using one memory table instead of two memory tables, and in-memory-computing concepts.
      PubDate: June 2022
      Issue No: Vol. 8, No. 1 (2022)
       
  • An Algorithm-Hardware Co-Design for Bayesian Neural Network Utilizing
           SOT-MRAM’s Inherent Stochasticity

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      Authors: Anni Lu;Yandong Luo;Shimeng Yu;
      Pages: 27 - 34
      Abstract: Probabilistic machine learning plays a central role in the domains such as decision-making and autonomous control benefitting from its ability of representing and manipulating uncertainty about models and predictions. Until now, there are few hardware considerations to address the intensive computation and true random number generation for Bayesian neural network (BayesNN), whose weights are represented by probability distributions. In this article, we propose to apply the local reparameterization trick to alleviate the burden of random number generators (RNGs), which could be implemented by utilizing the inherent random noise of spin-orbit torque magnetic random access memory (SOT-MRAM). Sampling strategies are discussed to significantly reduce the number of operations and parameters of BayesNN. A device-circuit-system benchmark framework is then developed to evaluate the effects of device nonidealities such as the bias and variation of switching probability. The evaluation on the CIFAR-10 dataset suggests that BayesNN could achieve comparable accuracy as conventional deep neural network (DNN) with acceptable hardware overhead but provide much better uncertainty calibration with respect to out-of-distribution (OOD) inputs (rotated images as the example).
      PubDate: June 2022
      Issue No: Vol. 8, No. 1 (2022)
       
 
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