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  Subjects -> ELECTRONICS (Total: 207 journals)
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Universal Journal of Electrical and Electronic Engineering
Number of Followers: 7  

  This is an Open Access Journal Open Access journal
ISSN (Print) 2332-3280 - ISSN (Online) 2332-3299
Published by Horizon Research Publishing Homepage  [51 journals]
  • Wavelet-PCA Based Denoising of Partial Discharge Signals

    • Abstract: Publication date:  Sep 2023
      Source:Universal Journal of Electrical and Electronic Engineering  Volume  10  Number  3  Ephraim T. Iorkyase   Partial Discharge measurements contain valuable information about the state of the insulation system that is useful for the diagnosis of electrical equipment. Signals that result from on-site PD measurement are often completely buried in noise. One critical task for PD analysis and diagnosis is the recovery of clean PD signals from heavily contaminated measurements. Removing noise from PD measurement remains a serious challenge because the majority of the noise encountered during on-site measurement has similar time and frequency characteristics to the desired PD signals. This paper presents a sophisticated technique for denoising PD measurement. More specifically, we propose to combine Wavelet Transform (WT) and Principal Component Analysis (PCA) to recover PD signals buried in excessive noise. The first phase is based on multi-resolution signal decomposition via wavelet. In the second phase, the coefficients that result from signal decomposition are filtered using PCA to retain the most informative signal characteristics of the measured PD signal. PCA automatically discards the uncorrelated noise that remains in the wavelet coefficients. An assessment of the proposed denoising technique is carried out, by processing experimental PD data. The results indicate that the proposed technique not only suppresses all kinds of noise present but also effectively preserves the features of the PD signals.
      PubDate: Sep 2023
  • Evaluating the Effect of Real-Time Communication Errors on Remote Servo
           DC-Motor Control Performance

    • Abstract: Publication date:  Mar 2023
      Source:Universal Journal of Electrical and Electronic Engineering  Volume  10  Number  1  Ahmed Abdolkhalig   This paper presents a review and performance evaluation of a DC-servomotor control loop that is set up based on three different types of real-time-based communications. The aim is to illustrate the effectiveness of communication errors such as sample loss, network latency, and bandwidth on the controlled signal and how the transient response may degrade according to such errors. The control performance is evaluated for three types of communication in a local area network, which are CAN, Ethernet, and switched Ethernet. The loop of the control process is simulated by using a MATLAB/Simulink® based simulator for real-time control systems. The closed-loop control system of the DC- servomotor is realized with the help of a discrete-time proportional differential controller. As a result of doing this, a threshold can be found which outlines the limits of the real-time-based communication network in which the performance of the DC-servomotor remains stable. Through a detailed discussion, the type of networked control method that can be used for improving the quality of performance is recommended. The performance is judged through the comparison of process response plots side-by-side and makes denotative statements about which real-time-based communication can give a better result based on peak overshoot ratio and settling time.
      PubDate: Mar 2023
  • Impact of Virtual Channel, Subnets and Routing Algorithm Effects on WiNoC

    • Abstract: Publication date:  Jun 2023
      Source:Universal Journal of Electrical and Electronic Engineering  Volume  10  Number  2  Ayodeji Ireti Fasiku   Oluwaseyi Olawale Bello   Abiodun Dare Kehinde   and Adewale Abe   The Network-on-Chip (NoC) paradigm is a communication network that is used on a chip to facilitate parallel interaction among all cores, thereby enhancing inter-core performance. However, the NoC's ability to improve performance is hindered by high latency and energy dissipation resulting from multi-hop communication over long distances. To address this, Wireless Network-on-Chip (WiNoC) was introduced to improve the efficiency and performance of the system. The efficiency of the WiNoC architecture is dependent on a good choice of virtual channels (VC) allocation for organizing the cores into subnets. By reducing communication latency, adding a wireless router per subnet with a better routing algorithm helps to improve performance. This research examines impact of VC, subnet size, and routing algorithms in WiNoC by tuning the packet injection rate with three traffic distribution, network architectures of the 64, 256, and 1024 cores. Hence, this paper makes two major contributions: firstly, a detailed implementation of a NoC router in terms of VCs (2, 4, and 8), and secondly, a WiNoC with a parameterizable number of VCs along with four subnets (2, 4, 8 and 16). The study evaluates and compares the latency and throughput performance of the four routing algorithms and three traffic distribution patterns in terms of PIR using a cycle-accurate Noxim simulator based on system C. This study showed that virtual channels (VCs) significantly enhance energy consumption in network-on-chip (NoC) architectures, whereas energy consumption in WiNoC architectures is significantly decreased. However, the performance of WiNoC architecture had a noticeable effect by the choice of subnets and routing algorithms.
      PubDate: Jun 2023
  • Investigating the Impact of Communication Errors on the Transient
           Characteristics of Power Systems

    • Abstract: Publication date:  Jun 2023
      Source:Universal Journal of Electrical and Electronic Engineering  Volume  10  Number  2  Ahmed Abdolkhalig   As communication errors change in the dynamic properties of the protection relay and control system, the preset relay tripping time is no longer applicable. To ensure reliable operations and avoid any problem linked to grid stability, the impact of these errors on the transient characteristics of the power system must be investigated. To investigate the impact, a very simple and effective scheme based on an Ethernet communication network is proposed in this paper. The scheme relies on Inverse definite minimum time (IDMT) digital over-current relay which has two added functions, one is for phasor estimation and the other is for detecting the delays in tripping time. First, the IDMT over-current relay is fed by fundamental amplitude from the phasor estimator through an Ethernet-based network. Next, the delay that arises due to the insufficient allocation of bandwidth or noise is detected and measured by the detection function. Finally, to evaluate the impact of the communication errors on tripping time and consequently, on the transient characteristics of the power system, a test system consisting of a plant and two sources is simulated and analyzed using MATLAB software in combination with True-Time software. The results show that impact of these errors is dramatic and cannot be ignored especially when insufficient bandwidth is allocated.
      PubDate: Jun 2023
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