A  B  C  D  E  F  G  H  I  J  K  L  M  N  O  P  Q  R  S  T  U  V  W  X  Y  Z  

  Subjects -> ELECTRONICS (Total: 207 journals)
The end of the list has been reached or no journals were found for your choice.
Similar Journals
Journal Cover
IEEE Journal of Emerging and Selected Topics in Power Electronics
Journal Prestige (SJR): 1.657
Citation Impact (citeScore): 7
Number of Followers: 55  
 
  Hybrid Journal Hybrid journal (It can contain Open Access articles)
ISSN (Print) 2168-6777 - ISSN (Online) 2168-6785
Published by IEEE Homepage  [228 journals]
  • IEEE Journal of Emerging and Selected Topics in Power Electronics
           Publication Information

    • Free pre-print version: Loading...

      Abstract: Presents a listing of the editorial board, board of governors, current staff, committee members, and/or society editors for this issue of the publication.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • IEEE Industry Applications Society Information

    • Free pre-print version: Loading...

      Abstract: Presents a listing of the editorial board, board of governors, current staff, committee members, and/or society editors for this issue of the publication.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Guest Editorial Special Issue on Emerging Converter Topology, Operation,
           and Design Technologies

    • Free pre-print version: Loading...

      Authors: Yunwei Ryan Li;Fang Zheng Peng;
      Pages: 6411 - 6416
      Abstract: Power electronics play a key role in the transition to carbon neutrality. To enhance the performances of power electronics systems, new theories and methods are entering the field of power converter research, leading to increasing diversity of the knowledge database regarding converter design and operation methods. In addition to the conventional case-bycase design methodology, new automated and generalized converter design philosophies integrating topology derivation and synthesis methods, optimal pulse-width modulation (PWM), and advanced control strategies are gaining attention in both academia and industry. By implementing these methods, the converter design process can be greatly improved while the potentials of various power converters can be fully explored, leading to elevated converter performances.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • An Overview of Converter Topologies and Their Derivations and
           Interrelationships

    • Free pre-print version: Loading...

      Authors: Robson Bauwelz Gonzatti;Yuan Li;Mahshid Amirabadi;Brad Lehman;Fang Zheng Peng;
      Pages: 6417 - 6429
      Abstract: Canonical switching cell is known as the basic building block of dc-dc buck, boost, buck-boost, Ćuk converters, voltage/current source inverters (VSI/CSI) as well as multilevel converters (MLCs). This article reveals the existence of another basic switching cell as a singular structure of the canonical switching cell. The proposed new basic cell can constitute single-ended primary-inductor converter (SEPIC), Zeta converters, and Z-source converters. Each of the basic switching cells has the simplest form with two complementary switches, one inductor and one capacitor. An approach to construct a dc-dc converter by connecting source/load to the basic switching cells’ terminals is demonstrated. Some existing topologies of dc-dc converters are correlated following the proposed approach. Further, this article reviews Z-source/quasi-Z-source (qZS) converters, universal converters, and multiple-source converters to uncover some general approaches for topology manipulating. Z-source/qZS converters and the emerging classes of universal converters are used as examples to demonstrate the incorporation of their switches. Multiple source converters are fabricated by combining basic switching cells, in both the voltage source and current source form, using the duality principle. With the ever-increasing research efforts on converter topologies, it is hoped that this article will improve the understanding of the existing converter relationships and inspire insights for new topological developments and applications.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Synthesis of PWM Converters From Conversion Ratios Using Flux- or
           Charge-Balance Equations

    • Free pre-print version: Loading...

      Authors: Ramanuja Panigrahi;Santanu K. Mishra;Avinash Joshi;Khai D. T. Ngo;
      Pages: 6430 - 6443
      Abstract: To cater to the heterogeneity in emerging applications, researchers have constantly been driven to invent novel dc–dc converter topologies. A review of prior art in dc–dc converter synthesis methods shows that many converter choices are available for a given input and output specification. This article quantifies the number of these choices using the flux balance equation (FBE). As the number of state variables that can be used to derive the FBE is limited, it is possible to find out the total number of possible FBEs available for a given voltage conversion ratio. Once the FBEs are known, synthesizing a converter is carried out as an inverse problem. Three different strategies to solve this inverse problem of converter synthesis and some critical synthesis results are summarized in this article. The dual synthesis of current-fed topologies with given current conversion ratios based on the charge balance equation (CBE) is also demonstrated. Four novel topologies were synthesized to illustrate the effectiveness of the CBE-based synthesis method. The mathematical formulation of the CBE-based inverse problem and the quantification of complexities in solving it are also reported.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Nonisolated High Step-Up DC–DC Converter With Passive
           Switched-Inductor-Capacitor Network

    • Free pre-print version: Loading...

      Authors: Xiaoquan Zhu;Kaiwen Ye;Kang Liu;Bo Zhang;
      Pages: 6444 - 6456
      Abstract: In this article, a nonisolated dc–dc high step-up converter with passive switched-inductor-capacitor network is proposed, which is applicable for the required high-gain voltage low-power applications, such as battery-powered LED lighting systems and high-intensity mobile discharge lamps. The proposed circuit can produce higher gain voltage with small duty cycle, which decreases the voltage stress and conduction power loss on the active switches. In contrast to other nonisolated dc converters, by using the same or analogous number of passive/active components in circuit topology, the proposed topology has lower voltage stresses across capacitors and diodes and lower inductor current stresses. Therefore, the efficiency and reliability of the circuit topology can be ameliorated. The theoretical principle, parameter design guideline, small-signal dynamic analysis, power loss analysis, and performance comparison with other dc–dc nonisolated converters have been implemented. Finally, a 200-W experimental setup is built and tested with an input dc voltage of 36–60 V and an output voltage of 200 V to validate the aforementioned merits of the proposed circuit.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Nonisolated DC–DC Power Converter Synthesis Using Low-Entropy
           Equations

    • Free pre-print version: Loading...

      Authors: Thilina S. Ambagahawaththa;Dulika Nayanasiri;Ajith Pasqual;Yunwei Li;
      Pages: 6457 - 6469
      Abstract: There is a growing demand for novel nonisolated dc–dc power converters with the deployment of dc power distribution systems integrating renewable sources and energy storing elements. The load and source of these applications have different input and output voltage levels, and it is vital to avoid operating the interfacing power converters at extreme duty ratios. Therefore, engineers and researchers explore the power converter synthesizing techniques since the mid-1970s, fulfilling the above requirement besides the nonpulsating input and output current. Among them, the analytical synthesis method has gained popularity, although it gives rise to high-entropy equations. This article shows a simple yet powerful topology synthesis method based on the low-entropy equations that reveal the connection between the energy storing elements and switches. To this end, a set of design rules have been introduced in this article to realize the voltage-second balance equations obtained by decomposing the voltage gain polynomial using design-oriented analysis. Moreover, different decomposition levels of the gain polynomial have been discussed to embed inductors at either input or output or both ports. Furthermore, the synthesis of multitopology converters using low-entropy equations has been demonstrated. The applicability of the proposed method is validated using motivational examples and using experimental results of the selected converters.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Systematic Synthesis of Multiple-Input and Multiple-Output DC–DC
           Converters for Nonisolated Applications

    • Free pre-print version: Loading...

      Authors: Hao Zhang;Dachu Dong;Wei Liu;Han Ren;Feng Zheng;
      Pages: 6470 - 6481
      Abstract: Multiple-input converters (MICs) and multiple-output converters (MOCs) are attractive solutions for interfacing various voltage levels. In order to reveal the intrinsic relationships among the diverse topologies and provide as many viable topologies as possible for practical applications, this article aims to analyze the topology construction principles and propose a systematic approach to derive MICs and MOCs. To begin with, the general principle of the topology derivation is analyzed according to circuit network theory. Inspired by the idea of design controllable inductor power-flow loops (IPFLs), five construction types are proposed to create multiple power-flow network (MPN) in MICs and MOCs. Then, four basic switching cells for the topology synthesis are proposed and a flow diagram for the optimal design procedure is provided to guide the topology derivation. As one example, a family of viable and optimized MICs and MOCs with various characteristics is derived from typical Buck converter. Based on the analysis of the derived converters in continuous conduction mode (CCM) and discontinuous conduction mode (DCM), the number of magnetic components is not increased at all so that they are promising candidates for applications requiring compact size and high integration. Besides, topology comparison and selection among a family of MICs is also conducted in view of practical specifications. Finally, one derived dual-input converter is analyzed in detail and experimentally verified to demonstrate the theoretical results.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Model Development and Predictive Control of a Low-Inertia DC Solid-State
           Transformer (SST)

    • Free pre-print version: Loading...

      Authors: Sandro P. Martin;Xiaofeng Dong;Hui Li;
      Pages: 6482 - 6494
      Abstract: In this article, a dynamic model is developed for a low-inertia dc solid-state transformer (SST) formed by inductor-less modular multilevel converters (MMCs) based on phase-shifted square-wave modulation (PS-SWM). Unlike other SSTs, both power flow and circulating energy need to be controlled quickly and accurately to achieve high performance during both transients and steady state. The developed model explicitly defines the circulating energy and retains its accuracy with an arm inductor-less operation. Furthermore, the model can be treated as time-invariant under square-wave modulation and analyzed in the small-signal domain to obtain system transfer functions, allowing small-signal analysis. Based on the developed model, predictive control is designed to achieve fast dynamic control with reduced computational burden. In addition, a feedforward current control is proposed to suppress the steady-state current harmonics of the dc current caused by the enlarged circulating energy due to the low-inertia feature. A medium-voltage dc (MVDC) simulation case study and experimental results on downscaled low-inertia SST hardware are provided to validate the developed model and the predictive controller performance.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Analysis and Design of Zero-Voltage-Switching Multiphase AC/DC Converters

    • Free pre-print version: Loading...

      Authors: Jinyi Deng;Keyan Shi;Min Chen;Dehong Xu;
      Pages: 6495 - 6510
      Abstract: In this article, the generic analysis and design of zero-voltage-switching (ZVS) multiphase ac/dc converters are proposed. With the edge aligned pulsewidth modulation (PWM) (EA-PWM) scheme, all switches of ZVS multiphase ac/dc converters can realize ZVS operation. Besides, the switching frequency is fixed and the auxiliary switch only operates once in each switching period. Its operation stages in a switching cycle are analyzed and a generic ZVS condition is derived. Based on the proposed theory, a ZVS two-stage three-phase photovoltaic (PV) inverter is investigated, which is regarded as a five-phase converter. Its ZVS condition under different working conditions is discussed. Finally, a 10-kW prototype with 150 kHz switching frequency of the ZVS two-stage three-phase PV inverter is built and the experimental results are given to verify the analysis. In addition, the extension of the ZVS multiphase converter in different applications is introduced.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Analytical Expression-Based Modulation for Soft-Switched Matrix-Based
           Dual-Active-Bridge (S2MB-DAB) Single-Phase AC-DC Converter

    • Free pre-print version: Loading...

      Authors: Jaydeep Saha;Naga Brahmendra Yadav Gorla;Sanjib Kumar Panda;
      Pages: 6511 - 6522
      Abstract: The soft-switched modulation techniques presented in recent literature for single-phase half-bridge matrix-based dual-active-bridge (MB-DAB) ac-dc converter either suffers from incomplete soft-switching or computationally and memory expensive numerical technique requirement. An analytical expression-based modulation scheme for half-bridge MB-DAB, which is directly implementable on a microprocessor, is presented in this article that is capable of achieving near full-cycle ZVS turn-on of all MOSFETs and unity power-factor (UPF) operation. The theoretical derivations, working principles, and loss modeling are presented through suitable formulations. A 2.2-kW(pk) hardware prototype is fabricated, for which a PSIM simulation model is also developed using the MOSFET manufacturer’s SPICE models and other components’ datasheet parameters. The experimental results demonstrate near full-cycle ZVS turn-on over a wide load range (12%–100%), UPF operation, and 96.6% conversion efficiency at full-load in agreement with the simulation results, which validate the proposed modulation approach.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Guidelines for Voltage Controller Coefficients Design to Attain Prescribed
           Grid Current THD and DC-Link Voltage Undershoot Values in Power Factor
           Correction Front Ends

    • Free pre-print version: Loading...

      Authors: Pavel Strajnikov;Alon Kuperman;
      Pages: 6523 - 6533
      Abstract: This article establishes analytical guidelines for designing coefficients of proportional integral (PI) controller, typically used as voltage loop compensator of power factor correction rectifiers (PFCRs) operating in continuous conduction mode (CCM), based on two major performance merits (namely, total harmonic distortion (THD) of grid-side current and dc-link voltage deviation upon sudden load increase) and dc-link capacitance-to-rated power ratio. The proposed methodology allows to concretize the commonly used “5–10 Hz crossover frequency, 45°–70° phase margin” rule-of-thumb, typically used in application notes of commercial PFCR controllers. Explicit relationships between voltage loop gain crossover frequency and phase margin as well as settling time of dc-link voltage response to a step load increase to the above-mentioned performance merits are also derived in this article. Provided design guidelines allow to accurately achieve desired values of the two mentioned performance merits and indicate the feasible range of possible dc-link capacitance values. The proposed quantitative design guidelines are well-supported by experiments.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Selection of PI + Notch Voltage Controller Coefficients to Attain Desired
           Steady-State and Transient Performance in PFC Rectifiers

    • Free pre-print version: Loading...

      Authors: Pavel Strajnikov;Alon Kuperman;
      Pages: 6534 - 6544
      Abstract: The well-known trade-off between dc link voltage dynamics and ac-side current quality in power factor correction (PFC) rectifiers limits attainable dc link voltage loop bandwidth. It has been shown that adding a notch filter in series with the typically employed PI or type-II regulator allows improving dc link voltage dynamics without sacrificing total harmonic distortion (THD). However, clear quantitative guidelines for PI + Notch (PI + N) controller design to attain prescribed values of ac-side current THD and dc link voltage undershoot (response to a step-like load power increase) were not established so far. Consequently, analytical expressions linking the coefficients of the PI + N controller with the above-mentioned performance merits for a given value of dc link capacitance are revealed in this article. Corresponding dc link voltage loop gain phase margin and crossover frequency expressions are derived and the feasibility region of the proposed design guidelines is clearly indicated. Simulations and experimental results validate the proposed design methodology.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Sliding-Mode Control for Interleaved Operation of Parallel-Connected
           Three-Phase Active Front-Ends

    • Free pre-print version: Loading...

      Authors: Albrecht Gensior;
      Pages: 6545 - 6556
      Abstract: A converter system is considered that consists of parallel-connected two-level voltage source converters that share the same ac and dc terminals. A controller design is proposed that, in a first stage, controls the grid currents using hysteresis controllers. To this end, augmented grid currents are introduced, which feature decoupling between the phases. As a consequence, a switching action in one phase does not affect the derivatives of these currents in the other phases. In a second stage, the converter currents are controlled using hysteresis controllers such that a desired current distribution among the parallel converters may be ensured. This implicitly sets the circulating currents. The proposed approach is verified by measurements on an industrial megawatt-scale testbench with ten parallel converters. The results are compared with a benchmark approach, with the proposed approach showing lower semiconductor losses and grid current harmonic distortion.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Graph-Theory-Based Derivation, Modeling, and Control of Power Converter
           Systems

    • Free pre-print version: Loading...

      Authors: Yuzhuo Li;Johannes Kuprat;Yunwei Li;Marco Liserre;
      Pages: 6557 - 6571
      Abstract: Graph-theoretical approaches have been widely applied in many disciplines, however, their implementation in power electronics converters and systems is still in the exploring stage. In this overview, we summarize the milestones and general applications of this powerful mathematical tool and illustrate its unique benefits in some emerging/challenging power electronics research topics, for example, systematic converter derivation and modeling, advanced control, and so on. Given the multidiscipline nature of power electronics, graph theory can serve as a bridge for experts in different disciplines with a universal framework for complex problems. With solid mathematical foundations, it can stimulate research of topological aspects in both converter and systematic levels, fits well for nowadays power electronics converter. It is hoped that this article can serve as a timely and handy summary for engineers/students who want to enter the field and promote the innovation of power-electronics-enabled applications.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • A Nonisolated Single-Inductor Multiport DC–DC Topology Deduction Method
           Based on Reinforcement Learning

    • Free pre-print version: Loading...

      Authors: Yu Chen;Jingbo Bai;Yong Kang;
      Pages: 6572 - 6585
      Abstract: Single-inductor multiport converters have great application potential due to their “more silicon less magnetic” feature. However, the recent topology design methods, such as the forward design and reverse design, require strong power electronics knowledge, which troubles the application engineers lacking power electronics background. In this article, a topology deduction method based on reinforcement learning (RL) is proposed to gain the benefits of both forward and reverse design. The proposed method uses a neural network (NN) for forward design and takes a set of simple rules to give rewards for reverse design. With RL, the NN sums up experience during trial-and-error without human intervention, and finally finds the topology that gains the highest reward. Benefits of this method include: 1) it only requires design specifications such as components and port voltage as inputs and some simple rules as rewards, avoiding complicated feature predesign; 2) it allows the deduction to be started from any preconnection, satisfying the prior constraints of application engineers; and 3) it can recommend several actions at each step, providing good diversity of deduction results. Using this method, many topologies in the literature works are deduced, and some new topologies are also found. One of the topologies is experimentally tested and the results show the validity.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • The Methodology of Constructing the Quadratic Converters

    • Free pre-print version: Loading...

      Authors: Guanlin Li;Mahshid Amirabadi;Xiyou Chen;Brad Lehman;
      Pages: 6586 - 6606
      Abstract: This article provides a systematic method to construct types of quadratic converters. A three-terminal, four-element switching cell, consisting of one diode, one switch, one capacitor, and one inductor, is inserted into a separated conventional switching cell to create the quadratic converter. Detailed steps of the proposed method are described. Almost all the known nonisolated quadratic converters with two inductors, two capacitors, two power switches, and two diodes (or one power switch and three diodes) can be redeveloped by this method, but also many new topologies can be proposed. For example, the three-terminal, four-element switching cells can be inserted into SEPIC, CUK, and ZETA converters in different ways to derive different types of quadratic topologies. Furthermore, the proposed method can be extended to generate cubic or $n$ th power converters. Many of these quadratic converters are compared in terms of their dc gain, number of switches and diodes, voltage stress on the switches, character of input current, output polarity, and so on. The selection procedure to determine which quadratic converter might be used for different applications is presented. Finally, to demonstrate the generality of the approach, a new type of quadratic converter is derived and evaluated in both simulation and experiment.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Model Predictive Control for Four-Switch Buck–Boost Converter Based on
           Tuning-Free Cost Function With Smooth Mode Transition

    • Free pre-print version: Loading...

      Authors: Yuning Bai;Sideng Hu;Zhi Yang;Zhengbin Zhu;Yongchang Zhang;
      Pages: 6607 - 6618
      Abstract: Four-switch buck-boost (FSBB) converter has the capability of bidirectional voltage step-down and step-up, which has attracted attentions in the fields of energy storage and solar energy. However, it faces the challenges in multimode operation and smooth mode transition, which rely on the complex mode detection scheme and cumbersome parameter tuning. In this article, the inherent limitation is analyzed through inconsistent frequency response and noncontinuous duty cycle operation region aspects. Then, a model predictive control (MPC) method characterized by tuning-free cost function is presented to achieve multimode control and smooth transition simultaneously. With the goal of ensuring the reference current tracking under inconsistent frequency response, a duty cycle and current ripples prediction are presented for all switching combinations. Then, a tuning-free cost function is utilized to overcome the gaps in noncontinuous duty cycle operation region and a smooth mode transition is achieved. Further, the robustness of the current tracking capability is analyzed mathematically considering the inductance variation and stray resistance variation. Finally, a comparative experiment proves the effectiveness. And it shows that the method can improve the efficiency by 0.4% compared with the traditional four-mode control.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Performance Analysis of a Multimodule Staircase (MM-STC)-Type Multilevel
           Inverter With Reduced Component Count and Improved Efficiency

    • Free pre-print version: Loading...

      Authors: Samrat Paul;Kartick Chandra Jana;Saikat Majumdar;Pradipta Kumar Pal;Bidyut Mahato;
      Pages: 6619 - 6633
      Abstract: This article presents a detailed analysis of a reduced component staircase (STC)-type nine-level inverter designed with only two dc sources. Many of the reduced switch multilevel inverters proposed are designed with more voltage sources that are not utilized properly and have more conducting switches. The proposed MLI has a much lesser number of conducting switches; hence, it has higher efficiency. The topology can be extended to a generalized multimodule staircase (MM-STC) inverter that is designed with fewer dc sources and utilizes them properly without H-bridge. The generalized equations of the proposed inverter parameters are derived to find their optimal performances. Furthermore, an optimal MM-STC inverter configuration is derived from the proposed generalized topology to lower the inverter total standing voltage (TSV). An in-depth analysis and comparative studies are presented to prove its superiority over the existing MLIs of similar kinds. An experimental prototype of the proposed nine-level and the optimal 81-level inverter is developed in the laboratory, and the nearest level control (NLC)-based switching scheme is implemented for them using a DS1103-based digital controller. Finally, experimental results corresponding to the different modulation indices are presented to verify the simulation results.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • The Resonant Modular Multilevel DC–DC Converter Adopting
           Switched-Inductor Cells for High Step-Up Ratio

    • Free pre-print version: Loading...

      Authors: Xiaoquan Zhu;Liming Jiang;Bo Zhang;Ke Jin;
      Pages: 6634 - 6647
      Abstract: With the prosperous development of distributed renewable energy power generation, high-voltage direct-current (HVDC) system has evolved into large-scale practical applications from the initial stage, and high step-up conversion dc–dc converters have become a core technology to promote the development of HVDC system. This article proposes a new resonant modular multilevel dc–dc converter (MMDC) based on the conventional boost converter. The single-switch and diode of the conventional boost topology are replaced by submodules (SMs), which are clamped by floating capacitors, and the inductor is replaced by switched-inductor (SL) cells. The phase-shifted pulsewidth modulation (PS-PWM) is applied to regulate the state of SMs, i.e., inserted state or bypassed state, to ensure that there is a constant number of SMs supporting the output voltage at any time. The converter is operated in resonant mode with resonance between capacitors of SMs and the upper arm inductor. The step-up conversion ratio is dependent on the inductors charging ratio, the number of SMs, and SL cells. Hence, more regulation schemes are available. The proposed converter possesses the advantages of MMDC and has the inherent-balancing capability of SM capacitor voltages without additional complex balancing control. The structure of the converter, operating mode analysis, parameter design, and comparison with other MMDCs are presented, which have been verified by simulated and experimental results.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Modulation Coordinated Voltage Balance Strategy for a Dual-T-Type Modular
           Multilevel Converter

    • Free pre-print version: Loading...

      Authors: Cheng Wang;Shaoqiang Hu;He Peng;Liqun He;Shengfang Fan;
      Pages: 6648 - 6660
      Abstract: This article presents a dual-T-type modular multilevel converter (TMMC) composed of stackable ac–dc–ac power cells. Each cell is constructed by two high-frequency T-type legs and one line-frequency switched common leg. Hybrid legs make the system feature less switching semiconductors and flexible leg reusing. Series configurations on both input–output ac sides obtain high voltage grid accessing interfaces. Nevertheless, the fact that copies of capacitors are employed makes the dc voltages imbalance inner cell a tough issue. Furthermore, resulted from cell-mismatch arising with nonideal elements like parameter variations, the voltage imbalance inter different cells need to be settled. Seeing that TMMC has considerable switching combinations, a modulation coordinated method is proposed to realize capacitors’ energy-flexible routing. A voltage vector modulation is deduced to facilitate the planning of proper primary switching patterns, to achieve inner-cell voltage balancing. Moreover, the intercell voltage imbalance is foreknown by using the arranged patterns and a predicted grid current. Taking this feed-forward imbalance voltage value into account, a secondary alternated pulse distribution LS-pulsewidth modulation is proposed to achieve intercell voltage balancing. The simulation and experiment results are supplied to verify the validity of the proposed topology and its modulation coordinated voltage balancing strategy.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Common-Ground Grid-Connected Five-Level Transformerless Inverter With
           Integrated Dynamic Voltage Boosting Feature

    • Free pre-print version: Loading...

      Authors: Reza Barzegarkhoo;Majid Farhangi;Ricardo P. Aguilera;Sze Sing Lee;Frede Blaabjerg;Yam P. Siwakoti;
      Pages: 6661 - 6672
      Abstract: A single-phase common-ground five-level (5L) inverter with a dynamic voltage conversion gain and capability of operating in a wide input voltage range and a single-stage energy conversion configuration is presented in this article. The proposed topology requires nine active power switches and is comprised of an integrated switched-boost (SB) module connected in series to a switched-flying-capacitor (SFC) cell. Two self-balanced capacitors with a single boost inductor in the integrated SB module are employed to generate a 5L output voltage waveform with a dynamic voltage conversion gain. The current stress profile of all the active and passive elements is kept within a permissible input current range. By adopting an extra diode-capacitor-inductor network into the integrated SB module and with the utilization of the same SFC cell, the proposed topology is extended to achieve a quadratic voltage conversion gain while retaining the quality of ac voltage waveform. Theoretical analysis, closed-loop control/modulation principles, design guidance, comparative study, and relevant experimental results obtained from a 1.5-kW laboratory-built prototype are presented to ascertain the operation and feasibility of the proposed system.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • A Cost-Effective and DC-Fault Tolerant Alternate Arm Converter With Wide
           Range Voltage Adaptability

    • Free pre-print version: Loading...

      Authors: Shiyuan Fan;Cong Chen;Heya Yang;Xin Xiang;Huan Yang;Wuhua Li;Xiangning He;
      Pages: 6673 - 6686
      Abstract: In this article, an enhanced three-arm alternate arm multilevel converter (AAMC), called T-type AAMC (T-AAMC), is proposed for achieving dc fault ride-through capability with reduced semiconductor power devices compared to the hybrid modular multilevel converter (MMC). The upper and lower dc arms of T-AAMC are formed by half-bridge submodules (SMs) and series devices for lower construction costs, while the ac arm uses full-bridge SMs to realize dc fault tolerance. First, the arm phase-shift conducting modulation is applied for energy balance of converter stacks under wide-range operation by adjusting the arm phase-shift angle to match ac grid voltage and power factor. Then, the SM number, power device number, and SM capacitance are evaluated for T-AAMC under optimized modulation design. Analyses illustrate that 43% SMs, 17% power devices, and 44% energy storage requirement are reduced with the proposed topology than that with hybrid MMC. Furthermore, the closed-loop control system is designed to dynamically regulate the energy sharing between dc and ac stacks. Finally, full-scale simulations and down-scaled experiments are performed to verify the feasibility of the proposed converter and the theoretical analysis of its modulation and implementation.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Coupled-DC Module-Based Photovoltaic System With Power Mismatch-Tolerated
           Modulation

    • Free pre-print version: Loading...

      Authors: Cheng Wang;He Peng;Liqun He;Lei Li;Yaosuo Xue;
      Pages: 6687 - 6704
      Abstract: This article presents a coupled-DC power module-based cascaded multilevel converter integrating utility-scale photovoltaic (PV) generations (coupled-DC-link power module (CDPM)-PV). CDPM-PV inherits merits such as modular structure, distributed maximum power point tracking (MPPT), direct distribution grid access, from cascaded H-bridge-based PV (CHB-PV) system. But, it supplies more flexible power routes than CHB-PV, through coupling different DC-links. Power routes are intended for enlarging the entire operating range including conditions of active power mismatch arising from nonideal elements such as partial shading and parameter variations. The system construction with its self-balancing principle is first introduced. Switching states for different operating regions are then derived based on the principle of easing implementation. Based on these, a modulation strategy including initial switching pattern selection and coordinated power routing is proposed to allow module-mismatches. Operating ranges are also analyzed and compared with conventional CHB-PV. Simulation results of a 3-MW/13.8-kV system developed in MATLAB/Simulink platform, and experiment results based on a 2.4-kW/311-V setup are presented and have demonstrated that the CDPM-PV topology with proposed modulation strategy can not only ride through a larger range of module mismatches, but also improve solar power utilization and system efficiency owing to noncompromised MPPT.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Evaluating the Over-Modulation Risk of Modular Multilevel Converters by
           Using Dynamic Modulation Ratio

    • Free pre-print version: Loading...

      Authors: Zhijie Liu;Ke-Jun Li;Zhonglin Guo;Jinyu Wang;Jianhang Qian;
      Pages: 6705 - 6713
      Abstract: Since the over-modulation can lead to the unstable operation of converters, the over-modulation risk evaluation is important in the circuit parameter selection, operating region design, and so forth. However, the wildly used evaluation method of modular multilevel converters (MMCs) comes from two-level converters; and the article found that its obtained result is not always accurate for MMCs because four assumptions will be introduced when the conventional modulation ratio (CMR) is used as the indicator. To solve the problem, a new concept, namely dynamic modulation ratio (DMR), is proposed. Comparing with the CMR, the DMR can dynamically change according to the variation of operating conditions and can reflect the modulation characteristics more accurately. Quantitative comparisons are carried out between the CMR-based and the DMR-based evaluation methods in various operating conditions. The comparisons show that the CMR-based method is only accurate under a few situations for MMCs, and the obtained operating region of MMCs is not optimal when the CMR is used as the indicator in the parameter design of MMCs. In contrast, the DMR-based evaluation method is high-accurate under all situations. Finally, experiments are carried out in a down-scaled MMC prototype for further validating the method.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Fault Detection and Tolerant Control of IGBT Open-Circuit Failures in
           Modular Multilevel Matrix Converters

    • Free pre-print version: Loading...

      Authors: Chao Wang;Zedong Zheng;Kui Wang;Yongdong Li;
      Pages: 6714 - 6727
      Abstract: The modular multilevel matrix converter (M3C) is a topology that can realize direct ac-to-ac power conversion. To increase the reliability of the M3C, submodule (SM) fault ride-through capability is required to avoid unscheduled shutdown caused by the failures of power components in its SMs, such as the open-circuit fault of insulated gate bipolar transistors. Although this kind of fault has been widely studied for the regular dc–ac modular multilevel converter (MMC), the existing fault diagnosis criteria and fault-tolerant control processes are not directly applicable to the M3C. To solve this problem, this article analyzes the behavior of the M3C under open-circuit faults and proposes a suitable fault detection criterion for the M3C by transferring the observation errors of circulating currents into specific values. Meanwhile, since the observers can only identify two types of faults but not accurately locate the faulty device in a full-bridge SM, a modified fault tolerance process is proposed. Moreover, this article proposes a method to obtain the actual maximum intrinsic errors (AMIEs) of the observers to determine fault diagnosis thresholds under different load conditions. A downscaled M3C prototype with 27 SMs is built, and experimental results are presented to validate the effectiveness of the proposed fault detection criterion, the fault-tolerant control process, and the AMIE-obtaining method.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • A Modeling Approach for the VIRT and Other Coupled Electronic and Magnetic
           Systems

    • Free pre-print version: Loading...

      Authors: Mike K. Ranjram;David J. Perreault;
      Pages: 6728 - 6741
      Abstract: Recently, a new class of magnetic component has emerged in which the electronics that connect to these components are fundamental to defining the conductive loops that comprise them. In these “coupled electronic and magnetic systems” (CEMSs), a clear partition cannot be made between the electrical and magnetic domains and this prevents the application of established modeling techniques for deriving their circuit representation. One such CEMS is the variable inverter/rectifier transformer (VIRT), which enables a transformer with fractional effective turns and a variable effective turns ratio. Previous investigations into the VIRT have invoked simplifying assumptions to synthesize a circuit representation, omitting the full details of operation such as the possibility and implications of ac currents induced on conductors that encircle the VIRT. Other fractional-turn transformers have simply assumed a circuit representation without undertaking modeling. In this work, a modeling approach is proposed which enables the circuit representation of a CEMS to be extracted directly from first principles. Two case studies are explored and the derived models are shown to match well with experiment. The proposed approach is suitable both for assessing the finer details of the VIRT, and other fractional-turn transformers, and as a framework for deriving and understanding new CEMS implementations.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Generation and Comparative Analysis of High-Voltage Gain Nonisolated
           DC–DC Converters With Ladder Switched Capacitor and Coupled Inductor

    • Free pre-print version: Loading...

      Authors: Pablo Henrique Costa da Silva Bernardo Loureiro;Tiago Miguel Klein Faistel;Ademir Toebe;António Manuel Santos Spencer Andrade;
      Pages: 6742 - 6753
      Abstract: A design methodology for creating a set of high-voltage gain DC–DC converters is presented and discussed in this article. The proposed generation is based on ladder switched capacitor (SC) with coupled inductor. So, eight high-voltage converters with a single switch without increasing the number of components are proposed. Detailed evaluations about the derivation of each topology, comparative analysis among main features of each converter are presented. These converters are evaluated in different aspects, such as principle of operation, voltage gain, sensibility of the output voltage, total voltage stress (TVS), total current stress (TCS), ZCS, charging mode compared to the standard SCs cells, design guidelines, power density, power losses, and estimated efficiency. By these comparisons, the main feature and limitations of the analyzed converters are recognized. Thus, four topologies were chosen to be evaluated experimentally, considering 200 W, 30 V, 400 V, and 50 kHz. The combination of the techniques provides the best trend off on the comparative analysis carried out in this work. The results show that attention should be paid to choosing the best position to include a technique. In this case, the best choice was BCISC-V converter, which presented the best voltage gain, TCS, ZCS, and efficiency characteristics.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • DC–DC Converter Implementations Based on Piezoelectric Transformers

    • Free pre-print version: Loading...

      Authors: Jessica D. Boles;Elaine Ng;Jeffrey H. Lang;David J. Perreault;
      Pages: 6754 - 6769
      Abstract: The drive to miniaturize power electronics motivates investigation into alternative passive component technologies such as piezoelectrics, which offer fundamentally higher power density and efficiency capabilities at small scales compared to magnetics. Piezoelectric transformers (PTs) have seen application in dc–dc converters, but these designs typically require additional magnetics for competitive efficiency. In this work, we systematically enumerate isolated and nonisolated dc–dc converter topologies and switching sequences capable of efficiently utilizing PTs as their only energy storage components. The proposed switching sequences maintain high-efficiency behaviors (e.g., zero voltage switching (ZVS), all-positive instantaneous power transfer, and minimal charge circulation) across wide voltage gain and load ranges. We present techniques for deriving these switching sequences’ ZVS regions, estimating PT efficiency, and solving for periodic steady state switching times; these offer insights for comparing and implementing design options. We then verify our analyses in a 180–500 V experimental prototype based on a commercially-available PT, which demonstrates significant efficiency gain through a proposed implementation.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Optimized Multi-Carrier PWM Strategy and Topology Review for Multi-Cell
           Series-Parallel Medium-Voltage Rectifier

    • Free pre-print version: Loading...

      Authors: Jehyuk Won;Srdjan Srdic;Srdjan M. Lukic;
      Pages: 6770 - 6783
      Abstract: Solid-state transformer (SST) acting as a medium-voltage (MV) rectifier is a viable solution to supply low-voltage DC (LVDC) loads directly from the MV ac grid. Different from a classical boost-derived power-factor-correction (PFC) topology, the multicell series-parallel (MCSP) converter steps down and distributes the input ac voltage by multiple switching cells while providing the PFC function. We propose an optimized multicarrier pulsewidth modulation (PWM) strategy to avoid unwanted modes by modified multicarrier waveforms for ensuring frequent parallel connectivity to improve balancing effect while preserving simple current control implementation. Compared with conventional phase-shifted (PS) PWM and other modified multilevel carrier methods, the proposed method has no adverse effect on the input current distortion and optimizes the balancing effect on the capacitor voltages resulting suppressed circulating currents. Effectively reduced current stresses on the switch devices could lead a reduction of conduction loss on the device. Topology discussion, circulating currents, digital implementation, and loss analysis are provided. Finally, the superiority of the proposed PWM method is validated by thermal-based simulation presenting a power loss breakdown and comparing with other PWM methods. A full-scale prototype is developed, and the experimental outcomes verify the remarkable performance of proposed PWM scheme in balanced and even suppressed switch currents with improved system efficiency.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • A Phase-Disposition PWM-Enabled Model Predictive Control for a Nine-Level
           Inner-Interleaved Hybrid Multilevel Converter

    • Free pre-print version: Loading...

      Authors: Yufei Li;Fei Diao;Yue Zhao;
      Pages: 6784 - 6796
      Abstract: This article brings forward a phase-disposition pulsewidth modulation-enabled model predictive control (PDPWM-MPC) for a nine-level inner-interleaved hybrid multilevel converter (9L-IHMC). First, three layers of virtual space vector diagrams (VSVDs) are established based on the sign patterns of the original and virtual reference vectors in the abc-frame to achieve the phase-disposition pulsewidth modulation (PD-PWM) in a nonindependent three-phase way. Then, three adjacent virtual vectors in the third-layer VSVD, together with their optimized duty cycles, are applied to guarantee the optimal current tracking. Finally, through the use of the duty-cycle alternation approach, dc-link and floating capacitors voltages are balanced and circulating currents are mitigated as well. The proposed PDPWM-MPC can not only enable the decoupling of the low- and high-frequency stages in the 9L-IHMC but also reduce both output current ripples and computational burden. In addition, it can achieve a constant equivalent switching frequency and address the disproportion of power losses associated with the PD-PWM. Both simulations and experiments on a silicon carbide device-based prototype substantiate the effectiveness of the proposed control strategy.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Carrier Redistribution Pulsewidth Modulation for Five-Level Stacked
           Multicell Converter

    • Free pre-print version: Loading...

      Authors: Qian Cheng;Chenchen Wang;Zhuo Chen;
      Pages: 6797 - 6809
      Abstract: This article presents a modified carrier redistribution pulsewidth modulation (CRPWM) method for the five-level stacked multicell converter (SMC). The proposed CRPWM method is modified by exchanging the arrangement of the carriers of phase disposition pulsewidth modulation (PDPWM). With the ingenious carrier arrangement, the proposed PWM technique equalizes the utilization of phase leg voltage redundancies corresponding to the charging and the discharging state of each floating capacitor during one switching period of all the switches. The proposed modulation strategy has the same harmonic performance of line-to-line voltage with PDPWM, while the switch utilization is the same as phase-shifted pulsewidth modulation (PSPWM). Therefore, the voltage balancing of floating capacitors is achieved during a minimum switching period even with the influence of load current change and inappropriate carrier ratio is considered. The modified CRPWM is analyzed in theory and the voltage balancing ability and output harmonics performance are compared with PSPWM and traditional CRPWM. Simulation and experimental results on the laboratory prototype five-level SMC confirm the validity of the proposed CRPWM technique.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Hybrid Space Vector Modulation Scheme to Reduce Common-Mode Voltage
           Magnitude and Frequency in Three-Level Quasi-Z-Source Inverter

    • Free pre-print version: Loading...

      Authors: Changwei Qin;Xiangyang Xing;Ying Jiang;
      Pages: 6810 - 6821
      Abstract: The three-level quasi-Z-source inverter (TLQZSI) is an attractive topology that is suitable for voltage buck and boost operation. This article further presents a hybrid space vector modulation (HSVM) scheme to reduce the common-mode voltage (CMV) magnitude and frequency simultaneously. At first, the selection of basic vectors is optimized. Six medium vectors, six small vectors that have low CMV magnitudes, one zero vector, and three shoot-through vectors are utilized to produce the ac output voltage. The shoot-through state is properly inserted within the zero vector without affecting the normal ac output voltage. The effective small vector is selected according to the neutral-point voltage (NPV). Duty cycles of the adopted vectors are updated accordingly, and the restriction of the duty cycle of effective small vector is also derived. When comparing with the conventional SVM method, the CMV magnitude for the proposed scheme is suppressed by half. Furthermore, the CMV frequency is reduced by comparison to the conventional CMV reduction method. The feasibility of the proposed scheme has been tested by using the Simulink platform and a hardware-based test rig.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Mechanism and Cancellation of DC Current Fluctuation in MMC Excited by
           Circulating Current Mitigation Under Nearest Level Control

    • Free pre-print version: Loading...

      Authors: Ke Ma;Enyi Li;Bin He;Xu Cai;
      Pages: 6822 - 6831
      Abstract: For modular multilevel converter (MMC) under Nearest Level Control (NLC) with dozens of or less sub-modules (SMs), circulating current suppression control (CCSC) can lead to severe fluctuation in dc current of MMC due to insufficient voltage levels to modulate the control voltages generated from circulating current suppression. This article presents a detailed analysis of the mechanisms of the above-mentioned problems, and a solution by using a dual-mode modulation method combining pulsewidth modulation (PWM) and NLC modulation is presented. In this method, two SMs in each arm are selected to operate under PWM modes to precisely modulate the control voltages from circulating current suppression, and the rest of SMs are operated under NLC modes to roughly modulate the output ac voltage of MMC. A voltage balancing control method for both of the two different modulated SMs is also investigated. The proposed method not only eliminates the dc current fluctuation in MMC, but also achieves voltage balancing among SMs. Finally, validation by RTDS is given to verify the effectiveness of the proposed method.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Modified Carrier-Overlapped PWM With Balanced Capacitors and Eliminated
           Dead-Time Spikes for Four-Level NNPC Converters Under Low Frequency

    • Free pre-print version: Loading...

      Authors: Mingzhe Wu;Yun Wei Li;Hao Tian;Yuzhuo Li;Kui Wang;
      Pages: 6832 - 6844
      Abstract: Due to the lack of sufficient redundant states, four-level nested neutral-point clamped (4L-NNPC) converters suffer from severe flying capacitor (FC) voltage fluctuations under low fundamental frequencies, which restricts their applications in practice. To deal with this issue, a modified carrier-overlapped pulsewidth modulation (PWM) (COPWM) is proposed in this article, which could achieve zero average current flow through the two FCs over each carrier period. As a result, their voltages can be balanced naturally under steady states theoretically, and the low-frequency FC voltage fluctuation issue would no longer exist. In order to compensate for any nonideal factors in real industrial applications, an active control by dynamically adjusting the correspondence between carriers and switches is further applied for better control performance. A dead-time compensation scheme is proposed accompanied by this modified COPWM to eliminate the unexpected dead-time-induced voltage spikes of 4L-NNPC converters. The effectiveness of the proposed modified COPWM in regulating the FCs under low frequency and eliminating the dead-time-induced voltage spikes is verified by both simulation and experimental results.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • A Low-Voltage Low-Loss Active Reflected Wave Canceller for a
           Medium-Voltage SiC Motor Drive Based on a Generalized Multilevel Inverter
           Topology

    • Free pre-print version: Loading...

      Authors: Yu Zhang;Hui Li;Zhehui Guo;Fang Z. Peng;
      Pages: 6845 - 6853
      Abstract: Multilevel topologies with SiC devices for medium-voltage (MV) motor drive have advantages to reduce the harmonics and device voltage stress and increase efficiency. However, with the application of SiC devices, the reflected wave phenomenon still happens in multilevel motor drives due to its high dv/dt, resulting in overvoltage at motor terminals. This article proposed a T-type circuit-based active reflected wave canceller (ARWC) to suppress the overvoltage of an M-level motor drive with a reduced voltage rating of $V_{mathrm {dc}}$ /( $M-1$ ). A coupled inductor is applied to isolate the ARWC output and the main inverter. In addition, the coupled inductor is designed with a small resistor to allow low current flow into ARWC. The proposed ARWC configuration can be applied for general multilevel topologies. A three-level ANPC converter with a 3.3-kV SiC device is built in the laboratory. A 1.2-kV SiC module is applied in the proposed ARWC. The experimental results at 1.6-kV $V_{mathrm {dc}}$ and 16-A (rms) load current with and without proposed ARWC are provided and compared to verify the validity of the proposed method.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • A Self-Voltage Balanced Hybrid Three-Level MV Inverter Using 3.3-kV SiC
           MOSFET Module With False-Trigger-Proof Design

    • Free pre-print version: Loading...

      Authors: Zhehui Guo;Hui Li;Xiaofeng Dong;
      Pages: 6854 - 6864
      Abstract: This article presents a self-voltage balanced three-level (3L) active-neutral-point-clamped (ANPC) medium-voltage (MV) inverter. Two switches of this inverter operate at high frequency (HF), while four switches operate at low frequency (LF), which is suitable to be implemented with hybrid “Si IGBTs + SiC MOSFETs” for MV applications. A 3.3-kV SiC MOSFET power module with low parasitic packaging is applied as HF switches, and the dc-link capacitor voltages can be self-balanced through periodic charging/discharging processes with a small decoupling capacitor. However, the inrush current occurs during voltage balancing processes, resulting in the false trigger of desat protection for LF switches. In this article, the mechanism of inrush current during voltage balancing processes is analyzed and a 3L gate driving method is proposed for LF switches to solve the false-triggering issue and improve the inrush energy loss distribution. In addition, high dv/dt of SiC switching transients may cause the false-triggering issue of HF switches, and desat protection design equations are therefore derived for this 3.3-kV SiC MOSFET power module to achieve a fast (< 440 ns) short-circuit response and maintain a good noise immunity to high dv/dt. A 4-kV dc, 40-kVA inverter prototype is built in the laboratory and the experimental results are provided to verify the proposed methods.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Advanced PWM Techniques for Multi-Level Inverters With a Multi-Level
           Active CM Noise Filter

    • Free pre-print version: Loading...

      Authors: Dongwoo Han;Fang Z. Peng;Suman Dwari;
      Pages: 6865 - 6879
      Abstract: Pulsewidth modulation (PWM)-based power electronics inverters are being widely used for various applications, including motor drives. However, the common-mode voltage (CMV) resulting from switching operations in the PWM inverters causes significant performance degradation of the system and can cause potential damage to motors. Since the effects of the CMV can be more severe in wide bandgap (WBG) and high switching frequency-based converter systems, various methods have been proposed to mitigate the CM noise issues. This work presents a multi-level inverter system composed of a multi-level inverter with a proposed multi-level active power filter (APF). For attenuating the CMV in multi-level inverters using multi-carrier-based PWM methods, a novel PWM method is presented for the proposed multi-level APF. The three-phase five-level active-neutral-point-clamped (ANPC) II-type inverter using the apparent switching frequency doubling (ASFD) PWM is used as an example of the multi-level inverters and carrier-based PWM methods to analyze and verify the proposed CMV attenuation method. The APF generates and injects the APF voltage equal to the CMV to attenuate the CM noise accurately. Various key challenges, including the dead-time compensation, are addressed through the proposed advanced PWM techniques to improve the CMV attenuation performance. Simulation and experimental results are provided to verify the comparison and effectiveness of the proposed CMV attenuation method.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • An Integrated Driving/Charging Four-Phase Switched Reluctance Motor Drive
           With Reduced Current Sensors for Electric Vehicle Application

    • Free pre-print version: Loading...

      Authors: Vaibhav Shah;Saifullah Payami;
      Pages: 6880 - 6890
      Abstract: This article proposes an integrated power converter (IPC) with driving/charging capabilities for four-phase switched reluctance motor (SRM) drive-based electric vehicle (EV) application. With the proposed IPC, only two current sensors are employed for measuring phase currents under all operating conditions. The proposed IPC integrates three circuits. First, during the SRM driving mode, the proposed IPC is utilized as an improved Miller converter. Second, during battery charging mode, the proposed IPC is utilized as an on-board battery charger, which is based on a bridgeless boost power factor correction circuit (PFCC) that incorporates two dc–dc boost converters. The on-board battery charger is realized by utilizing the existing power electronic switches in the proposed IPC and all the phase windings as charging inductors. Third, a front-end bidirectional dc–dc converter is employed for maintaining voltage and current balance between IPC dc-bus and battery. During driving mode, the front-end converter boosts the battery voltage to the IPC dc bus voltage. And during regeneration/braking, the stored magnetic energy is used to charge the battery in constant-current (CC) mode via the front-end converter. During battery charging via ac grid, the bridgeless boost PFCC and the front-end converter operating in buck mode charge the battery in CC/constant-voltage (CV) modes without stepping down the ac grid voltage. The claims of the proposed IPC are validated through simulation and experimental verifications.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Flexible Active Power Control of Distributed Photovoltaic Systems With
           Integrated Battery Using Series Converter Configurations

    • Free pre-print version: Loading...

      Authors: Yiwei Pan;Ariya Sangwongwanich;Yongheng Yang;Xiong Liu;Marco Liserre;Frede Blaabjerg;
      Pages: 6891 - 6909
      Abstract: Flexible active power control (FAPC) is becoming mandatory for PV systems, which is to limit/reserve the PV power below certain constraints as commanded, including the power ramp-rate control (PRRC), power limiting control (PLC), and power reserve control (PRC). In practice, energy storage (ES) such as batteries can be adopted to reduce the PV energy discarding in such cases. On the other hand, concerning the system overall cost, single-stage series power converter configurations are becoming attractive. Such configurations bring more flexibilities by integrating PV systems and batteries. However, the implementation of FAPC functions in series power converter configurations has not been systematically investigated. To fill this gap, the PRRC, PLC, and PRC strategies for series-PV-battery systems are developed in this article. With the proposed strategies, the power ramp-rate/limiting/reserve constraints are maintained by the coordinated control of individual converters. The reserved power is then distributed among all converters depending on the available power of individual PV converters, battery power, and state-of-charge (SoC) conditions. Experimental tests performed on a 1.6-kW system have validated the effectiveness of the proposed solution.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Novel Method for Instantaneous Neutral Point Voltage Balancing for a
           Stacked Multilevel Inverter-Fed Six-Phase Induction Motor Drives

    • Free pre-print version: Loading...

      Authors: R. Viju Nair;K. Gopakumar;
      Pages: 6910 - 6917
      Abstract: This article proposes a novel method for instantaneous neutral point (NP) balancing for a six-phase stacked multilevel inverter (MLI)-fed induction motor (IM) drive. A stacked inverter requires as many dc sources as the number of stackings. A single dc source is ensured with instantaneous NP balancing although there are two stackings of MLIs. A single dc-link enables direct back-to-back power conversion and power can be fed back to mains at the desired power factor. Instantaneous NP balancing is achieved by ensuring that at any instant, no midpoint current is drawn from the NP (dc-link capacitor midpoint). This work shows that the midpoint is used only as a tapping point to generate the different pole voltage levels and no current needs to be drawn from it. V/f experiment is conducted on a six-phase IM with a nine-level stacked MLI, which is developed by stacking two five-level inverters where each of the five-level is developed by cascading a flying capacitor with a capacitor fed cascaded H-bridge. The results ensured that the proposed method for zero instantaneous NP current is valid for both steady-state and transient conditions of a six-phase IM drive using stacked MLI.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Y-Matrix Modulation for SC-MMC Medium Voltage Grid-Tie
           Converter

    • Free pre-print version: Loading...

      Authors: Hamed Pourgharibshahi;Yuntao Zou;Robson Bauwelz Gonzatti;Fang Zheng Peng;Yuan Li;Hui Li;
      Pages: 6918 - 6928
      Abstract: This article illustrates the practical implementation of $Y$ -Matrix Modulation for a medium voltage grid-tie switched-capacitor modular multilevel converter (SC-MMC) with a middle submodule (SM). SC-MMC only contains switches and capacitors, and there is no physical arm inductor. Through $Y$ -Matrix Modulation, SC-MMC has the capability of self-voltages balancing. $Y$ -Matrix Modulation also eliminates the need for voltage sensors and complicated feedback controls. Moreover, $Y$ -Matrix Modulation can be used for both half-bridge and full-bridge structures for any $N$ -level modular multilevel converter (MMC). Therefore, this modulation is very effective owing to its simplicity, modularity, and sensorless features. Additionally, SC-MMC with a middle SM can generate the same voltage level with fewer cells. A modified $Y$ -Matrix Modulation is needed with the minimum number of sensors. This article provides experimental implementation of this modulation for a medium voltage grid-tie converter. $Y$ -Matrix generation is simplified using a less computationally demanding method. $Y$ -Matrix Modulation for four-SM SC-MMC with a middle SM is demonstrated in this article and compared with conventional modulations. A real-time computer hardware in the loop setup and small-scale experimental setup is used to verify the operation of the controller under steady-state and transient conditions.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Design of a High-to-Low Voltage, Low-Power, Isolated DC/DC Converter for
           EV Applications

    • Free pre-print version: Loading...

      Authors: Etienne Foray;Christian Martin;Bruno Allard;Pascal Bevilacqua;
      Pages: 6929 - 6937
      Abstract: The design of a low-cost 800–12 V, 4 W isolated dc/dc converter for automotive applications is investigated. Such a converter is required to supply tiny systems directly from the high-voltage battery of an electric vehicle. In particular, a selected topology based on a multilevel flying-capacitor stage is analyzed. The converter operating mode selection is studied and simulation results reveal the interest of operating at the limit of the zero voltage switching (ZVS) mode. The design of a planar transformer adapted to the application is described. Design considerations of an IC brick that includes the main blocks required to control the power stage are discussed. The performances of a 4-W prototype with two transformer designs validate the choice of the operating mode. The peak efficiency is 87.4% which confirms the interest of the selected approach compared to existing solutions.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Utilization of a Reduced Switch-Count Topology in Regenerative Cascaded
           H-Bridge (CHB) Medium-Voltage Drives

    • Free pre-print version: Loading...

      Authors: Sarah Badawi;Ahmed H. Abuelnaga;Zhituo Ni;Shaoyi Yuan;Mehdi Narimani;Zhongyuan Cheng;Navid R. Zargari;
      Pages: 6938 - 6949
      Abstract: This article employs a reduced switch-count topology in regenerative cascaded H-bridge (CHB) motor drives. Conventional regenerative CHB drive employs six-switch voltage source converters in the front end of each power cell to capture and utilize the regenerated energy. This solution is accompanied by a high number of switches, gate drives, and control circuits, especially when the number of levels increases. This causes high switching power losses, and increase in the cost, size, and weight of the overall system. This article utilizes a four-switch three-phase inverter active front end to reduce the switch count of the CHB power cell. The utilization of the four-switch inverter creates several challenges in terms of voltage imbalance on the capacitors and harmonics on the grid side. First, these challenges in medium-voltage operation are analyzed and addressed. Then, a new phase alternation connection method and two carrier phase-shifting techniques are proposed in this article to address the input current harmonics and comply with the grid connection standards. The performance of the proposed configuration and control techniques is analyzed theoretically and with simulation studies. The feasibility of the proposed configuration is validated experimentally on a scaled-down seven-level regenerative CHB drive.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • A New Stability Enhancement Method Using KF Estimation for the
           PWM-SMC-Based Grid-Tied Inverter Under Weak Grid Condition

    • Free pre-print version: Loading...

      Authors: Bolin Chen;Weimin Wu;Chunxiao Gao;Mohamed Orabi;Eftichis Koutroulis;Henry Chung;Frede Blaabjerg;
      Pages: 6950 - 6959
      Abstract: A sliding-mode control (SMC) technology is widely used in inductor-capacitor-inductor (LCL)-filtered grid-tied inverters (GTIs) due to its strong robustness against parameter drift. However, under weak grid conditions, the steady performance of GTI using conventional pulsewidth-modulation-based SMC (PWM-SMC) degrades, resulting in increased harmonics in grid-injected currents. One reason is that the voltage feedforward term at the point of common coupling (PCC) in the SMC loop causes the phase margin of the inverter output impedance to decrease. Another reason is that the gain of conventional PWM-SMC-based systems is not high enough, especially under weak grid conditions. This article proposes a PCC feedforward voltage reconstruction method (named KF-PWM-SMC) for a PWM-SMC-based controller using Kalman filter (KF) estimation. As a result, the phase and magnitude of the inverter output impedance at the desired frequency can be significantly improved. Moreover, the proposed PCC feedforward voltage extraction method can save the PCC voltage control sensor, thereby improving the reliability of the whole system. A 3-kW experimental GTI based on the dSPACE DS1202 platform has been developed to verify the feasibility of the proposed control strategy.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • A Hybrid Pulse Frequency Modulation Control Strategy for L-LLC Resonant
           Converter

    • Free pre-print version: Loading...

      Authors: Jianqiang Liu;Yu Ai;Shaoyong Chen;Zehui Zhang;Yunming Shi;
      Pages: 6960 - 6972
      Abstract: The traditional control strategy for the L-LLC resonant converter is the synchronous unequal width pulse frequency modulation (SUW PFM). However, this strategy causes a large circulating power in the forward buck and reverse boost modes, especially when the voltage gain deviates from 1. To solve the limitations of the SUW PFM, a novel constant width PFM (CW PFM) is proposed in this article, which can reduce the circulating power and improve the converter efficiency in the forward buck and reverse boost modes. Furthermore, a hybrid PFM control strategy is proposed by merging the appropriate working conditions of the CW PFM and the SUW PFM, which can flexibly switch the two modulations depending on the gain and load conditions. Therefore, the L-LLC resonant converter has good soft-switching characteristics in entire load and gain ranges. Finally, a 7.5-kW L-LLC resonant converter prototype is built to verify the validity and superiority of the proposed control strategy.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Improving Stability and Power Sharing of Bidirectional Power Converters by
           Relaxing DC Capacitor Voltage

    • Free pre-print version: Loading...

      Authors: Ali Zakerian;Roshan Sharma;Masoud Karimi-Ghartemani;Houshang Karimi;
      Pages: 6973 - 6984
      Abstract: This article presents a new control structure for bidirectional power electronic converters. Commonly, a proportional-integrating (PI) controller is used in the dc capacitor voltage loop, to generate the set point for the current controller, which tightly regulates this voltage to a given value. This article shows that such an approach causes stability issues that are aggravated during reverse power flow operation and intensify during weak grid conditions and uncertainties. The proposed controller allows small variations of dc capacitor voltage in proportion to the power flowing through the converter. This improves the stability of the converter irrespective of the power direction and in the presence of uncertainties and weak grid conditions. The proposed control structure also simplifies the design process, and it can be applied to dc/dc and dc/ac (single-phase and three-phase) converters. Moreover, the proposed method grants an inherent power-sharing capability when multiple converters share the same dc bus. The article also adopts full state feedback and an optimal control approach, i.e., the linear-quadratic tracker (LQT), for systematic design of the current control loop and enhanced robustness. Detailed analyses, simulations, comparisons, and experimental results are included to demonstrate the effectiveness of the proposed approach.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • High Precision Primary Side Regulation Constant Voltage Control Method for
           Primary and Secondary Resonant Active Clamp Flyback Converter

    • Free pre-print version: Loading...

      Authors: Qinsong Qian;Shengyou Xu;Shiyun Xu;Qi Liu;Song Ding;Cheng Gu;Ziyan Zhou;Limin Yu;Shengli Lu;Weifeng Sun;
      Pages: 6985 - 6999
      Abstract: Active clamp flyback (ACF) converter has been demonstrated that which is better than traditional flyback in high-frequency power-adaptor applications. According to the circuit structure, ACF has two modes, primary resonant ACF (PR-ACF) and secondary resonant ACF (SR-ACF). In order to improve the power density, a high-precision primary side regulation (PSR) constant voltage control method for ACF converter is proposed in this article. The proposed method not only can be effectively adopted in PR-ACF but SR-ACF converter. The high-precision output voltage is predicted by highly accurate sampling points on primary auxiliary voltage. The applied microcontroller environment improves the practicability and increases the power density of the ACF system. To verify the proposed PSR method, a prototype that can be changed into PR-ACF and SR-ACF is designed. The output voltage offset, operation efficiency, and dynamic performance are analyzed. The tested results show that high-precision output is obtained in ACF converter by using the proposed method and the maximum output voltage deviation which are 4% and 3.5% in PR-ACF and SR-ACF converter, respectively. Moreover, SR-ACF has a higher efficiency compared with PR-ACF converter, and a smaller voltage shoot during dynamic process, which needs a larger regulation time since the additional output inductor.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Zero-Sequence Circulating Current Analysis and Suppression for
           Multimodular Interleaved Parallel Inverters

    • Free pre-print version: Loading...

      Authors: Shiming He;Aoni Sun;Bangyin Liu;
      Pages: 7000 - 7013
      Abstract: Modular interleaved parallel inverters with shared dc and ac bus will introduce the zero-sequence circulating current (ZSCC) between the paralleled modules. Larger ZSCC may increase the current stress of power switches and reduce system efficiency. In this article, the ZSCC equivalent circuit model with multimodular interleaved parallel inverters is established. The influences of different factors such as carrier phase shifting, unequal current references, dead time, and unequal inductors on the high-frequency ZSCC (HF-ZSCC) and low-frequency ZSCC (LF-ZSCC) are analyzed in the frequency domain. An interleaved zero vector modulation method is proposed together with a plug-in repetitive controller to suppress HF-ZSCC and LF-ZSCC simultaneously. With the proposed method, parallel modules can be implemented in a self-governing manner, which presents high reliability and scalability. The effectiveness of the proposed scheme is verified by the experimental results.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Investigation of ZVS Criteria and Optimization of Switching Loss in a
           Triple Active Bridge Converter Using Penta-Phase-Shift Modulation

    • Free pre-print version: Loading...

      Authors: Saikat Dey;Ayan Mallik;Akin Akturk;
      Pages: 7014 - 7028
      Abstract: Triple active bridge (TAB) as an isolated multiport dc–dc converter is a promising solution for integrated energy management systems to maintain an efficient power flow between the ports. This article presents the design, modeling, and switching loss optimized phase-duty-controlled PWM modulation scheme of a TAB converter composed of three full-bridge modules and a high-frequency planar transformer. The work aims at the derivation and analysis of the zero-voltage switching (ZVS) conditions for a TAB, where the turn-on switching loss is mitigated along with attaining an improved EMI performance, comprising of reduced noise peaks. Moreover, an optimized five-variable control-based TAB PWM modulation technique is proposed in this article in order to achieve minimized switching loss and the overall system loss for a wide voltage gain and load range. The instantaneous switching currents, responsible for the switching losses at the devices, are derived from the transformer winding current expressions, formulated employing the generalized harmonic approximation (GHA) technique. The various loss minimization techniques and the theoretically obtained criteria for ZVS are experimentally verified using a laboratory-developed prototype of an 800-W TAB converter. With the implementation of the proposed optimal phase-duty control, the experimental results show a nonunity gain light-load efficiency increment up to 10% compared to the conventional phase-shift modulation alone.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • On the Minimum Time Tracking Control of the Active Front End Converters

    • Free pre-print version: Loading...

      Authors: Mohammad Ghadimi;Jalal Nazarzadeh;
      Pages: 7029 - 7036
      Abstract: This article introduces the minimum time tracking control of an active front-end (AFE) converter with excellent transient performance. Since the dynamical model of the AFE converter is a bilinear system, switching control is provided for minimum time tracking with final time-varying trajectories in this system. Due to the complexity of implementing this controller, a suboptimal closed-loop controller is proposed whose dynamic performance is very close to the minimum time tracking control. Simulation and experimental results show that the suboptimal proposed controller has excellent dynamic performance against load disturbances compared with the conventional control methods.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Three-Phase Model-Based Predictive Control Methods With Reduced
           Calculation Burden for Modular Multilevel Converters

    • Free pre-print version: Loading...

      Authors: Na Chai;Wei Tian;Xiaonan Gao;José Rodríguez;Marcelo Lobo Heldwein;Ralph Kennel;
      Pages: 7037 - 7048
      Abstract: Model predictive control (MPC) has been widely investigated in modular multilevel converters (MMCs) due to its superiority in achieving multiple control objectives. The three-phase model-based MPC, which contains the common-mode voltage in the output current dynamic model and considers interaction among phases, shows better performance than the conventional per-phase model-based predictive control in a three-phase MMC system. However, it suffers from a heavy computational burden as the number of submodules (SMs) increases. To address this issue, this article first analyzes the relationship among the numbers of inserted SMs, the controllability of dc-link current, and circulating currents. Then, according to this analysis, two simplified MPC methods based on the three-phase model with reduced computational burden are proposed. Specifically, fewer insertion index combinations are selected in advance to ensure good output currents, controllable dc-link, and circulating currents. The effectiveness of the proposed methods is verified through experimental results.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Comparative Stability Analysis and Improvement of Grid-Following
           Converters Using Novel Interpretation of Linear Time-Periodic Theory

    • Free pre-print version: Loading...

      Authors: Huoming Yang;Malte Eggers;Peter Teske;Sibylle Dieckerhoff;
      Pages: 7049 - 7061
      Abstract: This article presents a comparative stability investigation of grid-following (GFL) converters with different advanced phase-locked loops (PLLs) and current control schemes based on linear time-periodic (LTP) theory. First, a time-domain physical interpretation of the LTP theory is proposed, which inspires an iterative LTP eigenvalue computation algorithm. A measure for the influence of the frequency coupling effect on each eigenvalue is defined to demonstrate the necessity of applying the LTP theory. Then, eigenvalue-based stability analysis is carried out to gain insights into dynamic characteristics of two implementations of GFL converters, namely, dual synchronous reference frame PLL (DSRF-PLL) and proportional integral (PI) current control, and dual second-order generalized integrator PLL (DSOGI-PLL) and proportional resonant (PR) current control. The effects of the PLL bandwidth, the current control time constant, the grid strength, and imbalance on the system stability are evaluated. In addition, a damping loop is proposed to improve the stability margin of GFL converters connected to weak grids. Finally, MATLAB/Simulink simulations and experimental measurements validate the correctness of the proposed modeling method and stability assessment results.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Independent Current Control With Differential Feedforward for Three-Phase
           Boost PFC Rectifier in Wide AC Input Frequency Application

    • Free pre-print version: Loading...

      Authors: Rui Huang;Jianping Xu;Qiang Chen;Lei Wang;Xinghai Geng;
      Pages: 7062 - 7071
      Abstract: Independent current control of the three-phase boost power factor correction (PFC) rectifier with differential feedforward is proposed for wide ac input frequency application. When conventional independent current control with proportional controller (P-controller) is used for digital-controlled three-phase boost PFC rectifier, the time delay of digital control brings phase leading of input currents. Such a phase leading is proportional to the ac input frequency. To achieve high power factor in wide ac input frequency application, differential feedforward is introduced to the input current control in the proposed control strategy to suppress the phase leading of input currents. The analysis and the design of the proposed control strategy are illustrated and a 2-kW experimental prototype is built to verify the analysis results. Experimental results show that the power factor of the three-phase boost PFC rectifier is improved significantly within wide ac input frequency range, e.g., 360–800 Hz. The proposed control strategy achieves satisfied performance when the ac input frequency varies.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Power Control for Grid-Connected Converter Based on Generalized Predictive
           Current Control

    • Free pre-print version: Loading...

      Authors: Petr Šimek;Martin Bejvl;Viktor Valouch;
      Pages: 7072 - 7083
      Abstract: The power control based on the generalized predictive current control (GPCC) applied in the power electronic converter connected to the grid is presented in the article. A design process of the control structure and its parameters and the results of simulation and experimental validation are presented. The power responses to changes in power references and grid failures are shown and discussed. The algorithm works well with the unbalanced grid voltage. Steady-state responses of both powers are oscillation-free for an unbalanced grid, and the network currents remain sinusoidal at the same time. The strategy is also able to ensure that limit values of grid current magnitudes are not exceeded during changes of power references or grid voltage, and responses are fast and smooth at the same time. The combination of these favorable properties, which was not observed with other power control methods, can be assessed as the main benefit of the strategy developed.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Improved Weak Grids Synchronization Unit for Passivity Enhancement of
           Grid-Connected Inverter

    • Free pre-print version: Loading...

      Authors: Xianfu Lin;Yizhang Wen;Ruoxue Yu;Jingrong Yu;He Wen;
      Pages: 7084 - 7097
      Abstract: The weak grids may be unstable due to the negative resistance behavior of the grid-connected inverter (GCI) caused by the synchronization unit with the phase-locked loop (PLL). This article proposes a passivity enhancement method to attain the positive output resistance of GCI in the qq channel. Initially, the impedance decomposition is utilized to reveal the reason for the negative output resistance brought by PLL. Secondly, with decomposed impedance, a novel PLL by adding a prefilter and an impedance phase regulator with a normalized amplitude to the input of traditional synchronous reference frame PLL (SRF-PLL) is proposed. Afterward, the effect of the critical system parameters and GCI operating conditions on the GCI’s passivity is discussed based on the established small-signal impedance model. Theoretical analysis manifests that the proposed PLL does not affect the system’s stability under rectifier mode and brings the passivity of GCI’s output impedance in the qq channel in broad system parameters under inverter mode. Lastly, the experiments are implemented, verifying that using the proposed PLL, the instability caused by the intersection between grid and GCI impedances is removed due to the passivity, and the system can operate at 1.0 per unit (pu) active power reference under the very-weak-grid conditions.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Sideband Vibro-Acoustic Responses and Improvements With Different
           Pulsewidth Modulation Strategies in Permanent Magnet Synchronous Motor for
           Electric Vehicle

    • Free pre-print version: Loading...

      Authors: Zizhen Qiu;Xin Huang;Kai Ma;Zhiguo Kong;Xu Liu;
      Pages: 7098 - 7108
      Abstract: This article presents a comprehensive investigation into the sideband vibro-acoustics with continuous and discontinuous pulsewidth modulation (PWM) strategies in permanent magnet synchronous motor (PMSM). The primary motivation for the evaluation reveals the frequency distributions of the sideband components and the magnitudes suppression with the space-vector PWM (SVPWM) and the discontinuous PWM (DPWM). The principle and implementation of the conventional SVPWM and six basic DPWM modes are firstly presented. The sideband harmonic components are provided by the analytical derivations, in which the frequency distributions are established by coupling the temporal features between the current harmonics and radial electromagnetic force. To evaluate and compare the sideband current harmonics and vibro-acoustic responses among the PWM schemes, the experimental tests are presented in a study case of 12/10 PMSM. Significant deterioration is observed in each of the basic DPWMs compared with that in SVPWM. Developed with periodic dithering modulation, notable sideband harmonics suppression and vibro-acoustic improvements in DPWM schemes are observed. This work is expected to provide a guidance for a hybrid modulation strategy in electric vehicles (EVs).
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Digital Resonant Current Controller for LCL-Filtered Inverter Based on
           Modified Current Sampling and Delay Modeling

    • Free pre-print version: Loading...

      Authors: Đorđe M. Stojić;Tomislav B. Šekara;
      Pages: 7109 - 7119
      Abstract: In this article, a digital resonant current controller is proposed for pulsewidth modulation (PWM) control of an LCL-filtered inverter based on a modified current sampling method and time delay modeling. Since the current sampling technique employed here uses a freely tunable sampling instant within the PWM signal period, a corresponding LCL filter model discretization technique is used based on a modified Z-transform. This is applied to model the fractional delay introduced by the current sampling technique, which uses sampling instants from within the PWM signal period. Modified Z-transform-based delay modeling has not previously been employed for LCL-filtered inverters, although it has been used in inverters with an RL load. The proposed technique is implemented with a fifth-order current controller, which directly controls the power converter ac output current without the need for active damping, as is typical for converters with LCL filters. A method based on pole placement is adopted to tune the controller parameters, in which the positions of all the closed-loop poles of the control system are determined. The responses of the controller to reference and disturbance signals are analyzed through simulation and experimental testing for different sampling instants within the PWM signal period.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • An Advanced Switching Harmonic Cancellation Method for a Dual-Generator
           Power System in More-Electric Aircraft

    • Free pre-print version: Loading...

      Authors: Cheng Wang;Tao Yang;Xiaoyu Lang;Serhiy Bozhko;
      Pages: 7120 - 7132
      Abstract: Dual-generator power systems have attracted increased attention in recent years as it can significantly reduce the fuel assumption of aircraft engines allowing power transfer between different engine shafts. In such a system, two generators supply a common dc bus together. A dc-bus capacitor is required to filter switching harmonics to ensure that the dc-bus voltage satisfies the MIL-STD-704F standard. Due to the high current rating, this capacitor is normally bulky and heavy. This article aims to introduce a switching harmonic cancellation method, which can effectively reduce harmonics at the dc bus. This, in return, will extend the lifetime and reduce the weight of the dc-bus capacitor. With the assumption that power converters connected to the dc bus are modulated with the commonly used space vector pulsewidth modulation (SVPWM) technique, a simplified mathematical model to estimate both first and second switching harmonics is developed. Based on the proposed models, an advanced method of switching harmonic cancellation scheme is proposed through an adaptive phase shift of carrier signals for different power outputs of converters. Both simulation and experimental results are used to validate the proposed model and the suppression method.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Modeling and Control of a Two-Bus System With Grid-Forming and
           Grid-Following Converters

    • Free pre-print version: Loading...

      Authors: Zhixiang Zou;Jian Tang;Xiongfei Wang;Zheng Wang;Wu Chen;Giampaolo Buticchi;Marco Liserre;
      Pages: 7133 - 7149
      Abstract: The utilization of power converters in a distribution network could give rise to stability problems, especially when the penetration is high. The existing literature studies the modeling and stability of converters with specific control or synchronization methods. However, the types or the control schemes of converters are normally different in an actual grid, and moreover, the line impedance plays an important role on the network stability. In this regard, this article aims at studying the modeling and stability issues of a two-bus electric network with both grid-forming (GFM) and grid-following converters. The main purpose is to provide design guidelines and solution of two-bus system with converters for stable operation. The interactions between the converters in various scenarios will be investigated by considering the effect of line impedance. More importantly, a filter-based stabilized control strategy will be proposed for the GFM converters to mitigate the oscillation in the network. Simulation and experimental results are provided to validate the effectiveness of the theoretical analysis and control strategy.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • On-Chip Dynamic Gate-Voltage Waveform Sampling in a 200-V GaN-on-SOI Power
           IC

    • Free pre-print version: Loading...

      Authors: Samantha Kadee Murray;Wan Lin Jiang;Mohammad Shawkat Zaman;Herbert De Vleeschouwer;Peter Moens;Jaume Roig;Olivier Trescases;
      Pages: 7150 - 7161
      Abstract: The continual improvement of GaN-on-Si processes motivates the integration of more complex circuits alongside GaN power devices. Additional transistors can be leveraged to provide control, logic, and protection; however, low-voltage GaN devices consume more power and area than similar CMOS counterparts. This article investigates the feasibility of a monolithic gate-monitoring circuit integrated with a GaN power device and gate driver. The monitoring circuit captures 16 samples within 50 ns during the gate rising transient and stores them in on-chip capacitors. The stored voltages are asynchronously read off-chip through integrated source-follower buffers and a digitally controlled multiplexer. The proposed design incorporates approximately 330 e-HEMT transistors and was fabricated in a 200-V GaN-on-SOI process. A detailed characterization was performed to calibrate the dynamic on-chip gate voltage from the sampled values that are read off-chip, paving the way for future active control based on this feedback. Experimental results and the postcalibration estimate of the on-chip gate voltage highlight that off-chip measurements are poor and pessimistic estimators for the on-chip dynamic excursions. The on-chip gate-voltage waveform was estimated using the sampling circuit while switching the power device at 80 V, 1.5 A, demonstrating more accurate measurements of on-chip signals. This circuit stands as a proof-of-concept for the viability of integrating relatively complex circuits in GaN power ICs to perform critical monitoring and sensing tasks.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • A Novel Isolated Resonant Gate Driver With Adjustable Duty Ratio for SiC
           MOSFET

    • Free pre-print version: Loading...

      Authors: Qiaozhi Yue;Han Peng;Qiaoling Tong;Yong Kang;
      Pages: 7162 - 7176
      Abstract: Resonant gate driver is a promising technique to save gate driver loss at high switching frequencies to further promote the integration level of gate driver with power modules. State-of-the-art isolated resonant gate drivers (RGDs) have to keep duty ratio fixed at 0.5 to avoid transformer saturation, which significantly limits the practical applications. A new isolated RGD (IRGD) with adjustable duty ratio to drive silicon carbide (SiC) MOSFET is proposed in this article by employing switching period expansion technique with a dual-secondary transformer. Transformer secondary windings are involved in the turn-on and turn-off processes alternatively and are switched at the falling edge of each input driving cycle. The effective switching frequency at gate driver transformer is reduced to 1/2 to further save power losses at high switching frequencies. This article further discusses the optimal damping approach to suppress $v_{mathrm {gs}}$ overshoot and oscillation due to an adjacent second driving stage brought by parasitic gate resistor for IRGDs. The proposed IRGD is built with printed circuit board (PCB) integrated planar transformers, designed at leakage inductance of 303 nH with primary-side silicon (Si) devices and secondary bidirectional gallium nitride (GaN) devices. The duty ratio is proven to be adjusted from 0.15 to 0.9. The power consumption of the prototype is 0.883 W at 500 kHz and 1.473 W at 1 MHz driving a 900-V SiC device with 87-nC gate charge, which is $6times $ less power consumed than a conventional gate driver (CGD). The adopted SiC power device achieves dv/dt on of 18 V/ns and dv/dt off of 35 V/ns with the proposed IRGD.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Temporal and Spatial Differences in Thermal Transfer Behavior of IGBTs
           Caused by the Baseplate and Die-Attach Solder Cracking

    • Free pre-print version: Loading...

      Authors: Yongle Huang;Yifei Luo;Fei Xiao;Binli Liu;Xin Tang;
      Pages: 7177 - 7187
      Abstract: Solder cracking hinders the thermal dissipation of insulated gate bipolar transistors (IGBTs) during their long-term servicing. In this work, the evolution of micro-cracks in the baseplate and die-attach solder layers under thermal cycling was first investigated by a proposed finite-element analysis-fatigue damage calculation (FEA-FDC) iterative simulation method. Based on that, a series of 3-D electrothermal coupling IGBT models with various cracked solder layers were obtained. Dynamic degradation in thermal characteristics of IGBTs during solder cracking was quantitatively evaluated. Temporal and spatial differences in thermal transfer behavior of IGBTs caused by baseplate and die-attach solder cracking were comparably discussed under the short circuit (SC), pulse high current (PHC), and pulsewidth modulating (PWM) operating conditions. The results show some significant differences in thermal transfer behavior of IGBT when the baseplate and die-attach solder fatigue. The die-attach solder fatigue remarkably hinders the thermal transfer of IGBTs at a smaller time scale of $500 ~ mu text{s}$ and severely aggravates the non-uniformity in temperature distribution inside IGBT chips. To some extent, the die-attach solder fatigue is a more adverse failure mode of IGBTs compared with the baseplate solder fatigue under various conditions.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Comparative Study of Conducted Common-Mode EMI in WBG-Enabled DC-Fed
           Three-Phase Current-Source Inverter

    • Free pre-print version: Loading...

      Authors: Hang Dai;Renato Amorim Torres;Thomas M. Jahns;Bulent Sarlioglu;
      Pages: 7188 - 7204
      Abstract: In pulsewidth-modulated (PWM) inverters, common-mode (CM) voltage and associated conducted CM electromagnetic interference (EMI) can cause motor bearing failures, ground leakage current, and audio susceptibility issues. When wide bandgap (WBG) devices are used to construct a voltage-source inverter (VSI), the CM EMI issues become more challenging. The current-source inverter (CSI) is an alternative, which produces more sinusoidal output voltage waveforms, making it a promising topology for reducing CM EMI in power converters. However, there is little systematic and comprehensive analysis of CSI’s CM EMI, especially when using WBG devices. The conducted CM EMI generation mechanisms of dc-fed two-level VSIs and CSIs are compared in this article. The analytical derivation and the circuit analysis are performed to identify the CM EMI generation mechanisms in both inverters, including CM voltage sources and the resulting CM current flowing paths. The effects of WBG devices on the CM EMI of both inverters are discussed. New CM EMI equivalent circuits (EQCs) of both inverters are analytically derived to reduce the computational time of full-circuit CM EMI simulation. Different filtering schemes and inverter topology variations’ impacts on CSI’s CM EMI are evaluated using the derived EQC. An effective CM EMI filter is designed to suppress the CSI’s CM EMI to be lower than EMI standards.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Common-Mode Conducted EMI Prediction for Dual Active Bridge Converter
           Based on Unterminated Behavioral Model

    • Free pre-print version: Loading...

      Authors: Rongqiang Zhong;Yong Chen;Zhangyong Chen;Chuang Bi;Anjian Zhou;
      Pages: 7205 - 7213
      Abstract: A dual active bridge (DAB) converter is widely used in electric vehicles due to its advantages of electrical isolation function and bidirectional energy flow. However, compared with other converters, the number of switching tubes is large; the internal structure is complex, and the electromagnetic interference (EMI) at the input and output ends is more serious. In this article, a predictive behavioral model is established to predict the common-mode (CM) conducted EMI on both sides of the DAB converter. First, the converter is treated as a linear two-port network. Second, the impedance of the two-port network in the CM loop is calculated from the extracted S-parameters of the converter. Then, an equivalent model is established to predict the conducted EMI combined with the CM current of the input and output buses. Finally, the proposed model is verified by experiments on a 140-W DAB converter system.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • A Trigger Signals Modification Scheme for Common-Mode Conducted EMI
           Reduction of Modular Multilevel Converter

    • Free pre-print version: Loading...

      Authors: Yihong Huang;Lei Lin;Xiaojie Shi;Tianxiang Yin;Shuxuan Yan;
      Pages: 7214 - 7224
      Abstract: Modular multilevel converter (MMC), due to its features of modularization, high efficiency, and so on, has gradually become the mainstream multilevel converter. However, it can induce large electromagnetic interference (EMI) because of the high-level $dv/dt$ and $di/dt$ during its commutation transient. Therefore, it is significant to analyze the characteristics of common-mode (CM) conducted EMI of MMC and propose a suppression scheme accordingly. In this article, considering the voltage to ground of submodule (SM) as a direct noise source, the relationship between CM current and equivalent noise source of one phase, as well as that between the equivalent noise source of one phase and switching action of each SM are deduced. Furthermore, a trigger signals modification (TSM) scheme is proposed, which can effectively suppress the CM conducted EMI on the dc side without obviously affecting the operating performance of MMC. In particular, this scheme manipulates the trigger signals already generated by the modulation and capacitor voltage balancing control, thus enabling good applicability. Finally, experimental results verify the validity of the analysis and the effectiveness of the proposed TSM scheme.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • A 9- and 13-Level Switched-Capacitor-Based Multilevel Inverter With
           Enhanced Self-Balanced Capacitor Voltage Capability

    • Free pre-print version: Loading...

      Authors: Shirazul Islam;Marif Daula Siddique;Atif Iqbal;Saad Mekhilef;
      Pages: 7225 - 7237
      Abstract: Boost action is required for enhancing the output voltage of the sources such as photovoltaic (PV) sources, fuel cells, and battery storage devices, which eliminates the need for additional units. For this purpose, switched-capacitor (SC)-based multilevel inverters (SC-MLIs) are widely used. The proposed SC-based single-phase MLI is able to produce 13-level output ac voltage and furnishes voltage gains of 3 and 6. The same topology is also able to produce a single-phase nine-level ac output with a voltage gain of 4. The abovementioned voltage levels and voltage gains are achieved using the proposed topology just by modifying the switching strategy used for firing the switches and do not require any modification in the proposed SC-MLI structure. The proposed configuration of single-phase MLI requires less switch count to produce 9- and 13-level ac output voltages with the abovementioned voltage gains. The switches connected in the proposed configuration undergo less voltage stress compared to the MLIs suggested in the literature. The comparison of the proposed converter topology with the existing MLIs reported in the literature is included. The validation of the performance of the proposed inverter is carried out using experimental results captured on a low-power laboratory prototype.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Steady-State Analysis for Modular Multilevel Converters With Considering
           the Modified Arm DC Reference and Average Capacitor Voltage

    • Free pre-print version: Loading...

      Authors: Zhijie Liu;Yu-Chuan Li;Liangzi Li;Zhonglin Guo;Ke-Jun Li;Jinyu Wang;
      Pages: 7238 - 7248
      Abstract: For modular multilevel converters (MMCs), it is generally considered that both the arm dc reference and average capacitor voltage are constant values, which are equal to $U_{mathrm {dc}}$ /2 and $U_{mathrm {dc}}$ /N, respectively. However, it is identified in this article that these two voltages do not have such a simple constant value relationship as claimed in most of the published studies. The research is conducted based on an enhanced MMC model, where a detailed expression describing their relationship is derived with a high precision of 0.02%. Based on the research, some newfound conclusions can be drawn. First, the average capacitor voltage is composed of the well-known major component and the minor component neglected in most of the present studies. Second, the average capacitor voltage has a downtrend with the arm dc reference increasing due to its major component; meanwhile, influenced by the minor component, their exact relationship highly depends on the practical power condition of MMCs. Third, the average capacitor voltage control is requisite for an MMC, but the conventional strategy has negative effects when the MMC provides reactive power for ac systems. Finally, the conclusions in this article were proved through simulations and experiments.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Self-Balanced Clamp-Double Submodule for Modular Multilevel Converter

    • Free pre-print version: Loading...

      Authors: Jinliang Huang;Kaijie Li;Yuanmao Ye;Xiaolin Wang;
      Pages: 7249 - 7260
      Abstract: The modular multilevel converter (MMC) has been widely used in the field of high-voltage direct current (HVDC) transmission and motor drivers due to its many advantages. As voltage sensors and sorting algorithm are often used to depress the voltage fluctuation of submodules (SMs), it suffers from the algorithm complexity and hardware cost, especially for a large number of output levels. In this article, a new clamp-double-SM (CDSM) composed of two capacitors and five transistors is proposed. The symmetrical operation of the two capacitors enables the CDSM to output three levels and their voltages are self-balanced. Moreover, the capacitor voltages among different SMs of a CDSM-based MMC are also self-balanced by adding two auxiliary balance branches between adjacent CDSMs. It means that the new MMC can operate normally without using complex balancing algorithms based on capacitor voltage sorting. Compared with existing self-balanced MMCs, the new MMC uses fewer components in both the main power topology and auxiliary balancing circuits. In addition to topology, modulation, parameter design, and power loss are analyzed in detail. Finally, the feasibility of the CDSM-based MMC is verified by simulation and experimental results.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • A New MPC Formulation Based on Suboptimal Voltage Vectors for Multilevel
           Inverters

    • Free pre-print version: Loading...

      Authors: Zhituo Ni;Ahmed H. Abuelnaga;Yue Pan;Ahmed Elezab;Omar Zayed;Mehdi Narimani;Jose Rodriguez;
      Pages: 7261 - 7270
      Abstract: Different new model predictive control (MPC) formulations have been recently proposed to reduce the real-time computation load, which makes the MPC algorithm promising for multilevel power converters. Unlike the conventional MPC formulation, which searches for the optimal switching state at each sampling time, the existing computationally efficient MPC formulations are to search for the optimal output voltage in the first stage. In the second stage, only the switching state redundancy under this optimal output voltage established in the first stage will be employed to achieve multiobjective. These computationally efficient MPC formulations based on searching an optimal voltage vector are usually validated on the power converter topologies with abundant switching redundancy or without floating capacitors. However, for the emerging topologies with less switching redundancy and floating capacitors, such as the five-level (5L) T-type nested neutral point clamped (T-NNPC) converters topology, the existing computationally efficient formulations based on optimal output voltage vector can lead to potential capacitor control failure due to the sacrificed multiobjective control performance. To address this issue, this article presents a novel MPC formulation based on suboptimal output voltage vectors considering both the system’s multiobjective control performance and computation burden reduction. With the determined suboptimal voltage vectors, a small group of the switching state candidate can be established to improve the system’s multiobjective control performance and efficiency. The proposed MPC formulation is finally validated on a 5L T-NNPC topology.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Analysis of Capacitor Voltage Unbalance in Hybrid MMC and Its Novel
           Operation With Reduced Submodule Capacitance

    • Free pre-print version: Loading...

      Authors: Nallamatti Poornachandra Rao;Anshuman Shukla;
      Pages: 7271 - 7284
      Abstract: The hybrid modular multilevel converter (MMC) consists of both half-bridge submodules (HBSMs) and full-bridge submodules (FBSMs) in the same arm. The negative insertion of FBSMs allows it to generate higher ac output voltages for a given dc-link voltage than a traditional MMC with only positive insertion. However, the negative voltage in an arm forces HBSMs to bypass as they can only generate positive voltage. The higher the negative voltage, the larger is the duration for which HBSMs are bypassed. This results in an unequal distribution of voltage among the submodules, which further leads to unbalance in their capacitor voltages beyond a certain operating point. This article analyses voltage distribution among the submodules to evaluate the limiting operating point of hybrid MMC beyond which capacitor voltages cannot be balanced. Additionally, a novel operation of hybrid MMC is also proposed, where the arm voltage is generated as a sum of fixed negative voltage and a varying positive voltage, such that the average capacitor voltage increases, resulting in a significant reduction of submodule capacitance required to transfer the same power with the same arm energy as that in the conventional operation. The proposed scheme is verified with detailed simulation as well as experimental results.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Power Imbalance Analysis and Neutral Offset Voltage Decoupling Control of
           Nonagonal MMC Applied in FFTS

    • Free pre-print version: Loading...

      Authors: Wenhui Huang;Xiaoming Zha;Fei Liu;Wenjun Liu;Yizhan Zhuang;Yanhui Huang;
      Pages: 7285 - 7296
      Abstract: Nonagonal modular multilevel converter (NMMC) is a three-port ac/ac/ac conversion converter, and it can achieve the connection of two fractional frequency transmission systems (FFTSs) as wind power collection to ac grid. However, the connection of ac grid to low-frequency systems brings challenges to branch power balance, which may cause dc voltage fluctuation of the submodules (SMs). According to the model construction, the relation between power imbalance and dc voltage fluctuation is quantified in this article. Based on branch power balance condition, a neutral offset voltage decoupling control is proposed in this article to address the dc voltage imbalance among the branches and decrease dc voltage fluctuation. The scheme that NMMC is applied in wind power collection and the proposed control is verified by MATLAB/Simulink platform and hardware-in-the-loop (HIL) experiment.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Circulating Current Generating Mechanism and Suppression Control of HMMC

    • Free pre-print version: Loading...

      Authors: Wenhui Huang;Fei Liu;Wenjun Liu;Yizhan Zhuang;Yanhui Huang;Xiaoming Zha;
      Pages: 7297 - 7306
      Abstract: Hexagonal modular multilevel converter (HMMC) is a full-bridge ac/ac converter, and it can achieve the interconnection between the ac grid and the low frequency system. However, the coupling of input and output on the branches causes the large fluctuation both in dc voltage of submodules (SMs) and branch currents. Moreover, the internal circulating current in branch current comprises large dc component and ac components, which causes an increase in current stress. The traditional circulating current control of HMMC adopts circulating current injection for dc voltage stability, which cannot decrease the current stress. Therefore, basing on dc voltage fluctuation analysis, the circulating current generating mechanism is analyzed. According to the influence mechanism of circulating current, a circulating current suppression control (CCSC) is proposed to decrease the current stress. Eventually, the CCSC is verified in the real-time (RT)-lab platform.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • A Single-Stage Bridgeless Rectifier With Virtual Three-Port Network for
           High-Power LED

    • Free pre-print version: Loading...

      Authors: Hanlei Tian;Maolin Chen;Jian Kang;Guozhuang Liang;Xianyong Xiao;
      Pages: 7307 - 7317
      Abstract: This article presents a method to solve the three major problems of bridgeless rectifiers, that is, the existence of output filter units, multistage transformation, and dual-frequency power pulsation without electrolytic capacitors (E-caps). In this article, a virtual port is introduced and integrated with the main circuit. Meanwhile, the sharing of devices greatly reduces redundant devices, especially the high-loss magnetic devices. An excellent switching control scheme ensures adaptability under the decoupling capacitor voltage with a large waveform. Thus, the above-mentioned topology and control strategy provide the possibility to replace E-caps with the film capacitors. Finally, all the excellent performances are proved through an experimental prototype with a rated output power of 100 W.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • A General and Automatic RMS Current Oriented Optimal Design Tool for LLC
           Resonant Converters

    • Free pre-print version: Loading...

      Authors: Yuqi Wei;Thiago Pereira;Yiwei Pan;Marco Liserre;Frede Blaabjerg;H. Alan Mantooth;
      Pages: 7318 - 7332
      Abstract: LLC resonant converters are used in renewable energy applications to achieve high power efficiency conversions between different energy sources, buses, and energy storage elements. The traditional design methods for LLC resonant converters are based on a simple frequency-domain analysis (FDA). However, the accuracy of FDA is not satisfactory, especially at wide voltage range applications. To overcome the drawbacks of the traditional FDA method in wide-range applications, in this article, the time-domain analysis (TDA) is adopted to achieve accurate analysis of LLC converters. Efficiency is normally selected as the optimization objective, where the circuit components and accurate power loss models are required beforehand. To achieve a more general optimal design method for LLC converters, a simple root-mean-square (rms) current and TDA-based optimal design method is proposed. The optimal design is achieved by minimizing the converter rms current and ensuring some key design considerations. Moreover, an automatic design tool for the proposed rms-current-based optimal design method is developed, and advanced optimization algorithms are introduced to improve the optimization speed. A 2.5-kW experimental prototype is built using the optimal circuit parameters. Experimental results under different operating conditions are demonstrated, and the results are consistent with the theoretical analysis. Efficiency comparisons between the proposed optimal design method and conventional design method are made. The proposed optimal design method can improve the converter efficiency by a maximum value of 2.14%.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Modeling and Control of Quasi-Parallel Sigma DC–DC Converter for
           Single-Stage 48-V Voltage Regulator

    • Free pre-print version: Loading...

      Authors: Limin Yu;Shen Xu;Lingyun Li;Yugeng Wu;Chenxi Yang;Longxing Shi;Weifeng Sun;
      Pages: 7333 - 7345
      Abstract: With the improvement of data center processing performance, the voltage regulator module (VRM) structure of 48-V bus is being proposed more and more to improve the system efficiency and to reduce the cost of data center. For a 48–1.8-V VRM, a quasi-parallel configuration, the sigma converter, is shown to have a peak efficiency of 95.2% and a power density of 700 W/in3 [16]. In order to accurately compensate the design of the sigma converter to meet the VRM requirements, a decoupling method is proposed in this article to construct a small-signal model of a quasi-parallel structure according to the interaction characteristics of duty cycle, output voltage, and input floating-point voltage during sigma operation. Based on this decoupling model, precise analytical expressions for various transfer functions are derived, such as control-to-output and output/input impedance, whose Bode plots are highly consistent with those in SIMPLIS simulation. In order to make the derived transfer function easy for compensation design, the control-to-output transfer function is simplified to standard zero-pole form. A voltage mode control design is provided and verified through the prototype verification board of sigma structure. Tests show that the compensation design based on the derived transfer function can achieve voltage regulation under different loads.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • A High Step-Up Coupled-Inductor-Integrated DC–DC Multilevel Boost
           Converter With Continuous Input Current

    • Free pre-print version: Loading...

      Authors: Xinping Ding;Mingzhu Zhou;Yichang Cao;Benyang Li;Yuliang Sun;Xuefeng Hu;
      Pages: 7346 - 7360
      Abstract: A high step-up converter for interfacing renewable energy generation is proposed. The converter is composed of a modified quasi-Z-source network, a three-winding coupled inductor, and an $m$ -layer stacked switched capacitor. The proposed converter regulates the output voltage using turn ratios ( $n_{1}$ and $n_{2}$ ) of the coupled inductor, stacked layers $m$ of the switched capacitor, and duty cycle $D$ . The converter possesses the advantages of high voltage gain, continuous input current, the low voltage stress on the switch $S$ , passive clamping circuits, and high efficiency. Essentially, the integration of a three-winding coupled inductor and stacked switched capacitor enhances the voltage gain of the converter. Owing to the low voltage stress on the switch, MOSFET with low ON-resistance can be adopted to reduce the switching and conduction losses. The low input current ripple prolongs the lifetime of the renewable energy module. In addition, the passive clamp circuit recycles leakage inductance energy and limits switch voltage spike. The expansion of stacked switched-capacitor layers can be effectively utilized to further optimization of the high-voltage-gain converter. A detailed analysis of the operating principle and the steady-state analysis are presented. Finally, the converter is verified by a 200-W prototype, and the experimental results are in good agreement with the theoretical analysis.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • New PWM Strategy to Enable Dual-Mode Operation Capability in
           Common-Grounded Transformerless Inverters

    • Free pre-print version: Loading...

      Authors: Md N. H. Khan;S. U. Hasan;Yam P. Siwakoti;
      Pages: 7361 - 7370
      Abstract: A novel pulsewidth modulation (PWM) technique has been presented in this article, which enables the converter to operate in the conventional (boost) mode as well as in the buck mode (proposed). The proposed buck PWM method significantly reduces the current stresses of the components compared to the boost mode. Using this combined modulation technique, a dual-mode operation of such a class of inverters is demonstrated to accommodate a wide input voltage variation while maintaining the regulation of the output ac voltage. The proposed modulation technique is simple to implement and has been implemented in some of the conventional Type-I and Type-II inverters to demonstrate a very wide input voltage range (200–400 V dc), while keeping a fixed output voltage of 110 V ac rms. The theoretical analysis, key operating circuit, and waveforms are presented along with the thermal profile of various switches. Experimental results show that Type-I and Type-II inverters rated at 500 VA have around $95.5~pm ~1$ % efficiency for a wide load range with a peak efficiency of 97.3% in buck * invert mode for Type-I and 95.5% for Type-II inverters.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Input Impedance Modeling and Experimental Validation of a Single-Phase PFC
           in the D-Q Frame

    • Free pre-print version: Loading...

      Authors: Qing Lin;Bo Wen;Rolando Burgos;Xiong Li;Qiong Wang;Xin Li;
      Pages: 7371 - 7384
      Abstract: This article models and characterizes the input impedance of a single-phase totem-pole power factor correction (PFC) converter in a virtual synchronous reference (d-q) frame. Due to the dc voltage controller, its d-d channel impedance behaves like a negative resistor, and the cascaded dc–dc converter load reduces its gain and phase at low frequency. Both are detrimental to system stability. The proposed impedance model can be employed to analyze instability issues. As examples, the low-frequency stability of a single-phase and a three-phase four-wire system is analyzed using the model. It is found that the single-phase system will confront the issue of settling to an operating point before any small-signal instability occurs. Whereas in a four-wire system, high neutral line inductance or high dc voltage control bandwidth could lead to small-signal instability. The impedance modeling results are validated by experiments.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Novel Three and Four Switch Inverters With Wide Input and Output Voltage
           Range for Renewable Energy Systems

    • Free pre-print version: Loading...

      Authors: Ashraf Ali Khan;Mohsin Jamil;Usman Ali Khan;Irfan Khan;Wilson Eberle;Shehab Ahmed;
      Pages: 7385 - 7396
      Abstract: The proposed inverters receive input dc voltage in a wide range and generate output ac voltage in a wide range due to their buck–boost ability. They require only three or four active switches and two inductors. Therefore, the circuit topologies and their operation are simple, and control is easy. The output current of the proposed inverters is continuous, which lowers the output harmonics and filtering capacitor. In the proposed inverters, the output and input voltage sources or capacitors share the same ground, which results in a constant common-mode voltage and negligible leakage current. Of the proposed inverters, an inverter with four active switches and double input voltage sources is analyzed and tested in detail. The circuit operation is discussed, a control strategy is developed, a common-mode voltage analysis is presented, and design guidelines for circuit components selection are given. To verify the theoretical analysis, a 500-W, 40-kHz prototype of the proposed four-switch inverter is designed, fabricated, and tested. An output ac voltage of 110 $text{V}_{mathrm {rms}}$ is generated from an input dc voltage of 100–200 V. A peak efficiency of 97.5% is obtained. The proposed inverter obtains high efficiency due to simple circuit operation, few circuit components in the conduction path, and switching of only one switch at high frequency.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Improved On-Chip Inductor Design for Fully Integrated Voltage Regulators

    • Free pre-print version: Loading...

      Authors: Amin Meshkat;Rasoul Dehghani;Hosein Farzanehfard;S. Ali Khajehoddin;
      Pages: 7397 - 7409
      Abstract: This article presents a simple procedure to optimally design an on-chip spiral inductor, which is normally a major challenge in fully integrated voltage regulator (FIVR) applications. To develop the design method, a simplified model is proposed and evaluated that describes the inductance and resistance values of an on-chip spiral inductor according to its geometric properties. Maximizing the quality factor -based on the inductor total resistance- and minimizing the power loss -based on the inductor total resistance and its current waveform- in the minimum possible chip area are two different goals that are achieved. Two design methods are presented to provide optimal geometric specifications of the on-chip inductor. The design methods are simple and do not require complex simulation iterations. In addition, 3-D electromagnetic simulation is used to extract the characteristics of the designed on-chip spiral inductors to perform comparisons and the verification of the effectiveness of the proposed design methods.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • A Single-Phase Switched-Capacitor Nine-Level Inverter With Reduced
           Capacitance

    • Free pre-print version: Loading...

      Authors: Zhuyu Xun;Hongfa Ding;Zhou He;Wentao Zhou;Yue Zheng;
      Pages: 7410 - 7421
      Abstract: A novel nine-level switched-capacitor multilevel inverter (SCMLI) with reduced capacitance and balanced capacitor voltage is proposed in this article. Utilizing only two capacitors, the proposed SCMLI can boost the input voltage and realize nine output voltage levels under different kinds of load conditions. The controllable capacitor charging speed in the proposed SCMLI depends on the charging resonant inductor rather than the equivalent resistance of the devices in conventional topologies. The two capacitors can be charged or discharged independently by a dc source when their voltages deviate from the rated voltage. This makes the proposed SCMLI free of the capacitor voltage imbalance. The longest discharging time (LDT) of capacitors is reduced to twice the switching period, which contributes to reduced capacitance in the proposed SCMLI. With the required capacitor voltage ripple, the quality of output waveforms is also very high. A comprehensive comparison with previous SCMLIs in terms of capacitance, the voltage imbalance problem, the output voltage level, and so on is conducted to validate the merits mentioned above. The theoretical analysis, the simulation, and experiment results are accordant, confirming the feasibility of the proposed SCMLI.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Isolated Boost Type Resonant Converter With Fixed Frequency PWM and
           Load-Independent Voltage Gain

    • Free pre-print version: Loading...

      Authors: Jingtao Xu;Yao Sun;Guo Xu;Mei Su;
      Pages: 7422 - 7432
      Abstract: This article proposes an isolated boost type resonant converter (IBTRC) with fixed frequency pulsewidth modulation (PWM), which has load-independent gain characteristics. Only one magnetic component and two active switches are used in the proposed IBTRC. Therefore, compared with the two-stage converter and the current-fed resonant converter (CFRC), the number of magnetic components and switches of the proposed IBTRC is reduced. Moreover, with the proposed modulation, the converter obtains the benefits of load-independent voltage gain characteristics. Under wide load and voltage range, all switches can realize zero-voltage switching (ZVS) and all diodes can realize zero-current switching (ZCS). The operation mode, characteristics, and parameters design process of the proposed solution are also described in detail. Finally, a 600-W prototype is built to verify the validity and the advantages of the proposed scheme.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Suppression of Eddy Current Loss in Multilayer NiFe-Polypyrrole Magnetic
           Cores Fabricated Using a Continuous Electrodeposition Process

    • Free pre-print version: Loading...

      Authors: Jun Beom Pyo;Xuan Wang;Minsoo Kim;Hanju Oh;Robert Kauffman;Mark G. Allen;
      Pages: 7433 - 7440
      Abstract: Metallic magnetic alloys are of interest as core materials in ultracompact or integrated inductors and transformers. However, when operated at high frequencies, such materials should comprise a multilayer stack of magnetic material laminations and electrically insulating interlayers to suppress eddy current loss. To achieve scalable and continuous fabrication of such a structure, sequential multilayer electrodeposition is an attractive approach. To achieve sequential electrodeposition, interlayer’s electrical conductivity should be sufficiently high to permit electrodeposition of subsequent layers, but sufficiently low to suppress eddy current loss. Polypyrrole, an electrodepositable polymer, was investigated as an interlayer material. Finite element modeling demonstrated a negligible difference in eddy current loss between NiFe/polypyrrole and NiFe/vacuum multilayers. Experimental verification of the efficacy was demonstrated as well. Compared with a single-layer NiFe inductor that has a comparable low-frequency (10 kHz) inductance value, a laminated ten-layer NiFe core showed higher inductance retention (88% of the low-frequency inductance for the laminated core versus 21% for the single-layer core) and lower ac resistance (1.68 versus $12.7~Omega $ ) at 8 MHz, both of which are signs of suppressed eddy current. This scalable fabrication approach to high-frequency inductors will facilitate power converter miniaturizations.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • An Accurate Calculation Method of Leakage Inductance of High-Frequency
           Transformer With Litz Wire Winding Considering Irregular Region

    • Free pre-print version: Loading...

      Authors: Hao Yin;Jidong Lai;Sheng Ren;Jianhui Su;Xiang Yu;Kun Ma;
      Pages: 7441 - 7451
      Abstract: The leakage inductance of a high-frequency transformer affects the operating mode and performance in dc/dc converters, so it is necessary to calculate the leakage inductance accurately. In the existing analytical calculation methods of leakage inductance of high-frequency transformers with Litz wire winding, the nonarea-equivalent high-frequency analytical method is applied to calculate leakage inductance. However, the calculated leakage inductance value is lower than its actual value due to the neglect of the irregular region between turns. In order to improve the calculation accuracy, this article proposes an analytical calculation method of leakage inductance for the high-frequency transformer with Litz wire winding, which considers the irregular region between turns. The 2-D magnetic field distribution in the transformer window and attenuation caused by high-frequency effects on magnetic field energy are analyzed and applied in this proposed method, to take the energy stored in the irregular region between turns into account indirectly. Thus, the proposed analytical expression for leakage inductance is derived correspondingly. Finally, the accuracy of the proposed method is verified by simulations and experiments. The results indicate that the relative error of calculating leakage inductance can be reduced from 16.25% to 3.79% by the proposed method within a certain range of wire densities.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • A Novel PCB-Embedded Coupled Inductor Structure for a 20-MHz Integrated
           Voltage Regulator

    • Free pre-print version: Loading...

      Authors: Feiyang Zhu;Qiang Li;
      Pages: 7452 - 7463
      Abstract: As power demands of processors in portable electronics continuously grow, the voltage regulator (VR) for the processor is expected to be efficient and miniaturized. Compared with a discrete VR solution, the integrated voltage regulator (IVR) can be placed very close to the processor to support dynamic voltage and frequency scaling, which helps significantly reduce the power consumption of the processor. One of the major challenges for IVRs is the high-frequency inductor development. This article proposes a novel, negative-coupled inductor structure with a simple core structure. The coupling coefficient of the proposed structure can be adjusted by changing the inductor winding pattern without modifying the magnetic core structure. The method for adjusting the coupling and the flux distribution in the magnetic core are analyzed in detail. A multiphase integrated inductor is proposed to further enhance the inductor performance by flux cancellation. A printed circuit board (PCB)-embedded four-phase inductor is designed, manufactured, and tested at 20 MHz. The device integrates four inductors into a single-piece magnetic core, featuring an inductance density of 9.7 nH/mm3, a dc resistance (DCR) of 3.1 $text{m}Omega $ per phase, and a thickness of 0.54 mm with high current-handling ability.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Multiobjective Vector Modulation for Improved Control of NPC-Based
           Multi-Source Inverters in Hybrid Traction Systems

    • Free pre-print version: Loading...

      Authors: Emanuele Fedele;Andrea Cervone;Ivan Spina;Diego Iannuzzi;Andrea Del Pizzo;
      Pages: 7464 - 7474
      Abstract: The concept of a multi-source inverter (MSI) based on NPC topology was recently introduced for hybrid-electric powertrains to connect several dc sources to the traction load in a single conversion stage without magnetics. This work proposes a new modulation algorithm that integrates the tasks of dc currents and ac voltages control at the level of pulsewidth modulation by means of the space-vector formalism. The proposed algorithm allows the MSI to have full control of the dc input currents and fundamental ac output voltages, and enables a higher number of feasible operating modes, including load power sharing between sources and controlled recharging of one source from the other, both in motion and at standstill. Hence, improved control capability of the load and sources is achieved with respect to the state-of-literature modulation approach. To validate the proposed modulation under different operating conditions, steady-state and dynamic tests are performed on a small-scale traction system fed by a primary dc supply and a battery pack. The results are compared with those of the baseline control approach and show that the proposed technique improves the smoothness and flexibility of the control action and reduces the distortion of currents and voltages while ensuring the same converter efficiency.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Characterization and Selection of Probability Density Function in a
           Discrete Random Switching Period SVPWM Strategy

    • Free pre-print version: Loading...

      Authors: Yu Wang;Jian Liu;Ticao Jiao;Mengyuan Wang;Guiling Mo;
      Pages: 7475 - 7485
      Abstract: Aiming at suppressing the switching frequency harmonics in the integrated permanent magnet synchronous motor (PMSM) systems, a discrete random switching period (DRSP) space vector pulse width modulation (SVPWM) technique is proposed in the present study. In the proposed DRSP-SVPWM technique, the switching period is randomized according to a predefined frequency sequence. Accordingly, the narrow-band harmonics of the switching frequency are extended to a wider range. Then, a mathematical correlation between the probability density function and the harmonic distribution is established. Moreover, the effects of discrete uniform and beta distributions on the harmonic spreading are studied. Based on the proposed DRSP-SVPWM technique, the mathematical expression of the harmonic power spectrum is derived, demonstrating the intrinsic dependency between the discrete random factor and the harmonic energy distribution. Finally, a series of simulations and experimental results are compared to evaluate the performance of the proposed technique. The present study is expected to provide a theoretical basis for the design and selection of discrete frequency sequences. Meanwhile, it provides a reference to investigate the random SVPWM and improve noise and electromagnetic interference in power converters.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Torque Ripple Reduction Strategy for Doubly Salient Electromagnetic
           Machine Based on Current Given Function

    • Free pre-print version: Loading...

      Authors: Lei Xiong;Hongjuan Ge;Bo Zhou;Kaimiao Wang;Siyuan Jiang;Xingwei Zhou;Hongjun Shi;
      Pages: 7486 - 7501
      Abstract: Torque ripples caused by the particular doubly salient structure of the doubly salient electromagnetic machine (DSEM) restrict its application in the field requiring high performance. This article employs the current given function (CGF) to propose a torque ripple reduction strategy for DSEM to enhance the torque capability. The optimal current profile for minimizing the copper loss is obtained based on the theoretical analysis. It is found that the obtained three-phase currents are distributed according to the phase torque coefficient that represents the torque capability of each phase. Then, to minimize the torque ripple and copper loss, four CGFs are proposed to distribute the reference current of each phase according to the torque characteristics of DSEM. Finally, the influence of overlap angle on the proposed strategy is analyzed to select the reasonable CGF and overlap angle under different operating conditions through simulation, improving the current tracking performance and torque–ampere ratio. The simulation and experimental results demonstrate the effectiveness of the proposed strategy in suppressing torque ripple and improving the torque–ampere ratio.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Error Self-Calibration of Phase Current Reconstruction Based on Random
           Pulsewidth Modulation

    • Free pre-print version: Loading...

      Authors: Yongpeng Shen;Di Liu;Pu Liu;Xiaoliang Yang;Xiaofang Yuan;
      Pages: 7502 - 7513
      Abstract: Three-phase current is the cornerstone parameter in vector control. Restricted by minimum sampling time of the traditional space vector pulsewidth modulation (PWM), the problem of immeasurable areas (IAs) exists in one dc bus current sensor (ODBCS) three-phase current reconstruction. In addition, affected by actual conditions such as temperature drift, aging, and noise, the problem of offset error (OE) in the three-phase current sampling path is the essential factor that restricts the sampling accuracy. This article is the first to investigate the influence of IAs and OE of ODBCS on the reconstructed current. An error self-calibration (ESC) random PWM reconstruction strategy is proposed, which is self-detection and self-calibration of current OE accomplished by dual sampling of the complementary nonzero vector dynamic current. The proposed ESC of phase current reconstruction based on random PWM does not require the insertion of redundant voltage vectors and major computation and is not limited to a particular PWM technology. The experimental results verify the accuracy and practicability of the proposed method.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Closed-Loop Voltage Control for Maximizing Inverter Output Voltage in the
           Field Weakening Region of Induction Machines

    • Free pre-print version: Loading...

      Authors: Hamidreza Gashtil;Volker Pickert;David John Atkinson;Mohamed Dahidah;Damian Giaouris;
      Pages: 7514 - 7526
      Abstract: It is desirable in induction motors drives to maximize the inverter output voltage to increase the output torque and power in the field weakening (FW) region. Existing FW control methods produce high torque ripples and show high step reductions of the $d$ -axis current during the transient period from constant torque (CT) to FW. In addition, many proposed controllers are difficult to tune and require specific control algorithms to deal with parameter sensitivities. In this article, a closed-loop voltage control method is developed based on the $d$ -axis reference current to maximize the voltage extraction from dc-link voltage while minimizing the above disadvantages. This is achieved by applying the proposed $d$ -axis current, which compensates the difference between the hexagonal reference voltage and stator voltage for corresponding stator voltage vector position. Therefore, the output torque and power of the induction machine (IM) are maximized in the FW region. The proposed method is first presented analytically, and then, simulation and experimental results are included to verify the control method.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • A Multivector-Based Model Predictive Current Control of PMSM Drive With
           Enhanced Torque and Flux Response

    • Free pre-print version: Loading...

      Authors: M. L. Parvathy;Thippiripati Vinay Kumar;
      Pages: 7527 - 7538
      Abstract: Model predictive current control (MPCC) is a modern current control technique with the provision to include multivariable objectives and nonlinearities. In this article, a multivector-based MPCC is proposed for the speed control of a two-level voltage source inverter (VSI) fed permanent magnet synchronous motor (PMSM) drive, to improve the steady-state (SS) torque and flux response. The multivector operation is obtained using an extended control set (ECS) that utilizes two adjacent-active voltage-space vectors (VSVs) with an appropriate distribution coefficient. However, the augmentation of the control set (CS) catalyzes an undesirable increase in the computational burden. To address this limitation, a lookup table-based VSV preselection scheme based on stator current error is employed. The VSV grouping is based on the gradient of stator current error and effectively replicates the control scheme with all ECS-VSVs. Subsequently, the amplitude of the selected optimum ECS-VSV is optimized using an average error minimization technique. The optimum duration of the ECS-VSV is determined without employing space vector modulation (SVM). Hence, the complexity of the proposed scheme is minimized, and the SS torque and flux performance are enhanced without compromising the dynamic performance of the drive. The effectiveness of the proposed scheme is verified by conducting comprehensive comparisons with conventional MPCC and recently published literature.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • A Fault-Tolerant Inverter Circuit to Generate Thirteen-Level 24-Sided
           

    • Free pre-print version: Loading...

      Authors: Prashant Surana;Mriganka Ghosh Majumder;Rakesh Resalayyan;K. Gopakumar;Loganathan Umanand;Dariusz Zielinski;
      Pages: 7539 - 7548
      Abstract: An inverter circuit to generate a 13-level 24-sided polygonal voltage space vector structure (VSVS) comprised of 288 real active vectors and a zero vector is proposed in this article. The proposed scheme eliminates lower order harmonics up to 19th order and suppresses higher order harmonics from motor phase voltage in the full modulation range. The 48-step operation of the proposed scheme highly improves phase voltage quality at full speed. The dc bus utilization of the proposed scheme is improved to 99.42% compared to 90.6% multilevel hexagonal VSVS. The proposed topology has inherent capacitor balancing in every sampling interval at any loading condition using pole voltage redundancies. Multilevel property of the proposed scheme reduces instantaneous error in phase voltage compared to two-level 24-sided polygonal VSVS. Generation of real active vectors reduces instantaneous error in phase voltage and reduces switching frequency compared to switched average techniques existing in the literature. Fault-tolerant feature of the proposed scheme improves the availability of the drive system. Experimental results are provided to validate the steady-state operation, capacitor balancing, transient performance, and fault-tolerant capability of the proposed scheme. The comparison of switching loss and harmonic performance of the proposed scheme is performed with existing topologies.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Adaptive Finite-Time Backstepping Sliding Mode Control for PMSM System
           With Backlash

    • Free pre-print version: Loading...

      Authors: Peng Zhang;Yong Chen;Zhi Wan;Wei Zhang;
      Pages: 7549 - 7559
      Abstract: The rapid tracking stabilization problem of the servo system with gear backlash and unmatched unknown disturbance is investigated. In this article, a novel finite-time sliding mode surface with a faster convergence rate is proposed to improve the anti-interference of the gear transmission servo system. This surface not only can adaptively and dynamically regulate the integral capability together with disturbances and tracking error variations, but also does not create singularity issues. An adaptive fixed-time reaching law (AFTRL) is proposed, which performs a faster convergence rate and chattering-free performances. The adaptive mechanism ensures the continuous property of the control output and dynamically regulates the fixed-time convergence rate regardless of initial states. The dSPACE platform is employed to validate the excellent tracking performance of the gear transmission servo system.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Cooperative Predictive Position Control of Dual-Motor System

    • Free pre-print version: Loading...

      Authors: Feng Niu;Meng Yang;Lijuan Ma;Shaopo Huang;Lijian Wu;Dequan Zhang;Youtong Fang;
      Pages: 7560 - 7568
      Abstract: A cooperative predictive position control (CPPC) method for dual-motor system is proposed in this article to improve the synchronization performance, tracking performance, and rapidity. The prediction model for dual-motor system is established to predict future behavior of motor, and the position synchronization error is introduced into cost function to establish algorithm-level connection between motors to improve the synchronization performance. The motor operation process is divided into acceleration stage, constant speed stage, deceleration stage, and position approaching stage, and the adaptive adjustment method of weight coefficient is proposed for different motor operation stages to realize multivariable collaborative optimization control. The experimental results of the proposed CPPC method are presented to verify its effectiveness and superiority.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Decoupling Control of Triple Active Bridge-Power Flow Controller in Meshed
           Bipolar DC Distribution Grids

    • Free pre-print version: Loading...

      Authors: Jianquan Liao;Chunsheng Guo;Dalu He;Niancheng Zhou;Qianggang Wang;Yuhong Wang;
      Pages: 7569 - 7580
      Abstract: Due to the lack of freedom in power flow (PF) control of the meshed bipolar dc distribution grid, the PF of some lines becomes uncontrollable. Besides, there is a coupling between the poles due to the unbalanced current and line resistance, which may deteriorate the dynamic performance of the control system. To solve the above problems, this article proposes an unbalanced PF regulation methodology based on a triple active bridge-power flow controller (TAB-PFC) and studies the decoupling control of TAB-PFC. This article analyzes the influence of receiving-end voltage on positive and negative PF and line losses. The expressions of output voltage and line current of TAB-PFC under constant power control are also derived, and the small-signal model of a meshed bipolar dc distribution grid with TAB-PFC is established. On this basis, the decoupling matrix is introduced between the positive and negative control loops to improve the dynamic performance of the control system. A simulation model of meshed bipolar dc distribution grid with TAB-PFC is established in MATLAB/Simulink, and an experimental platform is built. The simulation and experimental results verify the effectiveness of TAB-PFC in restraining unbalanced PF and the effectiveness of the decoupling matrix.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • A Bi-Sliding Mode PI Control of DC-Link Voltage of Three-Phase Three-Wire
           Shunt Active Power Filter

    • Free pre-print version: Loading...

      Authors: Zicheng Li;Mingwei Ren;Zhaoling Chen;Guohai Liu;Dali Feng;
      Pages: 7581 - 7588
      Abstract: A novel bi-sliding mode PI control (bi-SMPIC) of the dc-link voltage of a three-phase three-wire shunt active power filter (APF) is proposed in this article. One SMPIC having an improved reaching law function in the reaching phase can make the speed of the state variables reaching the sliding surface approach zero. The other SMPIC possessing an improved reaching law function with a boundary layer in the sliding phase can render the state variables asymptotically stable at the origin of the sliding surface. Thus, the proposed bi-SMPIC can effectively reduce system chattering. Moreover, it is proven that the system has reachability and asymptotic stability. Further, a formula for determining the PI control parameters is obtained. From the formula, the proposed bi-SMPIC can have ideal control effects in both the reaching phase and the sliding phase. Finally, the high control performance of the bi-SMPIC is confirmed by both experimental and simulation results.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Bidirectional AC–DC Modular Multilevel Converter With Electric Spring
           Functions for Stabilizing Renewable AC Power Grid at the Distribution
           Voltage Level

    • Free pre-print version: Loading...

      Authors: Hin Sang Lam;Huawei Yuan;Siew-Chong Tan;Chunting Chris Mi;Josep Pou;S. Y. R. Hui;
      Pages: 7589 - 7600
      Abstract: Bidirectional ac–dc power converters are essential in emerging smart grids with increasing renewable energy penetration. This article presents a bidirectional ac–dc power converter system comprising modular multilevel converters (MMCs) and dual active bridges (DABs) with medium-frequency transformer isolation designed for linking an ac distribution voltage of 6.6 kV to a dc grid of 800 V for future electric vehicle (EV) charging infrastructure. The novel contributions include: 1) a modular method to power EV charging infrastructures in multistorey carparks without mains-frequency transformers and 2) the incorporation of a front-end control with electric spring (ES) functions that enable the dc power grid with battery energy storage to interact dynamically with the ac power grid at the distribution voltage level to achieve instantaneous power balance and hence system stability. The long-term aim is to use large EV charging infrastructures to stabilize increasing intermittent renewable energy via the proposed ac–dc converter, consequently accelerating the adoption of large-scale renewable energy and EV as a complementary solution to combat climate change. This article focuses on the bidirectional ac–dc converter of this overall idea based on the MMC and DAB technologies as an example. Results on the power converter operation level and ac microgrid level are included.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Battery Storage System as Power Unbalance Redistributor in Distribution
           Grids Based on Three Legs Four Wire Voltage Source Converter

    • Free pre-print version: Loading...

      Authors: Marco Stecca;Thiago Batista Soeiro;Anand Krishnamurthy Iyer;Pavol Bauer;Peter Palensky;
      Pages: 7601 - 7614
      Abstract: This article discusses the application of battery energy storage systems (BESSs) as power redistributors in three-phase distribution grids as an add-on functionality to typical BESS applications, such as congestion management and energy arbitrage. Combining those ancillary services into a single power unit is not yet performed in practice but may constitute an emerging business opportunity to increase the BESS revenues. The unbalanced operation of the BESS voltage source converter (VSC) leads to the circulation of low-frequency current harmonics in the dc-link through the capacitors and the battery cells. Therefore, it is particularly interesting whether relatively large 50- and 100-Hz currents can safely circulate within these components. Analytical modeling and design guidelines for the dc-link of a three-leg four-wire two-level VSC operating under unbalanced loads are detailed. Furthermore, a low-power VSC prototype is used to demonstrate the working principle of the BESS, providing power unbalance redistribution and symmetric power exchange. Additionally, the ICR18650-26F Lithium-ion cells are cycled to reach end-of-life with different current profiles and C-ratings. The analysis shows that charging with a 100 Hz ripple superimposed to the dc current leads to a 10% increment in degradation.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • A Novel Gate-Controlled Dual Direction SCR With Enhanced Failure Current
           for On-Chip ESD Protection of Industry-Level Controller Area Network Bus

    • Free pre-print version: Loading...

      Authors: Yang Wang;Zeyu Zhong;Xiangliang Jin;Yan Peng;Jun Luo;Jun Yang;
      Pages: 7615 - 7626
      Abstract: The working environment of the industry-level high-voltage communication bus is harsh. Strong electrostatic interference has become one of the key factors affecting the stability of the core module. However, the traditional silicon-controlled rectifier (SCR) is difficult to meet the electrostatic discharge (ESD) design requirements for high-voltage applications. Therefore, this article proposes a novel enhanced gate-controlled dual-direction SCR (EGC-DDSCR) with a high failure current, which can effectively ensure the ESD reliability of the controller area network (CAN) bus. By comparing the ESD performance of EGC-DDSCR, traditional gate-controlled DDSCR (GC-DDSCR), and double-GC-DDSCR (DGC-DDSCR), the physical behavior of the gate control mechanism is explored. Three types of SCR are designed based on a 0.18- $mu text{m}$ BCD process. According to the physical principles of devices, 2-D electrical simulation and transmission line pulse (TLP) test results predict and verify the ESD parameters of the SCRs. The results show that EGC-DDSCR ( $0.64~Omega$ ) has a smaller ON-resistance ( $R_{mathrm{scriptscriptstyle ON}}$ ) and higher robustness than GC-DDSCR ( $0.98~Omega$ ) and DGC-DDSCR ( $0.90~Omega$ ). In addition, the trigger voltage ( $V_{t1}$ :42.7 V), holding voltage ( $V_{h}$ :31.0 V), and failure current ( $I_{t2}$ :16.7 A) of the device fully meet the ESD window of the target chip. EGC-DDSCR c-n be stably applied to CANL and CANH interfaces for on- chip bidirectional ESD protection.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • A New Fault-Tolerant Scheme for Switch Failures in Dual Active Bridge
           DC-DC Converter

    • Free pre-print version: Loading...

      Authors: Priya Singh Bhakar;Kalaiselvi Jayaraman;
      Pages: 7627 - 7637
      Abstract: The dual active bridge (DAB) dc-dc converter is widely investigated for applications such as solid-state transformers (SSTs), battery energy storage systems, and electric vehicle (EV) chargers. Failures in active devices of the DAB can cause reduced terminal voltages or uncontrollable currents eventually leading to converter disconnection. The above-mentioned consequences cannot be corrected by disabling the complementary switches of the faulty leg or reconfiguring the full-bridge (FB) DAB to a half-bridge (HB) DAB topology. In this article, a new fault-tolerant (FT) approach is proposed that works for both short-circuit (SC) or open-circuit (OC) failures in the active devices of the DAB dc-dc converter. Parallel combination of a fault-tolerant capacitor and a fast acting fuse, known as fault-tolerant unit, is connected in series with the primary as well as secondary of the transformer. Once the fault is detected, the output voltage is boosted to its pre-fault value through the incorporation of fault-tolerant capacitors along with variation in control parameters, ensuring the continuity of operation. The proposed post-fault reconfiguration scheme is validated experimentally using a 1 kW, 250 V DAB prototype.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Lifetime Prediction of Mica Paper Capacitors Based on an Improved
           Iterative Grey–Markov Chain Model

    • Free pre-print version: Loading...

      Authors: Shifei Liu;Jiande Zhang;Zicheng Zhang;
      Pages: 7638 - 7647
      Abstract: Mica paper capacitors possess the characteristics of high energy storage density and reliability and have been widely applied in various power systems as energy storage components. The lifetime of capacitors is a critical factor that ensures the reliability of a system. The leakage resistance of a mica paper capacitor can be utilized to characterize its lifetime. However, the decrease of leakage resistance caused by a single test pulse is slight during a lifetime test. A large number of test pulses are needed to obtain complete lifetime data of mica paper capacitors. To obtain lifetime prediction of capacitors based on limited data, an improved iterative Grey–Markov chain model based on unbiased grey system theory, fuzzy classification with fuzzy C-mean (FCM) algorithm, and an iterative method is proposed. It can take advantage of the prediction power of the conventional Grey–Markov model and improve anti-interference performance simultaneously. As an example, six mica paper capacitors are utilized to validate the feasibility and practicability of this model. The working state and remaining lifetime of mica capacitors can be dynamically evaluated through this model in practical applications. This model is also applicable to forecasting in other lifetime testing situations. This helps to assess the reliability of a whole system.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Degradation Behavior and Mechanism of SiC Power MOSFETs Under Repetitive
           Transmission Line Pulse Stress

    • Free pre-print version: Loading...

      Authors: X. B. Xu;Y. Q. Chen;Y. Chen;Z. H. Fan;Q. R. Wei;J. L. Wang;Z. Y. He;C. Liu;G. G. Lu;Y. Huang;Y. Ren;Y. F. En;
      Pages: 7648 - 7652
      Abstract: The electrostatic discharge robustness of silicon carbide (SiC) power metal–oxide–semiconductor field-effect transistors (MOSFETs) are investigated by the transmission line pulse (TLP) method. The degradation behavior of key electrical parameters of the device under repetitive TLP stress is investigated. A decrease in threshold voltage, an increase in gate leakage current, and the degradation of gate capacitance parameters are observed compared with the prestress values. Low-frequency noise (LFN) test results show that after multiple TLP stress cycles, the typical leakage current noise of the device increases by approximately one order of magnitude compared to prestress, which means that the trap density extracted based on the McWhorter model increases by one order of magnitude after 1000 TLP stress pulses. Furthermore, sources of defects in the gate oxide dielectric of the devices after stresses are analyzed. The physical mechanism of the changes of SiC MOSFETs characteristics could be attributed to the hole trapping by oxygen vacancy defects and single carbon interstitial in the oxide layer after TLP stresses, which induces an electrostatic effect and results in the changes in the electrical properties of the devices. The results may be useful in the design and application of SiC power MOSFETs.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Temperature- and Degradation-Dependent Maximum Electric Field Stress in
           Wire-Bonding Power Modules Under PWM Waves

    • Free pre-print version: Loading...

      Authors: Ying Lin;Yunxiao Zhang;Yuhao Liu;Kangning Wu;Helong Li;Jianing Wang;Kejie Li;Lijian Ding;
      Pages: 7653 - 7664
      Abstract: Electric field stress concentration is one of the causes of partial discharge (PD) in power modules, which threatens the power modules’ safe operation. Herein, this article investigates the influences of temperature (from 150 to $250~^{circ }text{C}$ ) and operation duration on the maximum electric field stress at the triple point (silicone elastomers, ceramic, and copper). It reveals that the maximum electric field stress rises with the increase in temperature, while the maximum electric field first increases but then decreases along the operation duration, especially under low temperature. Both the influences of temperature and the operation duration are related to the permittivity (dominated by the relaxation of Si–O bonds), low-frequency dispersion (LFD) phenomenon, and dc conductivities of silicone elastomers, which can be manipulated to suppress electric field stress concentration. This article provides a method to accurately calculate the electric field. The results are also critical to evaluation and improvement of power modules’ insulation.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • An Intelligent Electronic Fuse for Selective Isolation of Faulty Switching
           Cells in Power Electronic Converter Legs to Guarantee Continuous Operation
           

    • Free pre-print version: Loading...

      Authors: Alber Filba-Martinez;Sergio Busquets-Monge;Salvador Alepuz;Gabriel Garcia-Rojas;Adria Luque;Josep Bordonau;
      Pages: 7665 - 7676
      Abstract: This article proposes a novel device designated as an intelligent electronic fuse (iFuse) intended to be connected in series with any current-bidirectional voltage-unidirectional active switch present in a power converter. The iFuse duty is to selectively isolate its series-associated switch from the rest of the converter circuit immediately after detecting that this switch has failed in short circuit. Nonetheless, it maintains the reverse (free-wheeling) current path originally offered by the failed switch. The failure detection is typically performed when the failed switch causes a shoot-through event. Therefore, the iFuse is able to block large currents. The iFuse allows increasing the power-converter fault tolerance and reliability with regard to switch short-circuit failures (SCFs), as in converters featuring switches in parallel, redundant legs, and multilevel neutral-point-clamped topologies. The reliability model analysis of a two-level converter leg with two parallel switches per position reveals that its reliability can be increased up to four times when an iFuse is implemented in series with each switch. The iFuse device feasibility and good performance are verified through experimental tests, proving that it can detect and isolate the associated-switch failure in 6 $mu text{s}$ , while stopping short-circuit currents of up to 1 kA without incurring in harmful di / dt values.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • An Online Identification Method of Thermal Dissipation State for Forced
           Air-Cooled System of Power Converters

    • Free pre-print version: Loading...

      Authors: Heping Fu;Jie Chen;Amir Sajjad Bahman;Ruichang Qiu;Zhigang Liu;
      Pages: 7677 - 7690
      Abstract: Thermal stress is the primary cause of malfunction and failure in power modules. As the main heat dissipation component, the heatsink plays a significant role in improving the reliability of power converters. However, due to the continuous accumulation of dust and impurities on the heatsink’s air inlet side, the thermal dissipation performance of the cooling system constantly declines, which influences the reliable operation of power modules. In this article, a computational fluid dynamics (CFD)-based simulation analyzes the declining mechanism of the heatsinks’ thermal transfer performance. Moreover, a novel online method is proposed for the cooling system’s thermal dissipation state identification. This method regards the steady-state thermal resistance as the feature parameter of the thermal dissipation state evaluation. And a parameter identification method is employed to identify the steady-state thermal resistance due to the difficulty of obtaining it in the transient thermal process. In addition, an ac/dc/ac pulsewidth modulation (PWM) converter is built for verification. The experimental results demonstrate that the proposed method enables accurate and fast identification of the cooling systems’ thermal dissipation state. It can be one of a solution for replacing the existing off-line manual periodic detection method, which helps improve detection efficiency and decrease maintenance costs.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Open Switch Fault Tolerant Control Strategy for Paralleled Three-Level NPC
           Back-to-Back Power Converters Fed DFIM Unit

    • Free pre-print version: Loading...

      Authors: Raghu Selvaraj;Thanga Raj Chelliah;
      Pages: 7691 - 7703
      Abstract: In a large-rated adjustable speed hydro generating unit, the design of fault tolerant control operation is a crucial process due to dynamic slip frequency variation and the existence of overvoltage across rotor windings during the isolation process of the faulty converter. To overcome these practical challenges, a fault tolerant control strategy is designed in this article for a parallel-connected 3L-NPC-fed 250-MW doubly fed induction machine (DFIM) unit. The basic idea is to limit reactive power support under fault tolerant operation to enhance rotor active current amplitude $({i}_{m}^{d})$ . Meanwhile, the pulsewidth modulation (PWM) signal to the faulty converter is disabled, and healthy converters are overloaded to 115% for 10–20 s. The overloaded operation in machine side converter shall increase the thermal stress on power devices. To handle this issue, the average switching cycle of power devices is reduced with the help of a state machine controller. Once the system is reconfigured, reactive power support to the grid is provided with the help of a line side converter by adjusting the reactive control component $({i}_{g}^{qref})$ . The effectiveness of the designed coordinated fault tolerant control strategy is investigated in MATLAB/Simulink2014A environment for the 250-MW DFIM unit under different case scenarios. Experimental validation is performed with the three-channel 3L-NPC power converter-fed 2.2 kW DFIM unit.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Single and Double Input DC Sources Multilevel Inverter Topologies With
           Reduced Components Counts and Voltage Boosting Property for Grid-Connected
           Photovoltaic Converters

    • Free pre-print version: Loading...

      Authors: Alaaeldien Hassan;Xu Yang;Wenjie Chen;
      Pages: 7704 - 7720
      Abstract: This article proposes a single-source nine-level multilevel inverter topology that handles a reduced number of components. Moreover, it utilizes the virtual dc sources in terms of the switched capacitors to reduce the number of the active dc source. Those capacitors have a self-charging with naturally balancing capability. The proposed topology can be upgraded to a 19-level configuration. This modification is performed by adding a single supply and a pair of switches. To highlight the good features of the proposed structures, a set of comparative studies are held with other structures based on some of the performance evaluating parameters. The comparison results prove the superiority of the proposed configurations over the other comparative references. A simple method is presented to estimate the boundary for the capacitance of capacitors. The performance of the proposed configurations is validated through the practical prototypes for these structures, which are implemented and tested based on the dSPACE (DS-1103) hardware. For further validation, the proposed topology is integrated with a photovoltaic (PV) system to study its performance with a high output power system.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Stability Analysis and Design of Common Phase Shift Control for
           Input-Series Output-Parallel Dual Active Bridge With Consideration of
           Dead-Time Effect

    • Free pre-print version: Loading...

      Authors: Zhengmei Lu;Guo Xu;Mei Su;Yuefeng Liao;Yonglu Liu;Yao Sun;
      Pages: 7721 - 7732
      Abstract: Input-series output-parallel (ISOP) connected dual-active-bridge (DAB) converters allow the use for occasions requiring high input voltage and galvanic isolation with bidirectional power capability. However, when DAB converters are ISOP connected, the traditional analysis without consideration of the dead time cannot effectively explain the reason why the ISOP converter system is stable under common phase shift control (CPSC) when parameters are mismatched. In this article, it is first revealed that the stability of the ISOP DAB converter under common phase ratio control can be ensured by consideration of the dead time. Based on the analysis of the DAB power transmission characteristics with consideration of dead time, a new model is derived for the ISOP DAB converter, which can reveal the reason why the converter can operate stably under CPSC when the design parameters of the individual module are mismatched. Then, based on the derived model, the stability analysis and the parameters design are further performed. Finally, the effectiveness of the working principle and analysis is verified through results from a two-module ISOP experimental prototype.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Ultrahigh Step-Up Quadratic Boost Converter Using Coupled Inductors With
           Low Voltage Stress on the Switches

    • Free pre-print version: Loading...

      Authors: Vahid Abbasi;Sajad Rostami;Siroos Hemmati;Sina Ahmadian;
      Pages: 7733 - 7743
      Abstract: In this article, a new ultrahigh step-up dc–dc converter is proposed. The circuit is composed of a quadratic boost converter (QBC), two coupled inductors (CIs), and a voltage multiplier cell. The distinguishing features of this converter are low voltage stress on the main power switches, continuity of the input current, common ground between load and source, and ultrahigh voltage gain. Among all the compared converters, voltage gain of the converter in the entire duty cycle and the CIs turn ratio range is higher and unique of its kind. A prototype is also prepared in order to experimentally validate feasibility and effectiveness of the proposed converter. This prototype is rated at 250 W and 600 V output power and voltage, respectively. In the experiments, the output voltage is controlled on its rated value of 600 V, while the input voltage varies from 15 to 30 V, meaning that the maximum experimental voltage gain is equal to 40.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • An Optimized LVRT Control Strategy of Cascaded Modular Medium-Voltage
           Inverter for Large-Scale PV Power Plant

    • Free pre-print version: Loading...

      Authors: Tao Zhao;Zhijian Feng;Mingda Wang;Mengze Wu;Daolian Chen;
      Pages: 7744 - 7759
      Abstract: Active power backflow is an inherent problem of three-phase cascaded H-bridge (CHB) photovoltaic (PV) grid-tied inverters during low-voltage ride through (LVRT), probably resulting in no balanced operating point of the system, and the inverter will be shut down and off-grid due to overvoltage fault. Aiming at this issue, this article first reviews the existing control methods and analyzes their limitations in application, that is, they cannot effectively suppress active power backflow under the scenario of deeper voltage drop and lower output power. On this basis, an optimized LVRT control strategy for cascaded modular medium-voltage PV power generation system is proposed, which adopts different control methods to suppress active power backflow under three types of asymmetric grid drop conditions: single-phase short-circuit fault with ground, two-phase short-circuit fault with ground, and two-phase short-circuit fault without ground, enhancing the adaptability of CHB PV grid-connected inverters to different output powers and different drop depths during grid voltage failure and then improving LVRT capability of the system. Finally, the effectiveness and feasibility of the proposed control strategy are verified by experimental results.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • A Modular Bidirectional Solid-State DC Circuit Breaker for LV and MVDC
           Grid Applications

    • Free pre-print version: Loading...

      Authors: S. Nandakumar;I. Venkata Raghavendra;C. N. Muhammed Ajmal;Satish Naik Banavath;Kaushik Rajashekara;
      Pages: 7760 - 7771
      Abstract: Direct current (dc) microgrids are increasingly gaining attention in industrial applications due to their simpler and more efficient integration with renewable energy resources and energy storage elements. The dc grid demands a faster, compact, cost-effective, and fault-tolerant protective system for reliable operation. To address the above challenges, this article proposes a bidirectional solid-state dc circuit breaker topology that guarantees reliable operation of dc grids [low voltage dc (LVDC) and medium voltage dc (MVDC)]. A modular extension of the proposed circuit breaker is also presented, resulting in better reliability, scalability, and fault-tolerant operation. The circuit breaker is derived using power semiconductor devices [silicon-controlled rectifiers (SCRs) and insulated-gate bipolar transistors (IGBTs)], with SCR acting as a main power interruption device. Salient features of the proposed topology include modularity, use of low-power rated devices, low-current rated sensors, and pre-fault interruption. A detailed mathematical analysis validating the design and operation of the proposed modular circuit breaker is presented. Moreover, the article also highlights the merits and limitations of the proposed concept. Finally, a laboratory prototype is developed with a system specification of 400 VDC/14 A to validate the performance of the proposed circuit breaker with single and modular operations, which is in line with the obtained simulation results. To verify current sharing between the modules, a few non-ideal conditions such as the use of non-identical main SCRs and turn-on delay are considered and tested on the developed prototype.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Three-Level T-Type qZ Source Inverter as Grid-Following Unit for
           Distributed Energy Resources

    • Free pre-print version: Loading...

      Authors: Javier Gutiérrez-Escalona;Carlos Roncero-Clemente;Oleksandr Husev;Fermín Barrero-González;Ana M. Llor;V. Fernão Pires;
      Pages: 7772 - 7785
      Abstract: Distributed energy resources (DERs), such as solar photovoltaics (PVs), are required to achieve a high performance and an efficient use of generated renewable power in grid-integrated applications, both in normal and fault operating conditions. In this article, a grid-following (GFL) multifunctional control strategy for a three-phase three-level T-type quasi-impedance source inverter (3L-T-type qZSI) is studied through simulation and experimental tests. The GFL functionality is achieved by a proportional–integral (PI)-based dq current controller for the active and the reactive power tracking. A PI-based dc controller is used for the dc-link voltage control by taking advantage of the quasi-impedance source (qZS) network ability for input voltage boosting. The dc–ac power conversion is accomplished through a space vector pulsewidth modulation (SVPWM) with inner capacitors voltages balancing capability and minimum common-mode voltage (CMV) generation. Besides, a low-voltage ride-through (LVRT) strategy was implemented to fulfill the fault requirements imposed by the Spanish standard. The simulation and experimental results demonstrate the abovementioned functionalities and validate the stability and good dynamic response of the grid-connected 3L-T-type qZSI. Thus, this work supposes a novel contribution due to the few works previously reported in the literature concerning the performance of this relatively recent inverter topology in grid-tied applications.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Sensorless Control of Variable-Speed SCIG Wind Energy Conversion Systems
           Based on Rotor Flux Estimation Using ROGI-FLL

    • Free pre-print version: Loading...

      Authors: Anh Tan Nguyen;Dong-Choon Lee;
      Pages: 7786 - 7796
      Abstract: In this article, a novel sensorless control method for variable-speed squirrel-cage induction generator (SCIG) wind power systems with simple rotor flux estimation is proposed. The rotor flux linkages are estimated using a reduced-order generalized integrator (ROGI)-frequency-locked loop (FLL), which regards the rotor back electromotive forces (EMFs) found from the generator model as its inputs. Based on these rotor flux linkages, the rotor flux angle can be estimated through direct trigonometric relations. Then, to avoid the speed estimation error caused by the FLL under stator frequency variations, the synchronous speed is estimated from the aforementioned rotor flux angle via the derivative. Owing to the excellent harmonic rejection capability of the ROGI, the proposed rotor flux estimation is robust against measured high-frequency ripple components. The analysis of ROGI response in the presence of dc offset in the rotor back EMFs is provided as well, and it shows that the proposed method is not faced with the saturation under those conditions. Performance comparisons between the proposed method and the existing dual second-order generalized integrator (SOGI)-FLL-based method have been conducted via both simulations and experiments, thereby verifying the feasibility of the proposed method.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • A Hybrid IPT System Implementing Misalignment Tolerance and Constant
           Current Output With Primary Intermediate Coil

    • Free pre-print version: Loading...

      Authors: Guanxi Li;Zirui Yao;Shiying Luo;Hao Ma;
      Pages: 7797 - 7807
      Abstract: Inductive power transfer (IPT) systems have advantages of safety, flexibility, and convenience compared to plug-in charging systems. However, in practical applications, pad misalignment is still an almost inevitable issue which may cause variation in magnetic couplings, thus affecting the power transmission and reducing the system efficiency. Therefore, IPT systems are usually expected to achieve tolerance for misalignment. To fulfill this feature, a hybrid IPT system is proposed in this article. By adopting two coils compensated by different topologies in receiver side and an additional intermediate coil in transmitter side, load-independent constant output current with improved misalignment tolerance can be achieved. In addition, when the receiver pad is very far away from the transmitter pad, the proposed system can operate safely due to the inherent limitation ability of the primary inverter current. The design process is presented to optimize the misalignment performance. Based on the experimental results of a 3.3-kW prototype, the fluctuation of the output current is less than 5% within ±300-mm misalignment in $y$ -axis, −30- to +60-mm misalignment in $z$ -axis, and −80- to +60-mm misalignment in $x$ -axis. The system efficiency is 96.7% at nominal operating point (NOP) and varies from 94.7% to 97.8% with variable loads and misalignment.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Improved Capacitive Power Transfer With Non-Resonant Power Transfer Link
           Using Radio Frequency Push-Pull Inverter

    • Free pre-print version: Loading...

      Authors: Adrian Amler;Nikolai Weitz;Martin März;
      Pages: 7808 - 7823
      Abstract: In recent years, research on wireless power transfer and switched-mode power supplies with a capacitive coupling link has been on the rise. While many researchers investigate resonant coupling links, often resulting in tough requirements for the involved inductors, this article focuses on the elimination of all inductive components in the coupling link and the rectifier through the use of a non-resonant capacitive link. We propose a converter with a resonant single-ended push-pull inverter operating at radio frequencies of, e.g., 13.56 MHz to directly drive the non-resonant capacitive power transfer (CPT) link. The ability of the converter to operate at a high frequency and facilitate a significant voltage change across the link capacitors improves the power transfer characteristics of the system compared to previously published systems with a non-resonant capacitive link. Said combination is also beneficial for the transient behavior, parameter variation robustness, an easy design process, simplified drive requirements, and a predictable and limited capacitor voltage stress. The presented converter transmits 122.9 W across an effective link capacitance of 120 pF, leading to the highest input voltage-normalized power transfer to link capacitance value of 13.7 W/(nF $cdot text{V}$ ) among previously published CPT systems with a non-resonant link.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Guest Editorial Special Issue on Partial Power Conversion and Its Emerging
           Applications

    • Free pre-print version: Loading...

      Authors: Tsorng-Juu Peter Liang;Fernando Briz Del Blanco;
      Pages: 7824 - 7824
      Abstract: As the role of Editor-in-Chief of IEEE Journal of Emerging and Selected Topics in Power Electronics (JESTPE) and Deputy Editor-in-Chief of JESTPE, we would like to take this opportunity to express our appreciations of the Guest Editors and the Guest Associate Editors of their valuable time in organizing and handling the manuscript reviewing process of this special issue.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • A Review of Series-Connected Partial Power Converters for DC–DC
           Applications

    • Free pre-print version: Loading...

      Authors: Niwton Gabriel Feliciani dos Santos;Jonatan Rafael Rakoski Zientarski;Mário Lúcio da Silva Martins;
      Pages: 7825 - 7838
      Abstract: This article presents a review of series-connected partial power converters (S-PPCs) for dc–dc applications, which allows carrying out the partial power processing (PPP), whose main goal is to achieve a reduction of the power processed by the converters. An analysis of the S-PPCs’ characteristics, topologies, and applications concerning the active and nonactive power processing is presented. The power processing factor (PPF) is then defined, which refers to the active power and depends exclusively on the voltage regulation range. The so-called Fryze power factor (PF) is used to evaluate the nonactive power processed, which depends on the topology voltage and current waveforms. Due to the lack of research around step-up/-down S-PPCs, this article presents the restrictions and requirements for the design of this type of S-PPCs. Finally, it is demonstrated that the turns ratio of magnetic devices can be optimized to reduce the nonactive power and improve the converter Fryze PF, ensuring PPP. In order to validate the analyses, two 2200-W prototypes were built and evaluated for a photovoltaic (PV) application example. Experimental results show that the reduction of both the active and nonactive power processed by the S-PPCs results in lower component ratings and higher efficiencies.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Partial-Power Converter Topology of Type II for Efficient Electric Vehicle
           Fast Charging

    • Free pre-print version: Loading...

      Authors: Sebastian Rivera;Julian Rojas;Samir Kouro;Peter W. Lehn;Ricardo Lizana;Hugues Renaudineau;Tomislav Dragičević;
      Pages: 7839 - 7848
      Abstract: The increasing power levels handled by electric vehicle (EV) dc fast chargers will impose additional challenges to the switching devices in order to cope with the efficiency requirements. A cost-effective alternative to achieve highly efficient power conversion is through the partial-power conversion concept. This article validates the advantages of a step-down Type II partial-power converter (PPC), based on the phase-shifted full-bridge converter, for EV fast chargers. By exploiting the reduced voltage range of an EV battery pack along with the reduced power ratio for a Type II PPC, an extremely efficient charging process can be achieved. The concept is validated with the development of a 7-kW demonstrator, and hence, realistic efficiency measurements are obtained. Results indicate the effectiveness of charging a battery by merely handling 13.32% of the power provided to it, with a peak efficiency of 99.11%.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Classification of Differential Power Processing Architectures Based on VA
           Area Modeling

    • Free pre-print version: Loading...

      Authors: Cheng Li;José A. Cobos;
      Pages: 7849 - 7866
      Abstract: This article reviews and classifies the representative types of “differential power processing (DPP)” architectures, focusing on the aspect of how the processed power is reduced with DPP. Comparing with existing review works on this topic, this article provides new viewpoints from three perspectives. First, the differential power ${P}_{{text {diff}}}$ at both architecture level and converter level is discussed. For the calculation of the total processed power in a power architecture, instead of summing up the output power ${P}_{{text {out}}}$ delivered by the DPP converters, we account for ${P}_{{text {diff}}}$ inside the DPP converters because direct power exists not only at the architecture level but also at the converter level, and thus, the power processed in a converter may be lower than ${P}_{{text {out}}}$ . Second, the VA area modeling is applied to the DPP architectures to illustrate and visualize the processed power in the power architectures and converters, thus analyzing and comparing them at high level. Finally, the processed power of different DPP architectures is compared quantitatively with statistical analysis for varied operating situations.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Symmetric and Asymmetric Configuration of Parallel-Switched d-Type
           Multilevel Inverter

    • Free pre-print version: Loading...

      Authors: Malik Muhammad Zaid;Hamza Ahmad;Sadjad Madanzadeh;Jong-Suk Ro;
      Pages: 7867 - 7879
      Abstract: Total harmonic distortion (THD) and voltage stress across the switches are critical issues in power electronic systems. Although multilevel inverters (MLIs) were initially used to minimize these issues, doing so is challenging when simultaneously attempting to minimize the number of components such as switches, dc sources, and gate drivers. To address this problem, a new pd-type MLI is presented with two back-to-back connected d-type modules with an H-bridge that generates the negative voltage levels. The proposed topology with ten unidirectional switches and four dc sources operates in symmetric and asymmetric configuration to generate 9, 13, and 17 voltage levels. The presented inverter is extended using cascaded connections to attain more output voltage levels, making it usable for the applications with diverse number of dc links for medium- and high-voltage applications. The proposed topology also exhibits small THD, low number of power electronic components, and low total voltage stress across the switches in each cycle. Furthermore, a widely used nearest level control (NLC) modulation technique is used to generate output voltage levels with a minimum amount of THD at the output. Finally, simulations were performed using MATLAB/Simulink and experiments were conducted to validate the performance of the proposed topology.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Inductorless Bidirectional Switched-Capacitor Power Electronics
           Transformer

    • Free pre-print version: Loading...

      Authors: Kuo-Yuan Lo;Li-Xin Chen;Yen-Chang Huang;
      Pages: 7880 - 7889
      Abstract: The objective of this article is to propose a new inductorless bidirectional switched-capacitor power electronics transformer (IBSCX) for low-power commercial and residential applications. The proposed IBSCX is composed of multiple switched-capacitor converters (SCCs) and two bidirectional unfolders. Compared with the traditional solution which is the use of a low-frequency transformer, the advantages of the proposed IBSCX include control circuit simplicity, high conversion efficiency, and volume and weight reduction for low-power applications. The principle of operation, voltage gain analysis, and design methodology are described in this article. Also, with the interleaved operation between SCCs, the output current ripple can be reduced. Finally, the computer simulations and hardware experimental results are shown to verify the performance of the proposed IBSCX. A prototype IBSCX is built and tested, and the peak and rated power conversion efficiency are 98.26% and 97.95%, respectively.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Analysis and Design of Series Voltage Compensator for Differential Power
           Processing

    • Free pre-print version: Loading...

      Authors: Ping Wang;Minjie Chen;
      Pages: 7890 - 7903
      Abstract: Differential power processing (DPP) has been proven effective in many applications. This article explores a series voltage compensator (SVC) architecture for voltage regulation of DPP systems. An SVC is connected in series between the input dc bus and the DPP system to compensate for the voltage difference. It only processes a fraction of the overall power. The inclusion of an SVC changes the power flow of the DPP system and changes the loss distribution. We theoretically investigated the SVC power rating and the additional power conversion stress that SVC brings to the DPP converter. Accordingly, we identified the operation range where an SVC is more attractive than a conventional DPP pre-regulation converter that has to process the full power. Our analysis provides insights into system design and control strategy of SVC-DPP topologies. To validate the principles of SVC, a buck SVC is designed and applied to a ten-port DPP converter. The buck SVC can efficiently convert an input voltage ranging from 50 V to 65 V into a regulated 50 V for the DPP system. The size of the SVC is only 20% of the DPP converter, and the peak efficiency of the SVC-DPP system achieves 98.8%.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • A Family of Coupled Dual-Winding Impedance-Source Inverters With
           Continuous Input Currents and No DC-Link Voltage Spikes

    • Free pre-print version: Loading...

      Authors: Jianwei Ma;Hongpeng Liu;Jikai Chen;Yuhao Li;Poh Chiang Loh;
      Pages: 7904 - 7914
      Abstract: Impedance-source inverters with coupled inductors can provide much higher voltage gains, but occasionally at the expense of discontinuous input currents and large voltage spikes at their dc-links. The former is caused by the absence of inductances at their inputs, while the latter is due to unintentional interruptions of leakage currents through their coupled inductors. These problems have now been solved here by a new family of dual-winding impedance-source inverters (DW-ISIs). Each DW-ISI can recycle the leakage energy from its two windings to a few clamping capacitors, which in turn help prevent the voltage spikes. This, together with the presence of an inductance for smoothing its input current, renders the family of DW-ISIs to be highly effective, while not compromising the voltage and current stresses when compared with other precedent inverters. In addition, to simplify the circuit analysis, a reactive component elimination method has been proposed in this article. Simulation and experimental results have confirmed the validity of the proposed topologies.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • A DCM High-Frequency High-Step-Up SEPIC-Based Converter With Extended ZVS
           Range

    • Free pre-print version: Loading...

      Authors: Shanshan Gao;Xikun Sang;Yijie Wang;Yining Liu;Yueshi Guan;Dianguo Xu;
      Pages: 7915 - 7924
      Abstract: A discontinuous conduction mode (DCM) high-frequency high-step-up single ended primary inductor converter (SEPIC)-based converter with extended zero voltage switching (ZVS) range is presented in this article. With the incorporation of some components on conventional SEPIC, the proposed converter achieves better performances such as high voltage gain, low voltage stress, and ZVS. The additional components form a resonant cell which enables the switches to work in ZVS, and switching loss is reduced accordingly. In order to achieve ZVS, the converter is designed to work in DCM. Due to inclusion of the resonance stage, traditional pulse width modulation (PWM) or pulse frequency modulation (PFM) control method is unable to regulate the output characteristics and maintain ZVS of the power switches at the same time. Therefore, a hybrid control method is proposed in this article to guarantee ZVS within a specific load range. According to this hybrid control method, the ZVS range is extended effectively. GaN switches and planar magnetic components are also used. Working principles and steady-state analysis are presented in detail. A 1-MHz 36-W prototype with 10 voltage gain has been designed to demonstrate theoretical analysis. Efficiency obtained is up to 91.8% at full load. Experimental results show good agreement with theoretical analysis.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Research on Comprehensive Active Current- Limiting Control Strategy
           Applied in Two-Port MMC-HVDC Transmission System

    • Free pre-print version: Loading...

      Authors: Tao Li;Yongli Li;Xiaolong Chen;Song Li;Ningning Liu;
      Pages: 7925 - 7937
      Abstract: Aiming at the defect that the current-limiting strategy based on the modular multilevel converter (MMC)-high-voltage direct current (HVDC) system only focuses on the unilateral ac side or dc side, this article proposes a current-limiting strategy that is suitable for both ac-side ground fault and dc-side short-circuit fault. First, for the ground fault on the ac side, the outer loop controller with power state equation and the inner loop controller with passivity-based control (PBC) strategy are used to control it, and the genetic algorithm, which takes the absolute value of the difference between the reference current and the actual current as the fitness function, is used to fit the optimal injection damping parameters for the PBC method. Then, for the short-circuit fault on the dc side, the capacitor discharge duty ratio is introduced on the basis of the equivalent capacitance without considering the voltage drop, and its segmented control is combined with the current-limiting reactors to achieve current-limiting at different fault points. Finally, a two-port +500-kV HVDC transmission system was built on MATLAB/Simulink software, and the effectiveness of the current-limiting method proposed in this article was verified.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • A Nine-Level Transformerless Boost Inverter With Leakage Current Reduction
           and Fractional Direct Power Transfer Capability for PV Applications

    • Free pre-print version: Loading...

      Authors: Sumon Dhara;V. T. Somasekhar;
      Pages: 7938 - 7949
      Abstract: This article describes an integrated voltage-boosting technique, which is essential to achieve compatibility between low-voltage photovoltaic (PV) panels and high-voltage dc links needed for dc-to-ac conversion. To achieve the twin objectives of voltage-boosting and multilevel inversion, this article proposes a transformerless T-type nine-level hybrid boost inverter. To improve the efficiency in the boosting stage of the proposed converter system, a significant portion of the PV energy is directly transferred from the PV source to the load, while the other part is processed through an interleaved converter, which is fused with the inverter. Thus, the proposed converter ensures a higher power density and reduces the power ratings of the semiconductor devices. This article also introduces a modified zone-based pulsewidth modulation (PWM) technique, which achieves a complete elimination of the switching frequency voltage transitions in the total common-mode voltage (TCMV). Thus, this technique mitigates the generation of leakage current while preserving the advantages of conventional multilevel inverters such as low $text{d}v/text{d}t$ and inductive power capability. Besides that, a rigorous mathematical analysis for the common-mode equivalent circuit of the proposed configuration is also presented in this article. Detailed simulation and experimental studies are carried out to validate the feasibility of the proposed configuration.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • A Multiport Partial Power Processing Converter With Energy Storage
           Integration for EV Stationary Charging

    • Free pre-print version: Loading...

      Authors: Felix Hoffmann;Jonas Person;Markus Andresen;Marco Liserre;Francisco D. Freijedo;Thiwanka Wijekoon;
      Pages: 7950 - 7962
      Abstract: Battery storage system (BSS) integration in the fast charging station (FCS) is becoming popular to achieve higher charging rates with peak-demand shaping possibility. However, the additional conversion stage for integrating the BSS increases the system losses, size, and cost. The concept of a partial power processing converter (PPPC) can mitigate this effect. Compared to conventional used full power processing converter (FPPC), PPPC reduces the amount of transferred power from the BSS to the electric vehicle (EV) by the converter. As a consequence, the power losses generated by the converter are reduced, leading to lower sized converters and higher system efficiencies. This article proposes a dc/dc multiport converter that allows the integration of battery storage in FCS based on a partial power processing concept while maintaining the specific requirements in terms of isolation for FCS. The proposed three-port partial power processing converter (3P-PPPC) is derived from the commonly used triple active bridge (TAB) converter. The resulting design tradeoffs, the dynamic behavior, and limitations of the topology are investigated. Furthermore, the round-trip efficiency of the 3P-PPPC for integrating BSS in FCS is compared with conventional FPPC solutions, highlighting the superiority of the proposed topology. A prototype has been built to validate the 3P-PPPC.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Design and Implementation of an 18-kW 500-kHz 98.8% Efficiency
           High-Density Battery Charger With Partial Power Processing

    • Free pre-print version: Loading...

      Authors: Yuliang Cao;Minh Ngo;Ning Yan;Dong Dong;Rolando Burgos;Agirman Ismail;
      Pages: 7963 - 7975
      Abstract: The demand for high-density, high-efficiency bidirectional battery chargers is driven by the fast development of energy storage system in renewable energy system, microgrid, and transportation electrification. Isolated dc–dc converter that interfaces a battery with a variable voltage range is one of the critical components. Input-parallel output-series (IPOS) partial power (PP) converter is considered a promising high-efficiency, high-density solution because only a fraction of power is processed via multistage converters to regulate the output voltage. However, due to the tight coupling between two dc transformers (DCXs), the design of PP converter is complicated. To solve this issue, an overall design procedure for a bidirectional soft-switching resonant-type PP converter is proposed. In the parameters design part, a decoupled design method is proposed to simplify the DCXs design. With this method, two DCXs can be designed separately, and a typical optimization method can be easily applied. As for the hardware design part, to minimize the ac loop inductance and resistance, a two-direction (2-D) flux cancellation method and an “intraleaving” winding structure are proposed for circuit layout and high-frequency (HF) transformer to obtain high operation efficiency and power density. Finally, the whole design procedure is verified by an 18-kW-rated, 25-kW peak, prototype operating at 500 kHz. The realized PP converter features a peak efficiency of 98. 8% and a power density of 142 W/in3. This article is accompanied by two videos demonstrating the dynamic voltage regulation test and the efficiency measurement.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Create Change: IEEE Smart Village

    • Free pre-print version: Loading...

      Pages: 7976 - 7976
      Abstract: Advertisement.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Connect. Support. Inspire.

    • Free pre-print version: Loading...

      Pages: 7977 - 7977
      Abstract: Advertisement.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
  • Women in Engineering

    • Free pre-print version: Loading...

      Pages: 7978 - 7978
      Abstract: Advertisement.
      PubDate: Dec. 2022
      Issue No: Vol. 10, No. 6 (2022)
       
 
JournalTOCs
School of Mathematical and Computer Sciences
Heriot-Watt University
Edinburgh, EH14 4AS, UK
Email: journaltocs@hw.ac.uk
Tel: +00 44 (0)131 4513762
 


Your IP address: 3.236.70.233
 
Home (Search)
API
About JournalTOCs
News (blog, publications)
JournalTOCs on Twitter   JournalTOCs on Facebook

JournalTOCs © 2009-