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Journal of Circuits, Systems, and Computers
Journal Prestige (SJR): 0.172
Citation Impact (citeScore): 1
Number of Followers: 5  
 
  Hybrid Journal Hybrid journal (It can contain Open Access articles)
ISSN (Print) 0218-1266 - ISSN (Online) 1793-6454
Published by World Scientific Homepage  [121 journals]
  • Intelligent and Accurate Tobacco Curing via Image Recognition and Data
           Analysis

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      Authors: Binbin Hu, Ziyang Meng, Yi Chen, Yonglei Jiang, Chunwei Chang, Zengxiang Ke, Jun Chen, Hao Li
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Existing tobacco curing process assumes a uniform distribution of temperature and humidity in a barn without considering surface, texture, and biochemical properties of leaves, leading to low quality or even inferior end products. This paper proposes a novel curing process by combining image recognition and data analysis techniques that aims to intelligently improve curing quality of tobacco leaves. Specifically, an image recognition technique is first proposed to classify tobacco leaves and determine their placement in a curing barn. Then, data analysis of the biochemical spectrum of the tobacco leaves are conducted to correlate the temperature and humidity with biochemical data features. Extensive experimental results show that proposed curing process achieves 98.68% accuracy in image recognition for tobacco position control and provides an accurate mapping between tobacco state and biochemical spectrum signals.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-09-20T07:00:00Z
      DOI: 10.1142/S0218126623300076
       
  • Approximate Computing: Hardware and Software Techniques, Tools and Their
           Applications

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      Authors: Mehwish Raza, Sharjeel Javed, Majida Kazmi, Arshad Aziz, Muhammad Fahim Ul Haque, Saad Ahmed Qazi
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      The limitations of scaling in CMOS technology pose challenges in meeting the requirements of future applications. To address these challenges, researchers are exploring various design techniques, including Approximate Computing (AC), which leverages the inherent error resilience of applications to achieve high performance and energy gains with desired quality. AC has gained popularity as a computer paradigm for error-resilient applications, and many researchers have studied AC across computing layers and developed tools for implementing these techniques. This paper provides a comprehensive survey of AC techniques at the abstraction levels of software and hardware and discusses the tools to implement AC in hardware and software, quality evaluation tools and comparison points. The paper also covers existing frameworks for AC, potential applications, future research directions, challenges and limitations. This information can guide researchers in identifying promising avenues for further advancements and innovations in this domain. Additionally, this paper compares state-of-the-art surveys of AC and highlights the unique features and contributions of this work that distinguish our work from previous surveys.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-09-20T07:00:00Z
      DOI: 10.1142/S0218126624300010
       
  • Network Rumor Detection Using Attention Mechanism and BiGRU Neural Network
           in Big Data Environment

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      Authors: Sida Yuan, Qiong Yang
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      The research object of this paper is rumors, mainly focusing on the dissemination characteristics of rumors on Weibo platforms and conducting rumor attribute detection. Aiming at the problems of low accuracy and poor timeliness of current rumor detection methods, a network rumor detection method using attention mechanism and Gated Recurrent Unit (GRU) neural network is proposed. First, pre-processing operations such as data noise cleaning, Chinese word segmentation and stop word removal are performed on the constructed Weibo corpus data, and word vectors are obtained by using the Continuous Bag-of-Words (CBOW) model in the Word2vec neural language model. Then, the Bidirectional GRU neural network (BiGRU) is used to obtain information, combined with the structured attention mechanism to build an GRU rumor detection model. The introduction of attention mechanism makes the network model tend to grasp the text Semantic information. Finally, the Adam algorithm is used to optimize the proposed model, and the loss function of the model is constructed and minimized in combination with the binary cross-entropy loss function. The results show that the detection precision rate, recall rate, F1 value and accuracy rate of the proposed method are the largest, reaching 95.28%, 88.78%, 88.69% and 94.89%, respectively, and the detection performance is better than the other three comparison algorithms.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-09-14T07:00:00Z
      DOI: 10.1142/S0218126624500099
       
  • Electrical Characterization of the Clamping Behavior on
           CMOS Quasi-Floating-Gate Circuits

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      Authors: Jesus E. Molinar-Solis, Daniel Sanchez-Arias, Daniel Fajardo-Delgado, Juan J. Ocampo-Hidalgo, Ivan Padilla-Cantoya
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      In this paper, the clamping effect introduced by several diode-based configurations used for the implementation of the high-value resistors in quasi-floating-gate circuits is analyzed and characterized. In contrast to previous approaches where a parasitic diode is treated as a simple high-value resistor reducing the circuit complexity, in this case the analysis considers the diode behavior which leads to a clamping circuit. This clamping circuit introduces an unwanted amplitude-dependent offset voltage, which affects the performance moving the quiescent point at the quasi-floating-gate transistors. A new anti-parallel diode configuration for quasi-floating-gate applications is proposed in this work, which eliminates this unwanted offset voltage. The proposed design is validated using simulations and experimental data in a CMOS 0.35-[math]m technology.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-09-14T07:00:00Z
      DOI: 10.1142/S0218126624500683
       
  • Amplitude Control Loop to Compensate for I/Q Mismatch in an Accurate
           Quadrature LC Oscillator

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      Authors: Hojat Ghonoodi, Mahsa Hadjmohammadi, Shahram Modanlou
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      In this paper, a novel parallel-coupled quadrature LC oscillator (PC-QO) is presented that can automatically eliminate imbalances of output phase and amplitude resulting from mismatches in the LC tanks. The method of using unequal coupling factors in a parallel-coupled quadrature oscillator is the base of this design; canceling the phase and amplitude errors takes place by tuning the imbalanced coupling factor using tuneable tail currents. First, the proposed circuit senses the amplitude error and then adjusts the coupling factors according to the situation. We show that using the inversely proportional coupling factors can eliminate the phase and amplitude error simultaneously. In other words, this design uses the amplitude control loop to cancel the phase and amplitude error. The circuit has been simulated using TSMC 0.18 CMOS practical model to confirm the high accuracy of the analysis and capability of the canceling [math]/[math] mismatch technique. The simulation results show that the phase noise of the proposed quadrature voltage controlled oscillator (QVCO) is −123.9 dBc/Hz at 1[math]MHz offset from 4.4[math]GHz operation frequency. The total power consumption of the QVCO is 3.4[math]mW.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-09-14T07:00:00Z
      DOI: 10.1142/S0218126624500725
       
  • A 2.48 pJ/pulse Low-Power IR-UWB Transmitter in 0.18-[math]m CMOS Process

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      Authors: Baolin Wei, Peisi Mo, Xueming Wei, Weilin Xu
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      This paper presents a low-power, OOK-modulated, impulse-radio ultra-wideband (IR-UWB) transmitter. The pulse generation method is derived from a filtered combined edge technique, where narrow pulses are produced by a delay-and-logic gate and shaped with a filter to generate UWB pulses compliant with the FCC standard. The pulse-shaping filter and antenna driving circuit are co-designed and combined into one, that is, a pulse amplifying and shaping circuit that operates in the C-class state, resulting in extremely low complexity, low power, and small circuit area. The proposed IR-UWB transmitter was implemented and fabricated using a standard 0.18-[math]m complementary metal oxide semiconductor (CMOS) 1p6m process. The power supply voltage is 1.5[math]V and the targeted maximal data rate is 250[math]Mbps. The chip measurement results show that the output UWB signal covers 3.1–6.0[math]GHz frequency band, the power spectrum density conforms to the FCC spectrum masks, and the peak-to-peak voltage of the output UWB pulses is 183[math]mV. In addition, the core area of the chip is 0.098[math]mm2 and the transmitter power consumption is 2.48[math]pJ per pulse.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-09-14T07:00:00Z
      DOI: 10.1142/S0218126624500750
       
  • Implementation of Efficient Vedic Multiplier and Its Performance
           Evaluation

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      Authors: Ashutosh Mugatkar, Suhas S. Gajre
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      The ancient Vedic mathematics is well known for quicker handy multiplications but its recognition as an integrated circuit core against existing hardware multipliers is not established. As optimized hardware implementation of binary multiplier is one of the prominent unsolved problems in computer architecture, this paper proposes efficient Urdhava Tiryakbhyam Vedic multiplier architecture and compares it with the set of hierarchical multiplication algorithms which generate multiplication result in a single clock cycle. Two innovative algorithms are proposed here, one with a compact structure and another for faster execution. Also, its optimized transistor level layout is designed and implemented. To maintain homogeneity for comparison, all the algorithms are programmed on a common HDL language platform and analyzed with the same tool and technology. Final results indicate that the proposed architecture delivers 15.5% less power delay product (PDP) compared to closest competitor algorithm.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-09-07T07:00:00Z
      DOI: 10.1142/S0218126623502535
       
  • Joint Measurement of Thermal Discomfort by Occupant Pose, Motion and
           Appearance in Indoor Surveillance Videos for Building Energy Saving

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      Authors: Yu Wang, Yingjie Wang, Wenjun Duan, Yuanjie Zheng, Peiyong Duan
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      To accurately describe the thermal comfort of indoor occupant used to regulate heating, ventilation and air conditioning (HVAC) system is a key goal to reduce energy consumption in intelligent buildings. In this paper, we propose a noncontact measurement of occupant thermal discomfort behavior as an index of thermal comfort. The method takes the existing monitoring image data in the building as the input to infer the occupant thermal discomfort directly, which saves the cost because there is no need to install new sensors in the building and the occupant does not need to wear additional equipment. The framework combined three channels of body posture, motion and performance information to infer occupant thermal discomfort behavior, it consists of a human detection and crop module, a posture analysis module, an optical flow extraction module and a 3D convolutional neural network module. The three channels describe the actions from different perspectives, and the proposed method makes full use of the complementarity of the three modalities to identify the occupant’s thermal discomfort behaviors. Sixteen postures related to thermal discomfort were identified through a questionnaire, and 14,800 video clips containing these postures were collected for experimental evaluation. The results demonstrate the superior performances of our approach to the state-of-the-art techniques. The framework achieves noninvasive, cost-effective thermal comfort evaluation, and has potential value in improving energy efficiency of HVAC systems.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-09-07T07:00:00Z
      DOI: 10.1142/S0218126624500518
       
  • A Machine Learning-Based Approach for Crop Price Prediction

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      Authors: H. L. Gururaj, V. Janhavi, H. Lakshmi, B. C. Soundarya, K. Paramesha, B. Ramesh, A. B. Rajendra
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Agriculture is associated with the production of essential food crops for decades and is the one which is playing an important role in the economy of a country as well as in life of an individual. Due to various uncertain variations in the climatic conditions such as rain and other affecting factors, crop prices vary in an unusual pattern. This variation of prices without the knowledge of the farmer may lead to losses in the economy of the individual who is involved in agriculture. In this paper, we have discussed a well-designed system which accurately predicts the crop prices of future months. We have used a Supervised Machine Learning algorithm that is Decision Tree Regression technique for the design of the prediction model as the data is of continuous form. The parameters, which are considered in the dataset, include crop name, month, year, rainfall and wholesale price index (WPI). We have considered the data of 22 crops in total with 4 parameters. We have developed a user-friendly user interface consisting of 22 crop profiles with the predicted prices. Our results show that the regression model achieved an accuracy of 97.32% which will help the farmer on decision of future crop selection for the growth and also hyperinflation can be avoided.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-09-07T07:00:00Z
      DOI: 10.1142/S0218126624500543
       
  • End-to-End Dual-Stream Transformer with a Parallel Encoder for Video
           Captioning

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      Authors: Yuting Ran, Bin Fang, Lei Chen, Xuekai Wei, Weizhi Xian, Mingliang Zhou
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      In this paper, we propose an end-to-end dual-stream transformer with a parallel encoder (DST-PE) for video captioning, which combines multimodal features and global–local representations to generate coherent captions. First, we design a parallel encoder that includes a local visual encoder and a bridge module, which simultaneously generates refined local and global visual features. Second, we devise a multimodal encoder to enhance the representation ability of our model. Finally, we adopt a transformer decoder with multimodal features as inputs and local visual features fused with textual features using a cross-attention block. Extensive experimental results demonstrate that our model achieves state-of-the-art performance with low training costs on several widely used datasets.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-09-07T07:00:00Z
      DOI: 10.1142/S0218126624500749
       
  • Design and Analysis of a Buck–Boost DC–DC Converter with Delta-Sigma
           Modulator Controller

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      Authors: Hamed Hekmati, Abbas Nasri, Siroos Toofan
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      This paper presents a low-ripple and high-efficiency buck–boost DC–DC converter with delta-sigma modulator controller that converts 1.8 V to 1.2 V and 3.3 V. A current and voltage closed-loop controller has been designed to achieve better performance simultaneously such as lower settling-time, steady-state error and over shoot and under shoot. The converter is started in the current controller mode initially, when the output voltage approaches the desired value, the power stage is controlled with the voltage controller mode. PI compensator and a third-order delta-sigma modulator are utilized in the voltage mode. Also, the closed-loop stability of the designed converter has been analyzed with Lyapunov method using converter nonlinear model. This work has been simulated in MATLAB-SIMULINK environment. The performance results show that the maximum efficiency of the closed-loop DC–DC converter is 90% at 5[math]MHz switching frequency, and the output voltage ripple is 0.5% and 0.6% for the buck and boost modes, respectively. Also, the simulation results demonstrate the closed-loop stability of the converter in the presence of 10% load variation.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-09-06T07:00:00Z
      DOI: 10.1142/S0218126623501761
       
  • A High Bandwidth Compact Integrable Configuration of Floating Memristor
           Emulator

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      Authors: Kapil Bhardwaj, Mayank Srivastava
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      A compact memristor emulator structure using ten CMOS transistors-based structures is presented with a fully floating circuit configuration. Along with the use of such a compact CMOS structure to form a transconductance cell, the circuit requires only a single grounded capacitance and two external MOS transistors. Unlike several externally employed transconductance cells-based memristor emulators reported previously, the proposed circuit can be considered a compact architecture due to the non-employment of any external multiplier and floating passive elements, and also a lesser number of used transistors. The electronic tunability and wide-band operating frequency range (400[math]Hz–50[math]MHz) are the other attractive features of the proposed emulator. The circuit has been tested by performing simulations using PSPICE with 0.18[math][math]m CMOS technology. The presented simulation results clearly show the ideal non-volatile nature found in the realized memristor, which has also been employed in a neuron circuit based on the proposed emulator depicted in the article. The neuron circuit has been used to generate a spike output by applying a post-synaptic signal equivalent DC input. Finally, the circuit idea of the proposed memristor emulator has been tested by using commercial IC LM13700.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-09-02T07:00:00Z
      DOI: 10.1142/S021812662450066X
       
  • A Lightweight Insulator Detection Methodology for UAVs in Power Line
           Inspection

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      Authors: Yue Meng, Yiming Tang, Xiang Huang, Haoyu Wang, Jie Zhu, Wenjuan Tang, Lu Chen
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      The defect of insulators on the power line may lead to the failure of the electric transmission system, which in turn endangers the safe and reliable operation of the whole power system. Therefore, timely and accurate detection of insulators has become a current research hotspot. However, manual inspection cannot guarantee real-time detection and is prone to security accidents. Thanks to the convenience of Unmanned Aerial Vehicles (UAVs), collecting insulator images by UAVs and designing detection algorithms on insulators for real-time and accurate insulator detection have become a practical option. In this paper, considering the poor computing resources of UAVs, a lightweight object detection algorithm, NanoDet, is trained to detect insulators. In addition, to fully utilize the computing resources, the proposed model is segmented. Power-efficient layers are mapped to the central processing units (CPUs) for execution. Experimental results indicate that the proposed model can cut down the power consumption by up to 46.4% without violating the time constraint.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-09-02T07:00:00Z
      DOI: 10.1142/S0218126624500695
       
  • A Deep Learning Network-on-Chip (NoC)-Based Switch-Router to Enhance
           Information Security in Resource-Constrained Devices

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      Authors: Ali M. Al Shahrani, Ali Rizwan, Abdullah Algarni, Khalid A. Alissa, Mohammad Shabaz, Bhupesh Kumar Singh, John Zaki
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      In a resource-constrained environment of the 21st century, the use of hardware-based reconfigurable systems such as Field Programmable Gate Array (FPGAs) is considered an effective way to enhance information security. In comparison with traditional custom circuitry that does not give a flexible approach, it is observed that the reconfigurable hardware shows an excellent potential for cyber security by increasing hardware speeds and flexibility. Therefore, in a quest to integrate multi-core systems, the Network-on-Chip (NoC) has become one of the popular widespread techniques to maximize router security. Due to the significant overhead of chip space and the power consumption of the routers, it is substantially more expensive to construct as compared to a bus-based system. The control component (CC) interacts with the networks that inject packets based on router switching and activity. These control components are coupled with each network to produce a system of controlled networks. The system is further linked with CFM or a Centralized Fabric Manager, which serves as the network’s focal point. After that, the CFM runs the algorithm regularly. The analytic parameters comprise flip flop, power, latency, number of lookup tables (LUTs), and throughput. In the proposed method, the number of LUTs is [math], the flip flop is [math], the power is [math]W, the latency is 5941[math]ns, and the planned throughput is 0.56 flits/cycle. Results indicate that the crossbar switch reduces errors and minimizes the delay in the architecture’s outcome level, which further overcomes the descriptions of performance, power throughput, and area delay parameters. The findings of the research can be useful to enhance information security among lightweight devices besides minimizing the chances of network attacks in today’s dynamic and complex cyberspace.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-08-31T07:00:00Z
      DOI: 10.1142/S0218126624500646
       
  • Protected and Energy-Efficient E-Healthcare System Based on Internet of
           Healthcare Services

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      Authors: S. Ganesh Prabhu, P. Jayarajan, E. Nandakumar
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      The Internet of Things (IoT) is gaining a tons of attention in numerous industries due to its low-cost autonomous sensor operations. IoT devices in healthcare and medical activities establish an environment that recognizes the patients’ health status such as stress levels, oxygen supply, pulse and warmth, and responds quickly in the event of an emergency. Moreover, various systems founded on low-powered biosensor nodules have been proposed to monitor patients’ medical conditions utilizing Wireless Body Area Network (WBAN); despite the fact that controlling increasing power usage and communication expenses is time-consuming and attention-demanding. Another difficult research problem is data privacy and integrity in the presence of malicious traffic. Therefore, to overcome the above-stated limitations, this research introduces a Safe and the Energy-Efficient Framework for e-Healthcare using Internet of Medical Things (IoMT), whose main goal is to reduce transmission cost but also power usage among biomaterials while sending health records conveniently and, on the other hand, to protect patients’ medical data from unverified and malevolent base stations to increase internet confidentiality and protection.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-08-29T07:00:00Z
      DOI: 10.1142/S0218126624500609
       
  • An Image Classification Method Based on Semi-Supervised Classification
           Learning and Convolutional Neural Networks

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      Authors: Liyan Shi, Hairui Chen
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      This paper aims to propose an improved image classification model to reduce the cost of model construction. Aiming at the problem that network training usually requires the support of a large number of labeled samples, an image classification model based on semi-supervised deep learning is proposed, which uses labeled samples to guide the network to learn unlabeled samples. A convolutional neural network model for simultaneous processing of labeled and unlabeled data is constructed. The tagged data is used to train the Softmax classifier and provide the initial K-means clustering center for the untagged data. The nonsubsampling contourlet layer is used to replace the first convolutional layer of the full convolutional neural network to extract multi-scale depth features, and the nonsubsampling contourlet full convolutional neural network is constructed. The network can extract multi-scale information of the images to be classified, and extract more discriminative deep image features. In addition, the parameters of the nonsubsampled contourlet layers are pre-set and do not require network training. The proposed method has higher classification accuracy than the contrast method on polarimetric SAR images using the nonsubsampled contourlet full convolutional neural network.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-08-28T07:00:00Z
      DOI: 10.1142/S0218126624500567
       
  • Investigation of MEMS Single Turn Meander-Shaped Silicon Carbide
           Piezoresistive Pressure Sensor on a Clamped Circular Diaphragm for High
           Pressure Harsh Environment Applications

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      Authors: Dadasikandar Kanekal, Sumit Kumar Jindal
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Silicon-based Microelectromechanical System (MEMS) pressure sensors are extensively used and have the advantages of high accuracy and miniaturization. Despite this, due to inherent material limitations, they are not easily able to withstand high temperatures greater than 150[math]C. To overcome this disadvantage, Silicon Carbide (SiC) is the preferred material because it has excellent thermomechanical properties and operates above 600[math]C. Piezoresistive pressure sensors made of Silicon Carbide are ideally able to detect pressures beyond 600[math]C. Our work presents MEMS Single turn meander-shaped piezoresistive pressure sensor on a circular SiC diaphragm for high pressure applications of pressure range 0–40[math]MPa in harsh environment. This work models and analyses the piezoresistive pressure sensor characteristics using an analytical modeling and simulation method to choose the best design. To ascertain its sensitivity, expressions are computationally simulated with MATLAB software using the thin plate and small deflection theory. To evaluate the viability of the model, COMSOL Multiphysics simulation is used. When compared to recent studies, our proposed sensor provides a sensitivity of near about 5.4[math]mV/V/MPa across a pressure range of 0–40[math]MPa.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-08-28T07:00:00Z
      DOI: 10.1142/S0218126624500658
       
  • Low-Voltage Current-Mode Full-Wave Rectifier Employing FVF-Biased MOS
           Translinear Loop

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      Authors: Aakriti Chhabra, Bhawna Aggarwal, Raj Senani
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      In this communication, a low-voltage complementary metal-oxide semiconductor (CMOS) current-mode full-wave rectifier (FWR), implemented from a flipped voltage follower-biased MOS translinear loop (FVF-MTL) is presented. The use of flipped voltage follower (FVF) minimizes the overall supply voltage demand by reducing the voltage headroom while maintaining the operation of the MOSFETs in strong inversion mode. The functioning of the proposed FWR circuit has been demonstrated through simulations carried out on Cadence Virtuoso software at [math] CMOS technology at a supply voltage of 0.85[math]V. The proposed FWR works over an input range of [math] with a maximum linearity error of 3% in its transfer characteristics. The -3 dB bandwidth of the circuit has been found to be 54.95[math]MHz. The minimum power and maximum power consumed by the circuit are 22.6[math]nW and [math], respectively. Post-layout simulations, Monte Carlo (MC), corner and temperature analyses have been carried out to estimate the performance and robustness of the proposed circuit.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-08-24T07:00:00Z
      DOI: 10.1142/S0218126624200019
       
  • Complex Text Detection Algorithm Based on Edge Attention Mechanism

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      Authors: Shaoguo Cui, Xi Chen, Zhenping Mou, Zheng Xie, Yisha Sun, Dongchun Li
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      In computer vision, automatically identifying and locating text in images or videos is an important task. Traditional text detection methods are not effective in detecting complex scenes in irregular rectangular areas such as text bending, spacing, and special shapes, which are mainly reflected in the fragmentation of text detection areas. In this paper, a text detection method based on edge attention mechanism is proposed to better adapt to complex scenes. The proposed method takes Encoder–Decoder as the core idea. First of all, an edge attention module is designed, including global attention and local attention. The global attention module is used to perceive the features of text regions and nontext regions, while the local attention module is used to learn the information of text boundaries. Then a multi-scale feature fusion process is designed, which can strengthen the edge information and key information of text regions. Finally, the model outputs probability maps and threshold maps, and generates high-precision binary maps of text regions. After experimental verification, the proposed method on the public data set significantly reduces the fragmentation of the detection area, improves the detection accuracy of the text area, and has better robustness for text detection scenes with unconventional rectangular areas.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-08-24T07:00:00Z
      DOI: 10.1142/S0218126624500427
       
  • Aspect-Oriented Lexicon-Based Sentiment Analysis of Students’
           Feedback

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      Authors: Abhinav Kathuria, Anu Gupta, R. K. Singla
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      The evaluation of feedback collected from students at the end of the year is very essential for every educational institution. It is important to improve the teaching–learning process and the annual appraisal process. The existing approach utilizes a Likert scale questionnaire, which allows students to express their level of agreement or disagreement with given statements or provide a neutral response. Additionally, the feedback form includes open-ended questions where students can provide textual feedback. This study introduces a Lexicon-based approach to automatically analyze the textual feedback concerning different aspects of teaching. Aspect-based Sentiment Analysis (ABSA) of student feedback aims to identify sentiments expressed toward various aspects of teachers, such as their ability to address student doubts and their overall knowledge. This study explores linguistic characteristics found in sentences, including negation, modifiers and contact shifters. To assess the sentiment of a sentence, the SentiWordNet lexicon is utilized to assign scores to individual words. Based on these scores, the sentence is categorized as either positive, negative or neutral. According to the experimental findings, the Aspect-Oriented Lexicon-Based (AOLB) approach demonstrates superior performance compared to other baseline methods when it comes to accurately scoring sentiment. The approach achieved a high accuracy rate of 94% for the student feedback dataset-I, 74% for the student feedback dataset-II, 55% for laptop reviews and 59% for restaurant reviews in the SemEval 2014 dataset-III.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-08-24T07:00:00Z
      DOI: 10.1142/S0218126624500506
       
  • A New Low-Voltage Second Generation Voltage Conveyor Using Merged Voltage
           Follower and DTMOS Techniques

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      Authors: Arvin Kumar, Shweta Kumari, Maneesha Gupta, Harish Parthasarathy
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      A very simple, compact and low-power second generation voltage conveyor circuit using only eight transistors is proposed in this work. Voltage follower stage is implemented using merged voltage follower (MVF), offering very low output impedance. A simple current mirror forms the input stage of the proposed voltage conveyor. To further enhance the linearity, another circuit is proposed where input transistor in MVF is replaced with DTMOS (Dynamic Threshold Voltage MOSFET), giving [math][math]mV linearity range as compared to [math][math]mV of the first proposal. Proposed-II VCII provides reduced offset voltage due to decreased effective threshold of DTMOS, and gain bandwidth product of the circuit also improves. Simulation results are computed using 180-nmCMOS technology with supply voltage of [math][math]V to validate the proposed circuits. Proposed-I and proposed-II VCII consume 85.1[math][math]W and 97.5[math][math]W, respectively. An application of the proposed conveyors as “current to voltage converter”, is also presented.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-08-24T07:00:00Z
      DOI: 10.1142/S021812662450052X
       
  • A New Approach to Signal-to-Noise Ratio Estimation in Adaptive
           Doppler–Kalman Filter for Radar Systems

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      Authors: Veljko Papic, Zeljko Djurovic
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Doppler frequency carries the information about the relative velocity of the object regarding the radar antenna. However, since the target maneuvers can be temporary with high intensity, Doppler frequency has to be estimated by using a window function in the frame of time-dependent Fourier transform. In order to minimize the estimation error, the window function width should be adaptive. The window length adaptation has been performed based on the estimates of target acceleration and signal-to-noise ratio (SNR). In this paper, we give focus on the SNR estimation and propose a new approach based on autoregressive method of spectral estimation, where in one step the amplitude of the sinusoidal signal and noise variance are estimated. The simulation results justify the advantage of the proposed approach in general applications of signal processing of one sinusoid in white noise environment.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-08-22T07:00:00Z
      DOI: 10.1142/S0218126624500361
       
  • Research on Full Coverage Path Planning Based on Reinforcement Learning in
           Nuclear Environment

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      Authors: Shiqi Wang, Shuzong Song, Zhenni Liu, Lijun Ma
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      In this paper, we study the path-planning problem of emergency fire control robots in the nuclear environment. Given the high risk of the atomic environment, the irregularity of spatial shape, and the complex distribution of obstacles, a robot path planning method is proposed based on the combination of [math]-learning and BCD raster map decomposition method. It realizes the automatic elimination control of the nuclear-contaminated environment and reduces the exposure risk of manual intervention operation. First, [math]-learning, a reinforcement learning model, is used to establish the optimal path between the start and end points of the operation area. Second, the BCD raster map decomposition method is used to realize the global division of the operation area. Then, an improved partition merging method based on the [math]-learning optimal path is proposed to complete the job sub-region merging and cover path planning. Finally, the simulation experiment proves that the technique can quickly and stably achieve the global path coverage of the unique operating environment of the nuclear domain.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-08-22T07:00:00Z
      DOI: 10.1142/S0218126624500610
       
  • Autonomous Localization and Mapping Method of Mobile Robot in Underground
           Coal Mine Based on Edge Computing

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      Authors: Qi Mu, Yuhao Wang, Xin Liang, Yang Tang, Zhanli Li
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      When applying visual SLAM systems to underground coal mines, several challenges arise. First, there are non-ideal texture areas in the scene, which make feature extraction and matching difficult and reduce the accuracy of positioning and mapping. Second, the limited computing resources of mobile robots prevent the real-time execution of complex algorithms. To address these challenges, this paper proposes an edge computing-based SLAM system that fuses point and line features. The visual odometer of point and line feature fusion solves the problem of insufficient feature extraction in texture sparse areas and incorrect feature matching in texture repetitive areas, thereby improving the accuracy of visual positioning and mapping. The distributed deployment strategy of edge computing enables the algorithm to be executed in real-time on the underground coal mine mobile robot. The experiment demonstrated that using the visual odometer method with ORB-SLAM 2 reduced the absolute trajectory error by 8.87% in dense repetitive texture areas and 9.96% in low texture areas.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-08-19T07:00:00Z
      DOI: 10.1142/S021812662450018X
       
  • NIDS-FLGDP: Network Intrusion Detection Algorithm Based on Gaussian
           Differential Privacy Federated Learning

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      Authors: Jiawei Du, Kai Yang
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      As a widely used network security defense technology, network intrusion detection has more deep learning methods used to improve the performance of intrusion detection. However, this method requires a large-scale network traffic data set for training, increasing privacy leakage risk. In this paper, a network intrusion detection algorithm based on Gaussian differential privacy federated learning (NIDS-FLGDP) is proposed. NIDS-FLGDP adopts the client–server architecture of federated learning, introduces the differential privacy of the Gaussian mechanism to ensure the security of the calculation process, uses the improved FedAvg algorithm to reduce communication overhead, and uses the improved 1D CNN to participate in collaborative training for the local model. Optimal parameters for Gaussian differential privacy and the optimal number of participating clients were determined from experiments. Model accuracy rates for binary classification and multi-classification training NIDS-FLGDP are 0.97, 0.975, 0.97 and 0.97, 0.985, 0.96, respectively, for KDD CUP99, NSL_KDD, and UNSW_NB15 network intrusion detection datasets. The results show that NIDS-FLGDP improves intrusion detection performance while protecting network traffic privacy compared with the previous methods. Its applicability and effectiveness have been fully verified, which provides a practical reference for the safe processing and analysis of a large number of diversified network traffic data in the future.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-08-19T07:00:00Z
      DOI: 10.1142/S0218126624500488
       
  • A Quad-Port Design of a Bow-Tie Shaped Slot Loaded Wideband
           (24.2–30.8[math]GHz) MIMO Antenna Array for 26/28[math]GHz mm-Wave 5G NR
           n257/n258/n260 Band Applications

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      Authors: Yousra Ghazaoui, Mohammed EL ghzaoui, Sudipta Das, Boddapati Taraka Phani Madhav, Tanvir Islam, Bri Seddik
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      This paper describes a four-port MIMO antenna array design featuring bow-tie-shaped slot-loaded patches with wideband capabilities that cover the frequency range from 24.2[math]GHz to 30.8[math]GHz. The proposed antenna design is printed on an FR4 substrate and occupies an area of 25[math]×[math]24[math]mm2. The MIMO antenna consists of four antenna arrays that are symmetrically placed in an upper-lower configuration. The bow-tie-shaped slots loaded radiators are separated horizontally by 3.48[math]mm and vertically by 5.94[math]mm. Each antenna array contains two elements that are separated by a distance of wavelength/4. The suggested MIMO antenna array delivers a high gain of 19.09[math]dB at 27.8[math]GHz and has a bandwidth of 6.6[math]GHz that covers the frequency band of 24.2–30.8[math]GHz. The research demonstrates the quality of the proposed MIMO antenna through various diversity parameters such as mutual coupling, port correlation, diversity gain, and data rate that can be transmitted over a communication medium. The simulation results are validated and found to be consistent with the experimental results. The presented antenna covers the entire bandwidth allocated to different regions, including Europe (24.25–27.5[math]GHz), Sweden (26.5–27.5[math]GHz), USA (27.5–28.35[math]GHz), China (24.25–27.5[math]GHz), Japan (27.5–28.28[math]GHz), and Korea (26.5–29.5[math]GHz). The proposed MIMO antenna design could be an excellent option for 26/28[math]GHz 5G NR n257, n258, and n260 bands under mm-wave wireless communication systems.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-08-19T07:00:00Z
      DOI: 10.1142/S0218126624500555
       
  • A Novel Robotic Path Planning Method in Grid Map Context Based on D* Lite
           Algorithm and Deep Learning

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      Authors: Zhen Lin, Liming Lu, Yu Yuan, Hong Zhao
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Mobile robot path planning has received more and more attention as an important technology in robotics. Based on the D* Lite algorithm, this paper constructs a robot path planning model in a grid map environment, and proposes a deep learning fusion algorithm for path planning under complex large maps. The D* Lite algorithm with excellent performance adopts the enhanced neural network algorithm with environment self-learning ability for local parts. The model introduces the gentle update method of the Q value in the D* Lite algorithm into the optimization target calculation, calculates the loss function and updates the network parameters, thereby solving the overestimation problem of deep reinforcement learning in the application of mobile robot path planning. In the simulation process, the idea of averaging is introduced into the e-greedy strategy, and the value function output by the previous generation parameter network is used to obtain the average result to determine the next action direction of the mobile robot. The experimental results show that in the simple environment and the complex environment, the planned path lengths in the environment are 44.21, 43.63 and 43.61[math]m, respectively, reducing the number of collisions with obstacles during the training process of the mobile robot, and improving the superiority and effectiveness of the algorithm.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-08-19T07:00:00Z
      DOI: 10.1142/S0218126624500579
       
  • SiamTDNN: Enhancing Discriminative Embeddings for Speaker Diarization

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      Authors: Runqing Zhang, Huijun Lu, Dunbo Cai, Zhiguo Huang, Yujian Du, Ling Qian, Yijun Zhang
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Recent advances in speaker embeddings promote a great development of speaker diarization. However, determining ‘who spoke when’ in the meeting scenarios is still challenging due to similar speaker voices and unknown speaker quantity. In this paper, this research proposes enhanced discriminative features for speaker diarization, including discriminative speaker-specific features based on Siamese networks, and a speaker re-verification method. With Siamese architecture, SiamTDNN, this research first explores latent representations which is capable of modeling intra-class and inter-class differences between speakers, by training with audio pairs. Then, the re-verification method is introduced with a local-global strategy to identify speakers in a multi-person talking scene. Our method provides a novel speaker embedding with enhanced discriminative power for disambiguated speakers and achieves an elevated upper bound on the number of speakers. The proposed speaker embedding achieved an EER of 1.1% and a minDCF of 0.1192 on VoxCeleb1 for the speaker verification task. Extensive experiments on AiShell-4, ICSI, AMI and VoxConverse demonstrate the effectiveness of the proposed method with an average DER reduction of 3% and an RTF of 0.0792.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-08-19T07:00:00Z
      DOI: 10.1142/S0218126624500580
       
  • A Design and Investigation Inexact Compressor Based on Low Power
           Multiplier

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      Authors: Sheetal Nagar, Shanky Saxena, Govind Singh Patel, SeemaNayak, Abhishek Kumar
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      To achieve low power consumption and high performance, an approximate multiplier is a commonly used operation. A new approximate computation method has been used for Error Tolerant Image Processing applications. This operation is popular in error tolerance applications. Inexact computing is applied to error-tolerant digital signal processing applications where error can be tolerated. Multiplier is the basic unit of arithmetic logic unit of any computer computational unit. In this paper, a new approximate compressor computation method is proposed for error-tolerant image processing applications. An approximate compressor has been designed for better output power with an improved figure of merit. A comparison of the proposed compressor with the previous 4:2 compressor design has been investigated and a reduction in area, delay and power consumption has been achieved. A similar algorithm has been applied to 8-bit multiplier applications which have considerable error performance. With the newly designed multiplier using a compressor, the simulation results compared the best power utilization. The results of designing the multiplier indicate that the proposed design of a multiplier using an approximate compressor achieves a reduction in power by 129[math]mw.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-08-17T07:00:00Z
      DOI: 10.1142/S0218126623502985
       
  • Overflow Oscillation Elimination in Fixed-Point 2D Digital Filters Based
           on the Roesser Model

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      Authors: Shimpi Singh, Haranath Kar
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      This paper investigates the overflow oscillation elimination problem in the fixed-point two-dimensional (2D) digital filter (DF) based on Roesser model subjected to two’s complement overflow (TCO) nonlinearities. By utilizing the system information and behavior of TCO nonlinearities more effectively, a new global asymptotic stability (GAS) criterion for 2D DFs is presented. A comparison of the obtained criterion with existing criteria is made with the help of examples.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-08-17T07:00:00Z
      DOI: 10.1142/S0218126624500440
       
  • Ins Finder: A Practical CPU Undocumented Instruction Detection Framework

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      Authors: Renhai Dong, Baojiang Cui, Yi Sun, Jun Yang
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      As the basic and core component of electronic systems, CPU security is extremely important to network security. Even an unremarkable faulty instruction on the CPU may lead to serious security problems, such as the operating system crashes or privilege increase since it is often considered as a trusted black box. Therefore, CPU instruction detection is particularly crucial to CPU security. However, most existing methods of CPU instruction detection, based on the inconsistency of microarchitecture and instruction set design, suffer from slow speed and low accuracy. Our work is motivated to propose a practical framework for searching CPU undocumented instruction with fast speed and high accuracy. In this paper, we put forward a general framework InsFinder to detect undocumented instruction on CISC and RISC CPU by an efficient and accurate fuzzing method. It makes use of the instruction format to make advanced predictions, which greatly reduces the search space. Moreover, by introducing classification, de-redundancy, and verification, InsFinder greatly improves the detection accuracy. Experiments show that compared with the existing methods, InsFinder is more effective which costs at least 50% less processing time in detecting undocumented instructions on x86-64, ARM64, and RISC-V, and more accurate which divided the detection results into 4 categories. After filtering, the detection results were reduced from millions to less than 10,000.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-08-17T07:00:00Z
      DOI: 10.1142/S0218126624500476
       
  • A Low-Power Capacitorless LDO Regulator with Transient Enhancement
           Structure

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      Authors: Lixia Zheng, Yi Zhu, Huiyong Xian, Jinwen Li, Chenggong Wan, Jin Wu, Weifeng Sun
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      In this paper, a portable low-power low dropout regulator (LDO) with no output capacitance has been designed in 0.18-[math]m CMOS technology. In this paper, a PMOS power transistor is used and combined with an overshoot and undershoot suppression circuit to improve the transient response of the circuit. A modified Class-AB operational transconductance amplifier (OTA) is used to reduce power consumption and act as an error amplifier to eliminate low frequency poles. At the same time, a super source follower and a Miller capacitor are used for frequency compensation of the system. Finally, the system can provide a stable voltage for a load step from 0.2 to 25[math]mA in 500[math]ns edge-time for 140[math]pF-load capacitance. The test results show that the circuit achieves a good voltage regulation rate and high transient response.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-08-17T07:00:00Z
      DOI: 10.1142/S021812662450049X
       
  • First-Order Universal Active Filter Configuration Using Single VCII+

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      Authors: Kirti Kaharwar, D. R. Bhaskar, Pragati Kumar, Ram Bhagat
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      A new universal active filter configuration is presented in this paper which is capable of realizing all three first-order filter responses namely all pass (AP), low pass (LP) and high pass (HP) using a single second generation voltage conveyor (VCII+), a virtually grounded capacitor and two resistors. The proposed circuit offers tunability of the cut-off frequency, gain (for HP filter) and simultaneous availability of two filter outputs, one at a low impedance node (HP/AP), the other output, namely the LPF will require a voltage buffer to avoid loading. The nonideal analysis of filter responses based on the nonideal model of VCII+ is carried out by considering all the parasitic immittances and nonideal gains and found that they have no significant effect on the performance of the proposed filter structure. Sensitivity analysis with respect to active and passive components has also been carried out. The functionality of the presented circuit has been validated through simulations and experimental results, where the VCII+ was implemented using the macro model of the commercially available CFOA IC AD844. Additionally, the proposed circuit has been tested using a CMOS VCII+ implemented with 0.18[math][math]m TSMC technology parameters. The tests include advanced evaluations based on Monte Carlo simulations.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-08-09T07:00:00Z
      DOI: 10.1142/S0218126624500385
       
  • Ant Colony Optimization with Levy-Based Unequal Clustering and Routing
           (ACO-UCR) Technique for Wireless Sensor Networks

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      Authors: N. Anil Kumar, Y. Sukhi, M. Preetha, K. Sivakumar
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Wireless Sensor Networks (WSN) became a novel technology for ubiquitous livelihood and still remains a hot research topic because of its applicability in diverse domains. Energy efficiency treated as a crucial factor lies in the designing of WSN. Clustering is commonly applied to increase the energy efficiency and reduce the energy utilization. The proper choice of cluster heads (CHs) and cluster sizes is important in a cluster-based WSN. The CHs which are placed closer to base station (BS) are affected by the hot spot issue and it exhausts its energy faster than the usual way. For addressing this issue, a new unequal clustering and routing technique using ant colony optimization (ACO) algorithm is presented. Initially, CHs are chosen and clusters are constructed based on several variables. Next, the ACO algorithm with levy distribution is applied for the selection of optimal paths between two nodes in the network. A comprehensive validation set takes place under diverse situations under the position of BS. The experimental outcome verified the superiority of the presented model under several validation parameters.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-08-09T07:00:00Z
      DOI: 10.1142/S0218126624500439
       
  • Gain-Controllable Transadmittance-Mode First-Order Allpass Filters with
           Electronic Tune Using Single Active Element

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      Authors: Chaiya Tanaphatsiri, Fabian Khateb, Roman Sotner, Winai Jaikla
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      First-order allpass filters are analog filters with a unit magnitude response, but they change the phase shift between input and output signals at various frequencies. This paper presents the transadmittance-mode first-order allpass filters based on the modified current-controlled current differencing transconductance amplifier (M-CCCDTA). The proposed filters utilize a single M-CCCDTA and a grounded capacitor with no external resistors, making them well suited for implementation in an integrated circuit. The gain and phase response of the proposed filters can be adjusted electronically and separately. Also, the high output impedance of the proposed filters at both the input voltage node and the output current node makes cascading easy without the need for buffer devices. A quadrature sinusoidal oscillator based on the proposed first-order allpass filter has been designed as an example of an application. The PSpice simulation and actual experiments are utilized to validate the functionality of the proposed filters. The simulation and experimental results are consistent with the idea of anticipation.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-08-09T07:00:00Z
      DOI: 10.1142/S0218126624500464
       
  • Design and Implementation of a Dynamic Tracking System for Drones in
           Modern Medical Treatment Applications

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      Authors: Xilong Qu, Xiao Tan, Siyang Yu, Ting Wang
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      The utilization of unmanned aerial vehicles (UAVs) equipped with advanced machine vision and remote sensing technology has ushered in a transformative era across diverse domains such as agriculture, construction, energy, environmental monitoring, and contemporary medical treatment. Particularly within the realm of modern medical treatment, the integration of drone technology into healthcare service delivery has displayed tremendous promise for enhancing patient outcomes, particularly in geographically challenging areas or during emergent situations. Quad-rotor UAVs have emerged as prominent contenders owing to their exceptional performance, user-friendly controls, and adaptable functionality. Their quad-rotor configuration enables seamless vertical takeoff and landing, rendering them highly suitable for deployment in demanding environments frequently encountered in the context of modern medical treatment. When combined with cutting-edge machine vision and remote sensing capabilities, quad-rotors exhibit proficiency in executing intricate missions encompassing medical supply delivery, mobile target tracking, anomaly detection, topographical mapping, and even facilitating emergency medical response scenarios. These remarkable capabilities render quad-rotors indispensable tools for healthcare professionals including doctors, nurses, and other dedicated personnel in the provision of high-quality healthcare services within the realm of modern medical treatment. The design and implementation of a dynamic tracking system predicated on machine vision and remote sensing technology assume paramount importance in ensuring optimal UAV operations in modern medical treatment applications. A meticulously crafted system should possess the capacity to process visual information through sophisticated machine vision algorithms, thereby transforming it into precise control data for the UAV. Employing a remote sensing target detection model serves to accurately locate and identify pertinent information embedded within optical remote sensing imagery, thereby generating a comprehensive output feature map information set. Integration of this information with the cascade PID (Proportion Integral Differential) control algorithm facilitates the realization of a dynamic tracking system tailored specifically for quad-rotor UAVs. Through meticulous experimentation, the system can be effectively harnessed for portable high-altitude visual detection, thereby endowing healthcare services with promptness and efficiency. For instance, the system can be leveraged to meticulously track the movement of medical supplies during transportation, remotely monitor patients’ vital signs, and even facilitate the expeditious delivery of essential medications or vaccines to individuals situated in remote and inaccessible locations during modern medical treatment. As the demand for healthcare services continues to surge, the prevalence of drones equipped with state-of-the-art machine vision and remote sensing technology within modern medical treatment contexts is expected to increase manifold. Consequently, sustained research and development endeavors dedicated to advancing this technology assume paramount significance, thereby ensuring its seamless and efficacious implementation within the modern medical treatment field.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-08-08T07:00:00Z
      DOI: 10.1142/S0218126624500415
       
  • A Fast-Warning Method of Financial Risk Behavior Based on BP Neural
           Network

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      Authors: Qun Yang, Zhengyan Xi
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      With the speedy development of economy, there are many issues in business enterprise finance, and organization finance is going through large risks. With more and more complicated market environment, the uncertainty danger of business enterprise operation intensifies, and economic crises happen frequently. The monetary disaster of a company regularly shows that there can also be a complete crisis. Once the organization is deeply in economic crisis, it can also now not be capable to make certain the ordinary capital chain of the enterprise, and in serious cases, it may also have an effect on the sustainable operation of the agency or even make the employer bankrupt and liquidate. Therefore, we have to set up a best financial catastrophe early warning model to prevent and control the occurrence of economic disaster risk. BP neural network can, quite in shape nonlinear feature relationship, have true gaining knowledge of adaptability, excessive parallel computing and statistics processing ability. In view of the actual state of affairs of commercial enterprise, business enterprise and economic risk, the BP neural community algorithm is used to predict agency financial risk and a hazard prediction model in particular primarily based on BP neural community is established. The simulation consequences exhibit that the accuracy and correctness of economic hazard conduct early warning primarily based on BP neural network are 91.51% and 95.28%, respectively. It is proved that the fast-warning approach of economic threat that is conducted primarily based on BP neural network has excessively taken a look at the accuracy and robust cognizance ability.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-08-04T07:00:00Z
      DOI: 10.1142/S0218126624500087
       
  • An Adaptive Cuckoo Algorithm-Based Optimization Method for Tourist Traffic
           Routes

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      Authors: Qian Hong, Yanbin Sun
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      This paper presents in-depth research and analysis of the optimization method of tourist traffic routes using the adaptive cuckoo algorithm. The traditional cuckoo algorithm has the disadvantages of slow convergence speed and easy falling into local extremes. This paper proposes the iterative adaptive CHSACS algorithm based on iteration. Based on the original CS algorithm, a dynamic adaptive step control amount and a segmented weighted position update formula are introduced to give a class of improved CS algorithms to coordinate the problem of local search and global search of the CS algorithm and speed up the convergence speed at the later stage. To address the problem that the out-of-bounds nests interfere with the convergence of the algorithm, a memory strategy is introduced to relocate the out-of-bounds nests in the search space to improve the stability of the algorithm. Experiments are conducted on the iterative adaptive-based conductive CHSACS algorithm with test function sets. Compared with the original CS algorithm, and ACO algorithm, the CHSACS algorithm has faster convergence, higher search accuracy and a better ability to avoid local optima when dealing with continuous function optimization problems. For the dynamic travel path problem of travel time optimization, the road travel time and sightseeing time of different periods are predicted based on historical data, and the most traveled distance of travel time between two sights is dynamically searched by using the search mechanism based on time windows. The iterative adaptive CHSACS algorithm is used to continuously find the tourist traffic route with the shortest travel time travel path from all combinations of tour sequences. This paper combines the characteristics of bus vehicle scheduling itself, takes into account the interests of both bus companies and tourists, establishes a bus vehicle scheduling model with the departure interval as the independent variable, introduces this hybrid cuckoo algorithm into bus scheduling, verifies the scientific and feasibility of the algorithm through examples, and provides a new idea for solving bus scheduling optimization problems.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-08-04T07:00:00Z
      DOI: 10.1142/S0218126624500336
       
  • A Feature Extraction Approach for the Detection of Phishing Websites Using
           Machine Learning

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      Authors: Sri Charan Gundla, M. Praveen Karthik, Middi Jashwanth Kumar Reddy, Gourav, Ashutosh Pankaj, Z. Stamenkovic, S. P. Raja
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      In this growing world of the internet, most of our daily routine tasks are somehow connected to the internet, from smartphones to internet of things (IoT) devices to cloud networks. Internet users are growing rapidly, and the internet is accessible to everyone from anywhere. Data phishing is a cyber security attack that uses deception to trick internet users to get their content and information. In this attack, malicious users try to steal personal data such as login credentials, credit card details, health care information, etc., of the users on the internet. They exploit users’ sensitive information using vulnerabilities. Information stealers are known as phishers. Phishers use different techniques for phishing. One of the most common methods is to direct the users to a false website to enter their login credentials and their details on these phishing sites. Phishing websites look like the original websites. Phishers use these details to get access to the user’s accounts and hijack them for monetary purposes. Many internet users fall for this trap of phishing sites and share their personal and sensitive details. In this paper, we will analyze and implement machine learning (ML) techniques to detect phishing attacks. There are different methods to identify phishing attacks, one of them is by checking the uniform resource locator (URL) address using ML. ML is used to teach a machine to differentiate between phishing and original site URLs. There are many different techniques to overcome this attack. This research paper aims to provide accurate and true phishing detection with less time complexity.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-08-03T07:00:00Z
      DOI: 10.1142/S0218126624500312
       
  • A New Effective APEAO Algorithm Assisted Positive Output-Super Lift Luo
           Converter with PV-Wind Energy System

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      Authors: M. Selva Rani, G. Uma
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      The importance of renewable energy resources in the energy province necessitates the use of photovoltaic (PV) and wind systems to power brushless DC (BLDC) motors for applications such as water pumping and automobiles. In this research, an optimized MPPT-based positive output super-lift Luo converter (PO-SLLC) is presented for a hybrid power system with a BLDC motor to overcome the constraints of ordinary DC–DC converters. The Luo converter produces a positive output voltage which aids in achieving a high power density with fewer ripples in the voltage and current profile. The output voltage grows in geometric progression, increasing the converter’s efficiency, according to its mathematical model. Adjustment parameter enhanced Aquila optimization (APEAO) is used to optimize the duty cycle of the PO-SLLC from the MPPT controller and the controller parameters of the PI controller of the wind system. The proposed system’s behavior for variations in irradiation patterns with constant load torque is simulated in MATLAB/Simulink. The settling time and overshoot obtained with the proposed optimized controller are compared to those obtained with other optimization controllers, such as ant colony optimization (ACO), genetic algorithm (GA), Aquila optimization (AO), advanced version of harmony search algorithm (2N[math][math][math]1-HSA) and opposition based quantum bat algorithm (OQBA) and it is demonstrated that the proposed APEAO optimized controller has good dynamic performance.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-08-02T07:00:00Z
      DOI: 10.1142/S0218126623503048
       
  • Guided Intelligent Hyper-Heuristic Algorithm for Critical Software
           Application Testing Satisfying Multiple Coverage Criteria

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      Authors: S. Alagu Rani, C. Akila, S. P. Raja
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      This paper proposes a novel algorithm that combines symbolic execution and data flow testing to generate test cases satisfying multiple coverage criteria of critical software applications. The coverage criteria considered are data flow coverage as the primary criterion, software safety requirements, and equivalence partitioning as sub-criteria. The characteristics of the subjects used for the study include high-precision floating-point computation and iterative programs. The work proposes an algorithm that aids the tester in automated test data generation, satisfying multiple coverage criteria for critical software. The algorithm adapts itself and selects different heuristics based on program characteristics. The algorithm has an intelligent agent as its decision support system to accomplish this adaptability. Intelligent agent uses the knowledge base to select different low-level heuristics based on the current state of the problem instance during each generation of genetic algorithm execution. The knowledge base mimics the expert’s decision in choosing the appropriate heuristics. The algorithm outperforms by accomplishing 100% data flow coverage for all subjects. In contrast, the simple genetic algorithm, random testing and a hyper-heuristic algorithm could accomplish a maximum of 83%, 67% and 76.7%, respectively, for the subject program with high complexity. The proposed algorithm covers other criteria, namely equivalence partition coverage and software safety requirements, with fewer iterations. The results reveal that test cases generated by the proposed algorithm are also effective in fault detection, with 87.2% of mutants killed when compared to a maximum of 76.4% of mutants killed for the complex subject with test cases of other methods.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-08-02T07:00:00Z
      DOI: 10.1142/S0218126624500294
       
  • Active Oblivious Transfer-Based Location Privacy Preservation Crowdsensing
           Scheme

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      Authors: Xiaodong Zheng, Lei Zhang, Bo Wang, Qi Yuan, Guangsheng Feng
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      As a special type of location-based service (LBS), crowdsensing becomes more prosperous in people’s daily life. However, during the process of task distribution, the publisher’s and workers’ locations will be revealed to each other, and then their personal privacy is violated. So in this paper, in order to cope with the violation of location privacy in crowdsensing and provide privacy preservation service for both entities, an active oblivious transfer-based location privacy preservation crowdsensing scheme (short for AOTC) has been proposed. In this scheme, the oblivious transfer is used to encrypt the range of sensing grid of workers, and then matching sensing grids with the sensing region of the publisher without decryption. During the whole process, the process of location matching and results sending is disposed of by the entity of workers actively, so does not establish any data aggregation that can be used as the point of attack. As a result, the AOTC can guarantee the personal privacy of both entities in crowdsensing cannot be obtained by each other, and guarantee other workers also difficult to obtain the precise location of any workers. In addition, as workers send the sensing result to the publisher actively this scheme can also increase the probability of workers’ participation potentially. At last, the theoretical privacy preservation ability of AOTC is analyzed in the section on security analysis with three types of privacy threats. Then the performance of AOTC is compared with other similar schemes in both privacy preservation and execution efficiency, so in simulation experiments, comparison results with brief analyses will confirm that the AOTC has achieved the desired effect and will further demonstrate the superiority.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-08-02T07:00:00Z
      DOI: 10.1142/S0218126624500300
       
  • A Cooperative Attack Detection Framework for MANET-Iot Network Using
           Optimized Gradient Boosting Convolutional Neural Network

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      Authors: P. Sathyaraj, S. Rukmani Devi, K. Kannan
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      The implementation of large-scale Internet of Things (IoT) devices results in smart cities. Using standard mobile ad-hoc networks and IoT, developers establish the communication model for a smart city. The rapid growth of IoT devices based on smart cities poses different Quality of Service (QoS) and security problems. This research presents a novel Modified Elephant Herd Optimization (MEHO) method and a Gradient Boosting Convolutional Neural Network (CNN) strategy to address these issues. The cooperative attacks with varied disruption probabilities are initially assessed at the edge nodes of the IoT network. The MEHO-based Gradient Boosting CNN (MEHO-CNN) approach effectively detects cooperative attacks, ensuring the identification of malicious entities. For traditional cloud access, both bandwidth utilization as well as expected latency are minimized in edge computing. By using the IoT network, the proposed MEHO-CNN model identifies and eliminates malicious nodes. To establish the claimed trustworthy background, the legitimate accusations are based on an examination of trust-based allegations. When compared to existing methodologies, the proposed approach lowers the impact of cooperative attacks, resulting in increased throughput, reduced attack detection rates, lower packet loss ratio, lower packet delivery ratio, and other benefits.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-08-01T07:00:00Z
      DOI: 10.1142/S0218126623502274
       
  • Third-Order Quadrature Sinusoidal Oscillators Employing OTRAs with
           

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      Authors: Data R. Bhaskar, Garima, Pragati Kumar, Ajishek Raj
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      This communication presents two new voltage mode (VM) third-order quadrature sinusoidal oscillator (TOQSO) configurations employing three operational transresistance amplifiers (OTRAs), six resistors and three virtually grounded capacitors. The proposed circuits have independent control of condition of oscillation (CO) and frequency of oscillation (FO) utilizing the intrinsic current differencing property of the OTRA. The proposed TOQSOs have ideally zero output impedance, a feature suitable for easy cascadability. Nonideal and sensitivity analyses have been carried out and compared with those obtained from ideal analysis. The presented TOQSOs have been simulated using OTRAs implemented with macro model of off-the-shelf available AD844 ICs. Experimental results have also been included using OTRAs realized with commercially available AD844 CFOA ICs.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-07-28T07:00:00Z
      DOI: 10.1142/S0218126623503103
       
  • A BERT-ABiLSTM Hybrid Model-Based Sentiment Analysis Method for Book
           Review

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      Authors: Peng Wang, Xiong Xiong
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Aiming at the problem of low accuracy rate of current sentiment analysis methods for book review texts, a book review sentiment analysis method based on BERT-ABiLSTM hybrid model is proposed. First, the overall framework of sentiment analysis is constructed by integrating sentiment vocabulary and deep learning methods, and the fine-grained sentiment analysis is divided into three stages: topic identification, sentiment identification and thematic sentiment identification. Then, a dynamic character-level word vector containing contextual information is generated using a bidirectional encoder representation from transformers (BERT) pre-trained language model. Then, the contextual information in the text data is fully learned by introducing the bidirectional long short-term memory (BiLSTM) model. Finally, the accurate analysis of book review sentiment is achieved by using Attention mechanism to highlight important features and improve the efficiency of resource utilization. Through an experimental comparison with existing advanced algorithms, the proposed method in this study has improved at least 4.2%, 3.9% and 3.79% in precision, recall and F1 values, respectively. The experimental results show that the proposed BERT-ABiLSTM is higher than the existing models under different metrics, indicating that the proposed model has a good application prospect in the fields of book review analysis and book recommendation.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-07-28T07:00:00Z
      DOI: 10.1142/S0218126624500397
       
  • A Lightweight Detection Scheme for the Safety of Human Behaviors in Power
           Construction Sites

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      Authors: Bo Chen, Hongyu Zhang, Ying Li, Xiao Fang, Haiyang Chen
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Safety mishaps at electric power construction sites have been more frequent in recent years as a result of the growth of the electric power business, the inescapable carelessness of current safety oversight, and other causes. Traditional manual supervision and video surveillance methods demand a lot of human resources and suffer from issues like low efficiency and lack of objectivity, making it unable to provide security alerts in real-time and accurately. Therefore, solutions like intelligent monitoring based on object detection are required to address this issue. Many object detection methods now in use (such as R-CNN, Fast R-CNN, and YOLOV5) are computationally and energy intensive. They are typically installed on remote back-end servers, which makes it impossible to guarantee the real-time security alert. This paper trains a lightweight NanoDet network model to recognize the attire and actions of power construction workers in order to address the aforementioned issues. Additionally, in order to meet the real-time security warning requirements and fully utilize the limited computing resources of edge devices, the NanoDet network model is divided, with some layers being divided into CPU execution. According to experiments, power consumption can be reduced by deploying the Backbone or PAFPN blocks of the NanoDet model to CPUs and running them in 30W4Core mode.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-07-27T07:00:00Z
      DOI: 10.1142/S0218126623502304
       
  • Endurance Behavior of Z-Shaped Charge Plasma Tunnel FET for Biosensing
           Application

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      Authors: Ragini Singh, Alok Naugarhiya, Guru Prasad Mishra
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      The tunneling field effect transistor (TFET) is a viable candidate for designing a highly sensitive biosensor. In this work, a doping-less Z-shaped dielectrically modulated charge plasma TFET (CPTFET) structure with misaligned cavity region on channel and source has been proposed for label-free biosensing applications. To design the device, charge plasma technique has been employed, where appropriate metal workfunction is used over intrinsic silicon to create n[math] drain and p[math]source regions. The charge plasma approach reduces thermal budget, random dopant fluctuation (RDF) and steps required for fabrication. The Z-shaped CPTFET includes the advantage of abrupt profile of doping at source-channel (tunneling) junction. Because cavities are created in source and gate oxide region, the abrupt doping profile suppresses ambipolar behavior and improves sensitivity. The performance of the proposed device for both charged and neutral biomolecules in terms of electric field, band energy, transfer characteristics, [math] ratio and subthreshold swing (SS) has been examined. The response of other parameters like cavity thickness and cavity length on ON current has been analyzed using the Silvaco ATLAS device simulator.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-07-27T07:00:00Z
      DOI: 10.1142/S0218126624500269
       
  • Super-Twisted Sliding Mode Control for Maximum Power Point Tracking of
           Wind Turbine Based on Neural Network

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      Authors: Fan Qu, Hui Hu, Ruiting Xu, Ying Chen, Long Peng, Jiande Yan, Wei Xiao, Junqi Yuan
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Given the difficulties in measuring the effective wind speed of wind turbine during the maximum power point tracking (MPPT) process and the unknown nature of the system, this paper proposes a neural network super-twisted sliding mode control (NNST-SMC) method with echo state network (ESN) wind speed estimation. The rotor speed and electromagnetic power are taken as ESN inputs, and the effective wind speed is estimated through the inverse model of wind turbine dynamics. The super-twisted algorithm (STA) can effectively improve the chattering problem of the traditional sliding mode control (SMC) system. The RBF neural network is introduced to compensate for disturbance and uncertainty characteristics of the wind turbine. Results show that compared with the neural network first-order sliding mode control (NNSMC) and super-twisted sliding mode control (ST-SMC), the proposed method can improve the efficiency of wind energy utilization.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-07-25T07:00:00Z
      DOI: 10.1142/S0218126623503152
       
  • A New Adaptive Biased Voltage Differencing Transconductance Amplifier

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      Authors: Priyanka Gupta, Surbhi, Yashika Aggarwal, Utkarsh Singh, Shruti Arya
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      An adaptive biased architecture of voltage differencing transconductance amplifier (AB-VDTA) with high transconductance gain is proposed in this paper. The proposed AB-VDTA is very efficient in terms of power. The structure proposed involves of two units namely two transconductance amplifiers (TAs) and two squarer. The bias current of the TA is made to vary with a square relation of the differential input voltage. Therefore, the proposed structure provides tunable gain depending on the input differential voltage. The proposed AB-VDTA exhibits improved transconductance gain, transient characteristics, reduced standby power dissipation and linearity for large range of inputs. The mathematical formulation has been presented to establish the characteristics of the proposed AB-VDTA. The proposed structure of AB-VDTA is validated through SPICE simulations using 180[math]nm complementary metal oxide semiconductor (CMOS) technology. The proposed scheme has an edge over the existing ones as the outlined methods enhance the transconductance gain by increasing the bias current. The [math] values are observed to be 2.3 and 1.4[math]mS for proposed AB-VDTA and conventional VDTA, respectively, with the corresponding 3[math]dB frequencies 620 and 348[math]MHz. Therefore, 64% improvement in transconductance gain is recorded for same value of bias currents. The linear input range of TA1 is observed to be [math][math]mV and the overall linear range of the VDTA is [math][math]mV for the proposed AB-VDTA. The PVT analysis is carried out to show the effect of process corners. To check the robustness of the proposed VDTA, Monte Carlo analysis is performed, and results have been included in the form of histograms. As an application example, a current mode (CM) universal single input multiple output (SIMO) biquad filter is also designed using the proposed VDTA to show its usefulness, and a 2.7 times higher pole frequency is obtained at equal bias current.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-07-25T07:00:00Z
      DOI: 10.1142/S0218126624500233
       
  • An Optimal Configuration Method for Microgrid Energy Storage Capacity via
           Combination of Empirical Modal Analysis and Convolutional Neural Network

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      Authors: Liqun Shang, Liwen Deng, Tianqi Hao, Chaobiao Li
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      This paper proposes a method that considers the bus net Fuzzy control strategy quickly and accurately for power. Due to the intermittent and fluctuating characteristics of distributed generation units in microgrid, the power quality will be reduced and the normal operation of microgrid will be affected. In this paper, empirical modal analysis fused with convolutional neural network algorithm is applied to the power control strategy of microgrid energy storage system to improve the economy and reliability of microgrid. The design process of the controller is analyzed, and fuzzy rules and membership functions are designed according to the effect requirements of the controller. Then, the center of gravity method is used to obtain the output power of the energy storage system. The simulation results show that the configuration scheme based on the optimization of the hybrid energy storage system in the whole life cycle in this paper not only ensures the stability of the energy storage system but also effectively avoids power fluctuations and stabilizes the peak shaving and valley filling rate. While improving the economy of the energy storage system, it also increases the service life of the energy storage system.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-07-22T07:00:00Z
      DOI: 10.1142/S0218126624500348
       
  • An Improved GPS/INS Integration Based on EKF and AI During GPS Outages

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      Authors: A. Ebrahimi, M. Nezhadshahbodaghi, M. R. Mosavi, A. Ayatollahi
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Inertial navigation system (INS) is often integrated with satellite navigation systems to achieve the required precision at high-speed applications. In global navigation system (GPS)/INS integration systems, GPS outages are unavoidable and a severe challenge. Moreover, because of the usage of low-cost microelectromechanical sensors (MEMS) with noisy outputs, the INS will get diverged during GPS outages, and that is why navigation precision severely decreases in commercial applications. In this paper, we improve GPS/INS integration system during GPS outages using extended Kalman filter (EKF) and artificial intelligence (AI) together. In this integration algorithm, the AI receives the angular rates and specific forces from the inertial measurement unit (IMU) and velocity from the INS at [math] and [math]. Therefore, the AI has positioning and timing data of the INS. While the GPS signals are available, the output of the AI is compared with the GPS increment; so that the AI is trained. During GPS outages, the AI will practically play the GPS role. Thus, it can prevent the divergence of the GPS/INS integration system in GPS-denied environments. Furthermore, we utilize neural networks (NNs) as an AI module in five different types: multi-layer perceptron (MLP) NN, radial basis function (RBF) NN, wavelet NN, support vector regression (SVR) and adaptive neuro-fuzzy inference system (ANFIS). To evaluate the proposed approach, we utilize a real dataset that has been gathered by a mini-airplane. The results demonstrate that the proposed approach outperforms the INS and GPS/INS integration systems with the EKF during GPS outages. Meanwhile, the ANFIS also reached more than 47.77% precision compared to the traditional method.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-07-22T07:00:00Z
      DOI: 10.1142/S021812662450035X
       
  • Low-Frequency Electronically Tunable Fractional Filter and its
           Implementation as Neural Network

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      Authors: Sadaf Tasneem, Rajeev Kumar Ranjan, Sajal K. Paul
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      A fractional low-pass filter operating in a low-frequency range is necessary for the filtering of biomedical signals. Thus, we propose a fractional low-pass filter of order ([math]) which is implemented using a current follower transconductance amplifier (CFTA). The presented structure is compact. It comprises of five CFTAs along with three grounded capacitors and two resistors. Additionally, this filter structure can be electronically tuned for its order and frequency variation, and these tunings are independent of each other. This electronic tuning is established through the bias current of the active component used. The layout of the proposed filter was designed in Cadence Virtuoso, covering 7920[math][math]m2 of chip area. It is operating at ±900[math]mV with a power consumption of 6.8[math]mW. In the simulation results, both pre-layout and post-layout results are included, which indicates that the design is appropriate for fabrication. To check robustness, PVT analysis, Monte-Carlo analysis and THD are also performed. The proposed circuit has also been tested through experiment and its results are also presented. The proposed filter is used to implement a Leaky-Integrate-and-Fire neuron model.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-07-22T07:00:00Z
      DOI: 10.1142/S0218126624500373
       
  • A Multitask Attention Network for Food Delivery Time Prediction

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      Authors: Feihong Huang, Wei Jiang, Shujie Chen
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Given the recent increase in the prevalence of online food ordering apps, food delivery has become an emerging service. Intelligent dispatch systems have been widely deployed by many on-demand logistics companies to maximize delivery efficiency. Predicting the food delivery time is a key module that provides critical information at the decision-making stage of order dispatch to ensure the punctual delivery service for each customer. In this study, we propose a multitask attention network for food delivery time prediction, mimicking the driver’s decision-making process during delivery. First, an attention mechanism is employed to capture mutual influences among orders and evaluate the importance of each order. Then, a multitask learning method is used to simultaneously train delivery time prediction and delivery priority prediction. Finally, a specific loss function is designed to further improve the accuracy of prediction. Extensive modeling demonstrates that our model greatly outperforms other state-of-the-art methods.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-07-21T07:00:00Z
      DOI: 10.1142/S0218126624500257
       
  • A High-Efficiency FPGA-Based ORB Feature Matching System

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      Authors: Bai-Cheng Huang, Yan-Jun Zhang
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Feature extraction and matching are the basic procedures of the so-called Visual Odometer (VO), Simultaneous Localization and Mapping (SLAM) and many other image processing algorithms. Oriented features from accelerated segment test (FAST) and rotated binary robust independent elementary features (ORB) algorithm are widely used since they are computationally faster. In this paper, we proposed a method to generate a value for a feature, the value is called signature. In the matching step, we only compute Hamming distances of descriptors with the same signatures. Hence, the matching time is shortened. Compared with the original ORB algorithm, features to be matched dropped 69.63% on TUM datasets and 85.7% on VGG datasets by adopting our strategy. In addition, the precision is above 85% on both VGG and TUM datasets. We design a customized hardware architecture for ORB feature extraction and matching based on the proposed method. The hardware structure is implemented on Xilinx ZCU102 evaluation board. The clock frequency is set to 150[math]MHz. Our Field Programmable Gate Arrays (FPGA) system achieves 193[math]fps on [math] images with 1984 features on average and 314[math]fps on [math] images with 700 features on average, which is more efficient compared to the state-of-the-art works.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-07-20T07:00:00Z
      DOI: 10.1142/S0218126624500282
       
  • A BP Neural Network-Based Method for Evaluating the Quality of Creative
           Education in Minority Regions

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      Authors: Man Yang, Haining Huang, Sijing Li, Weitai Luo, Mengzhen Chen, Ling Li, Wei Yan
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Ethnic minority resources are very rich and contain rich historical resources and culture. Under the impact of modern information technology, the development of minority resources and the inheritance of ethnic culture are facing many challenges, and the current school education is lagging behind in exploring the ecological resources of minority groups, which makes the integration of creative education and minority groups encounter a bottleneck. In response to this situation, we make full use of the platform of creative education to actively explore the traditional skills contained in the lives of ethnic minorities. In the evaluation of creative education, we should not only focus on the evaluation of students’ works, but also on the improvement of students’ knowledge of various creative tools, their ability to use comprehensive subject knowledge, hands-on ability, solution ability and creativity ability during the whole learning process. Based on this, this paper proposes a back propagation neural network (BPNN)-based quality evaluation method for creative education to evaluate the quality of creative education from multiple dimensions. Experiments and comparisons show that the BPNN-based evaluation method proposed in this paper can better evaluate the whole process of creative education and help the further development of creative education in minority regions.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-07-19T07:00:00Z
      DOI: 10.1142/S0218126623502754
       
  • Innovative Platform for the Comprehensive Quality Evaluation of
           Postgraduate Students Based on Redactable Blockchain

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      Authors: Yaqi Liu, Yueli Su, Huijuan Fu
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      The use of modern information technology to develop new evaluation tools is critical to the reform of comprehensive student quality evaluation system and educational modernization. Applying blockchain technology to students’ quality evaluation can improve the efficiency and value of the work of comprehensive quality evaluation. This research proposes a redactable blockchain-based comprehensive quality evaluation platform named CEP for postgraduate students, based on the document of implementing comprehensive quality evaluation issued by Zhongnan University of Economics and Law. The platform uses smart contracts to automatically award credits in real time and divides four organizations into different private data collections to maintain the privacy and safety of data of postgraduates during the entire evaluation process. Moreover, to tackle the problem of inconsistent data generated by multi-level submission and review, an on-chain data modification scheme based on “temporary block” has been established. The assessment platform developed in this research protects the validity and confidentiality of evaluation data during the procedural evaluation. The research also aims at providing a better understanding of the dynamics of postgraduates’ learning development, improving the scientific, professional and objective standards of quality education.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-07-19T07:00:00Z
      DOI: 10.1142/S0218126624500129
       
  • Improvement of Sub-Wavelength Grating Electrodes for Efficient Terahertz
           Photoconductive Antenna Based on Extraordinary Optical Transmission

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      Authors: Xiaolan Liu, Shiyao Chong, Yuwei Qu, Yanzhen Han
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Low efficiency of Terahertz (THz) radiation and radiation power have limited the development of THz Science and Technology. Thus, with the aims of achieving greater photoconductive current and improving radiation characteristics of THz photoconductive antenna (PCA), this study utilized Extraordinary Optical Transmission (EOT) of light passing through various subwavelength metal structures to control and restrain the light wave in subwavelength scale. Furthermore, by grooving the grating electrode structure, the influence of metal grating’s EOT on the transmission field of PCA were investigated and analyzed. Simulation results show that the effect of local electric field enhancement is significant. When the incident power is 0.1[math]W, the peak value of the local electric field reaches [math][math]V/m. In addition, comparing to the grating electrode with no groove structure in which the field intensity was less than [math][math]V/m, the local electric field increased by 16.4 times, respectively. Correspondingly, the photocurrent intensity of the improved photoconductive plasmonic structure is increased by 72.3 times. In conclusion, the improved plasma photoconductive structure was shown to obviously enhance the transmission field strength of semiconductor materials and the current of the PCA, and accordingly, to improve the THz radiation capability.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-07-19T07:00:00Z
      DOI: 10.1142/S0218126624500270
       
  • Research on Dynamic Task Scheduling of Transmission and Generation of
           Schedule Based on Improved Genetic Algorithm

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      Authors: Xinzhe Wang, Wenbin Yao
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      In order to realize the intelligence of the radio and television transmission station automatic control system, the intelligent algorithm is used for the dynamic task scheduling of transmission (DTST) and the intelligent generation of the real-time transmission schedule. On the basis of the static task allocation at the same time, the time dimension is introduced to build a dynamic task scheduling mathematical model. Based on the characteristics of simple operation and strong convergence of the genetic algorithm, an improved genetic algorithm (IGA) is proposed to solve DTST. The algorithm is improved for specific problems. The first is to improve the selection operator based on the elitist retention strategy to improve the convergence of the algorithm; the second is to determine the discontinuous crossover genes frag based on the concept of cyclic replacement sequence to improve the crossover operator, so as to retain the complete excellent gene fragments and improve the computational efficiency of the crossover operator; the third is to design the relative swap mutation operator to increase the diversity of the population and avoid the convergence of the algorithm calculation results to the local optimal solution. Through the analysis of the experimental data of traversing parameters, the optimal parameter configuration of the IGA is obtained. Finally, the correctness of the IGA is verified by comparing it with the enumeration algorithm, and the effectiveness of the IGA is verified by comparing it with the greedy algorithm.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-07-17T07:00:00Z
      DOI: 10.1142/S0218126623503188
       
  • A Personalized POI Recommendation Algorithm Using BERT-ACNN-GRU

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      Authors: Dongliang Xia, Jianfang Liu, Weina He, Jingli Gao
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      This paper proposes a point-of-interest (POI) sequence recommendation algorithm based on BERT-ACNN-GRU to address the issues faced by the existing POI recommendation model in social network large data, such as the difficulty in extracting deep feature information and the low recommendation performance. Firstly, the semantic relationship between a word and its context in the text is combined using the bidirectional encoder representation from transformers (BERT) model to effectively eliminate the influence of word distance and obtain the contextualized word vector. Secondly, a convolutional neural network (CNN) utilizing a gated recurrent unit (GRU) is employed to capture the feature information of the text. Lastly, the attention method is utilized to assign weight scores to various terms in order to provide more attention to particular words and boost the precision of recommendations. The experiments demonstrate that the precision, recall rate, F1 score and mean average precision (mAP) of the proposed method are 0.097, 0.26, 0.103, and 0.085 on the Gowalla dataset when the recommendation list has a length of 10, respectively. On the Yelp dataset, the precision is 0.093, the recall rate is 0.26, F1 is 0.099, and MAP is 0.089. Hence, the proposed method can effectively enhance the performance of the POI recommendation system.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-07-17T07:00:00Z
      DOI: 10.1142/S0218126624500221
       
  • Design of Resource Efficient Binary and Floating Point Comparator Using
           FPGA Primitive Instantiation

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      Authors: Vikas Shivakumar, Chetan Vudadha
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      This paper presents the realization of binary and floating-point comparators on FPGA. The implementation is done by exploiting the primitive instantiation of FPGA resources which has enabled a significant improvement in resource utilization in terms of Look-Up Table (LUT) usage and overall combinational path delay when compared to the conventional inference approach. The comparator architectures are implemented using Vivado 2020.1 and ISE Design Suite 14.7 environment on multiple Xilinx FPGA platforms and are compared with the existing designs. The results indicate an improvement of 33.33% and 45.45% in LUT utilization, 14.41% and 30.73% in delay for 32-bit and 64-bit binary comparators respectively, compared to the existing architectures. The proposed floating-point comparator requires 88.57% and 285.29% lesser LUTs for single precision and double precision representation respectively, compared to the existing design.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-07-17T07:00:00Z
      DOI: 10.1142/S0218126624500245
       
  • Grid Connected Photovoltaic System with Modified Quasi Z-Source Based
           Cascaded Multilevel Inverter (MQZS-CMLI) Using RENCO Approach

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      Authors: P. Sabarish, M. Senthil Kumar
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      This paper introduces a Multi-Level Cascade Inverter (MLI) based on Enhanced Quasi-Z Source Inverter (MQZSI) to connect photovoltaic (PV) systems based on the proposed method. Usually the interface among PV power supply and load is completed with MQZS-CMLI. In this paper, the proposed control scheme is comprehensive implementation of Recalling Enhanced Recurrent Neural Network (RERNN) and Quasi-Opposite Chemical Reaction Optimization (QOCRO) named as RENCO. The main objective of proposed method is to decide the efficiency of the PV system by the maximal power extraction. Here, MQZS-CMLI’s modeling design contains suitable number of components, other than their capacitors and semiconductors comply with low-voltage stress. It is improved for providing that maximum power of the PV power generation system. At first, the goal function is described according to the parameters and limitations of controller (like voltage, current, power, modulation index, so on). These parameters apply to recommend RENCO technology input. The proposed RENCO technology improves voltage distribution, power transmission, and minimizes power fluctuations while sharing power with load. The proposed MPPT-based technology ensures that the maximum power is provided to load. The proposed method adjust the duty cycle of MQZS-CMLI and reduces the modulation load. Finally, the proposed technology is executed on the MATLAB/Simulink platform, and its output efficiency is compared to existing systems under dissimilar load circumstances.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-07-12T07:00:00Z
      DOI: 10.1142/S0218126624500105
       
  • Energy Consumption Optimization of Connected and Autonomous Vehicles Based
           on Cooperative Perception in Ramp Overflow Scene

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      Authors: Ziyi Su, Qingchao Liu, Ling Gong
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      The congestion caused by ramp overflow has an essential impact on the energy consumption of autonomous vehicles. It is urgent to solve the energy waste of ramp overflow on connected and autonomous vehicles and improve the energy utilization rate. Aiming at the traffic congestion caused by ramp overflow, this paper obtains the data of autonomous vehicles and traffic flow based on vehicle road cooperative perception, analyzes the impact mechanism of vehicle energy consumption, and summarizes the energy consumption modes of autonomous vehicles into three categories. Second, an energy consumption evaluation framework is proposed based on the CSANS strategy. This strategy can make up for the deficiency of constructing neighborhoods within European distance, find important influencing variables on connected and autonomous vehicles’ energy consumption, and accurately capture the manifold characteristics of energy consumption data. Finally, flow control is carried out from the macro perspective of traffic engineering to optimize ramp overflow’s impact on autonomous vehicles’ energy consumption. Through multiple groups of experiments, it has been found that it can effectively reduce the energy consumption of autonomous vehicles.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-07-10T07:00:00Z
      DOI: 10.1142/S0218126623502821
       
  • Abnormal Traffic Detection Method of Internet of Things Based on Deep
           Learning in Edge Computing Environment

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      Authors: Lingcong Qiu, Lei Wang
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      In this paper, a method based on deep learning to detect abnormal traffic of IoTs in edge computing environment is proposed. Firstly, the data are preprocessed by data cleaning, normalization, oversampling and undersampling, and data set segmentation to obtain a data set with balanced data distribution. Secondly, a method of calculating feature information based on data increment is adopted, which can accurately extract feature information from the dynamic data flow. Finally, the convolution neural network (CNN) is used to extract the local features of the data, and the bi-directional gated loop unit (BiGRU) is used to extract the long sequence correlation of the data. The two networks work together to extract data features. The self-focus mechanism is introduced to deal with redundant data. Experiments show that the accuracy, recall and [math]1 value of the proposed method are 97.36%, 98.38% and 97.16%, respectively, in the normal class, which are higher than the comparison algorithm.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-07-06T07:00:00Z
      DOI: 10.1142/S0218126623502833
       
  • Design of Total Harmonic Distortion Reduction Using Quantum Coyote
           Optimization Algorithm for Hybrid Power Generation Systems

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      Authors: Lijo Jacob Varghese, R. Gandhi Raj, R. S. Ravi Sankar, Zhenhai Tan
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      The usage of various inverters in various industries has gained considerable attention in the power electronics industry in recent years. The harmonic distortion that is induced by various renewable energy sources, along with the growing use of nonlinear loads and power electronic devices, has a significant impact on the distribution system. This is because of the rise in penetration of various renewable energy sources and the usage of nonlinear loads and power electronic devices. In addition, distributed generation (DG) units with inverters (such as solar (PV) and wind turbines) that are integrated into distribution networks are viewed as significant harmonic producers that have substantial adverse effects on power quality. The power quality in the system suffers because of these generators. This study proposes a method of harmonic mitigation for addressing power quality problems that are present in distribution systems as a solution to the challenges that have been found. These concerns have been brought to light as a result of previous research. The standard two-level and three-level inverters were the basis for the development of the multilevel inverter (MLI), which was meant to address their shortcomings. One of the effective technologies that can maintain constant performance is the hybrid power generating system. A hybrid energy system has several benefits, including high dependability, cheap cost and minimal emissions. When used in a hybrid power production system, the reduction of total harmonic distortion (THD) becomes absolutely necessary (HPGS). In this context, the research provides a novel approach for high-performance quantum computing called quantum coyote optimization algorithm-based THD reduction (QCOA-THDR). The QCOA-THDR approach that has been presented has been tested with several converters, including SEPIC, buck–boost and Cuk converters. Additionally, the proportional as well as the integral gain variables of the proportional integral (PI) controller are set in order to achieve decreased total harmonic distortion (THD). In addition, the QCOA system is formed by combining the ideas of quantum computing (QC) with the traditional COA. This is how the QCOA system comes to exist. A limited number of simulations were run, and the results are being analyzed from a variety of perspectives in order to investigate the improved effects that the QCOA-THDR approach has on data. The QCOA-THDR method was shown to have superior results than the more modern techniques, as shown by the comparison research.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-07-06T07:00:00Z
      DOI: 10.1142/S0218126623502870
       
  • A Kernel Fractional Low-Power Chaotic Time Series Prediction Algorithm
           Based on Lncosh Function

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      Authors: Yuanlian Huo, Jie Liu, Yongfeng Qi, Ruibo Ding, Tianci Xu
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      In this paper, a kernel fraction low-power adaptive filtering algorithm based on lncosh function (KFLP-LHCF) is proposed for chaotic time series prediction. The algorithm combines the lncosh function with the kernel fractional low-power algorithm. The nonlinear saturation characteristic of the lncosh function is used to achieve resistance to impulse noise, and the fractional low power is used to suppress the influence of error mutation on the performance of the algorithm. In addition, by adjusting the scale factor, a balance can be achieved between convergence speed as well as steady-state performance. In the alpha noise environment, the proposed algorithm is used to predict and simulate two typical chaotic time series of Lorenz and Mackey–Glass. Experimental results show that the algorithm has better steady-state performance and lower steady-state error than other kernel adaptive filtering algorithms, provided that the convergence speed is similar.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-07-06T07:00:00Z
      DOI: 10.1142/S0218126624500130
       
  • Design and Analysis of Low-Voltage and Low-Power 19T FinFET-TGDI-Based
           Hybrid Full Adders

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      Authors: Parthiv Bhau, Vijay Savani
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      This paper proposes two 19 transistor (19T) hybrid adder designs based on Fin Field Effect Transistor-Transmission Gate Diffusion Input (FinFET-TGDI) technique. The performance of these designs is compared with various state-of-the-art adders, and the simulations are carried out using 18[math]nm FinFET technology in the Cadence Virtuoso tool at a supply voltage of 0.8[math]V and nominal temperature. Results show that the proposed adders outperform the conventional Mirror adder, achieving a 25% improvement in maximum propagation delay, a 20% improvement in average power, and a 39% improvement in Power Delay Product (PDP). Both proposed adders also demonstrate significant benefits in terms of Figure of Merit (FoM) when compared with other reported architectures. The simulations also consider variations in the nominal supply voltage of 10% and temperature variations from −55[math]C to 125[math]C for the PDP of all adders. Furthermore, the post-layout simulation results for both proposed adder architectures under nominal supply voltage are presented. To assess the robustness of the circuits, process corner analysis and Monte Carlo analysis are performed for all adder architectures.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-07-06T07:00:00Z
      DOI: 10.1142/S0218126624500154
       
  • A Dual-View Model for Stock Price Prediction of Internet-of-Thing
           Enterprises

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      Authors: Ruozhou Wang, Ziyang Shao, Bei Hui, Zhen Wang, Ling Tian
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      In recent years, with the continuous development of the capital market and intelligent internet of things (IIoTs) technologies, investors have focused more on IIoTs enterprises’ stocks. Since the stocks of IIoTs enterprises have the characteristics of heavy capital flows and high stock price volatility, the effective prediction of IIoTs stock price changes plays an extremely important role in improving investment returns and controlling investment risks. According to the above characteristics, our model takes stock trend fluctuations and time series indicator changes into consideration and comprehensively captures IIoTs stock information from both the temporal domain and the spatial domain. Specifically, the proposed model is a dual-view model that incorporates selected trading indicators to predict the closing prices of stocks. In the first view, an RNN model is designed to enlarge the receptive field of the model. In the second view, we introduce an attention mechanism to extract the influences of individual stock trends on the forecasting target. To verify the validity of this prediction method, we compare it with six other stock prediction methods. The results show that on the Ping An (601318) and IFLYTEK (002230) datasets, our method achieves the best results, that is, the lowest RMSE values.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-07-06T07:00:00Z
      DOI: 10.1142/S0218126624500178
       
  • Depression Detection with Dynamic and Static Visual Features

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      Authors: Yuhao Wang, Zepeng Li
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Depression is a serious mood disorder that can significantly impact a person’s ability to live a normal life. In severe cases, it can even lead to suicidal thoughts. As such, accurate detection of depression is crucial for effective management and treatment. This paper presents a facial expression-based approach for depression detection, which is composed of two steps. First, static features are extracted using Local Binary Pattern (LBP), Histogram of Oriented Gradients (HOG), and Bag of Words (BOW). Second, dynamic features are obtained by applying LBPs on Three Orthogonal Planes (LBP-TOP) and Eight Vertices LBP (EVLBP) frame by frame. Next, the static and dynamic features are combined to create a 1377-dimensional vector for each video. Finally, Gradient Boosting Regression is used to predict depression scores. The experimental results on the AVEC 2014 depression dataset ([math], [math]) demonstrate the effectiveness of the proposed method. These results indicate that the low-dimensional vectors extracted by the proposed method can effectively capture the facial motion of individuals with depression, and also suggest that hand-crafted methods could have potential in depression detection.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-06-30T07:00:00Z
      DOI: 10.1142/S0218126623503115
       
  • Two-Degree of Freedom-Based Control Model for Active Suspension System to
           Mitigate the Nonlinear Disturbance

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      Authors: Ravindra S Rana, Dipak M Adhyaru
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Comfort is an important consideration in passenger vehicles provided by a suspension system. The suspension system must be associated with the vehicle body to improve comfort for the passenger. The active suspension system (ASS) has been introduced to perform this task. Moreover, the sliding mode controller (SMC) is well known for its continuous control signals. This paper proposes the Bayesian-based proportional resonant sliding mode controller (B-PRSMC) and two degrees of the freedom-proportional resonant controller (2d-f-PR) to stabilize passenger and ride comfort. The B-PRSMC is used for examining system states under varying road disturbances based on the Bayesian theorem. After examining the system state, the system performance is controlled by the 2d-f-PR controller. The proposed method is performed on Matlab, and the results are taken regarding body acceleration, body travel and suspension deflection. The mastery of proposed method is estimated under different road profiles. The comparative analysis demonstrates that the suggested controller enhances ride and passenger comfort in varied road profiles due to the combination of B-PRSMC and 2d-f-PR controllers.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-06-30T07:00:00Z
      DOI: 10.1142/S0218126623503127
       
  • Design and Simulation of a Novel 16T SRAM Cell for Low Power Memory
           Architecture

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      Authors: P. Nagarajan, M. Renuga, A. Manikandan, S. Dhanasekaran
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Static random access memory (SRAM) is a sort of RAM where information is not permanently stored and does not require routine updating. To reduce leakage power without sacrificing performance, a variety of approaches have been applied to SRAM cells. In this study, we suggest a new 16T SRAM design that can function in active, park, standby, or hold modes. A fully static mode of operation for SRAM is made possible by the 16T SRAM structure, which also enhances write margin (WM) and removes charging conflict between devices during read and write operations. The key objectives of the suggested architecture are to retain logic state in park mode while maintaining stability and reducing standby time in active mode, as well as to reduce leakage current in standby mode. This is done by removing feedback from the back-to-back inverters during write operations via the data-dependent supply block. This makes it possible for the suggested bitcell to considerably increase the WM. A novel SRAM cell with 16 transistors is created with subthreshold operation and enhanced data stability. By using an equalized bit line technique to avoid leakage due to enhanced data pattern and RBL detection, the suggested single-ended SRAM cell with dynamic feedback control lowers the static noise margin for ultra-low power transfer. A sleep transistor is incorporated into the architecture to save power consumption when the system is in standby mode due to inefficient voltage transmission. Tanner EDA tool V.14.1 on 45-nm CMOS was used for design and simulation. The outcomes demonstrate a considerable decrease in no-load current and power loss.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-06-30T07:00:00Z
      DOI: 10.1142/S0218126624500038
       
  • A Rolling Bearing Fault Diagnosis Method Based on Improved CEEMDAN and
           RCMFE

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      Authors: Zhiyong Luo, Guangming Zhu, Xin Dong, Hongkai Tan, Jialin Li
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Considering the problem of residual noise and spurious modes in the complete ensemble empirical mode decomposition with adaptive noise (CEEMDAN), a rolling element bearing malfunction diagnostic method based on improved CEEMDAN (ICEEMDAN) is proposed. First, different from the CEEMDAN, which directly adds Gaussian white noise with a mean of zero, the proposed method adds the [math]th component obtained from white noise decomposed by empirical mode decomposition (EMD) to the vibration signal, and then the ICEEMDAN is employed to decompose the signal into several intrinsic mode functions (IMFs). Second, aiming at the uncertainty problem of entropy estimation in multi-scale fuzzy entropy (MFE), a refined composite multi-scale fuzzy entropy (RCMFE) is proposed to obtain the characteristic from the selected IMFs. Finally, smoothing factor of PNN is determined by fruit fly optimization algorithm (FOA), and the extracted features are input into the FOA-PNN model to achieve condition identification. Experimental results illustrate that the identification accuracy is more than 99%, which indicates its high effectiveness and superiority.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-06-30T07:00:00Z
      DOI: 10.1142/S0218126624500142
       
  • A Mental Stress Classification Method Based on Feature Fusion Using
           Physiological Signals

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      Authors: Ming Sun, Xuanmeng Cao
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Mental stress can cause a range of mental health issues, which makes it challenging to develop a stress classification method especially based on physiological signals. Although cutting-edge deep learning models are currently popular for recognizing mental stress, most frameworks rely solely on deep features, which may not provide a comprehensive understanding of physiological signals. In response to this concern, we propose a mental stress classification method that uses feature fusion. We integrate the squeeze-excitation attention mechanism and voting classifier technique to learn detailed and typical information about mental stress. To be more precise, the feature fusion segment consists of two steps: we first extract shallow statistic features and deep features separately from raw signal recordings, and the deep features are dimensionally reduced using principal component analysis to enable better integration with the shallow features. We then flatten both kinds of features and concatenate them by column to create a combined set that contains more salient information about physiological signals. Our experiments show that the attention mechanism and voting classifier technique improve the accuracy of stress classification. Furthermore, our proposed model based on feature fusion achieves remarkable performance compared to state-of-the-art methods.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-06-30T07:00:00Z
      DOI: 10.1142/S0218126624500166
       
  • Iterative Training Attack: A Black-Box Adversarial Attack via Perturbation
           Generative Network

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      Authors: Hong Lei, Wei Jiang, Jinyu Zhan, Shen You, Lingxin Jin, Xiaona Xie, Zhengwei Chang
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Deep neural networks are vulnerable to adversarial examples. While there are many methods for generating adversarial examples using neural networks, creating such examples with high perceptual quality and improved training remains an area of active research. In this paper, we propose the Iterative Training Attack (ITA), a black-box attack based on a perturbation generative network for generating adversarial examples. ITA generates such examples by randomly initializing the perturbation generative network multiple times, iteratively training and optimizing a refined loss function. Compared to other neural network-based attacks, our proposed method generates adversarial examples with higher attack rates and within a small perturbation range even when the advanced defense is employed. Despite being a black-box attack, ITA outperforms gradient-based white-box attacks even under basic standards. The authors evaluated their method on a TRADES robust model trained with the MNIST dataset and achieved a robust accuracy of 92.46%, the highest among the evaluated methods.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-06-27T07:00:00Z
      DOI: 10.1142/S0218126623503140
       
  • A Secure and Efficient Scheme Based on Unlinkability and Anonymous
           Traceable Protocol for Cloud-Assisted IoT Environment

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      Authors: Rajkumar Gaur, Shiva Prakash, L. V. Narasimha Prasad, Sanjay Kumar, Kumar Abhishek, Manisha Guduri
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      The authenticity, privacy, and nonrepudiation of IoT applications are all guaranteed by the ID-Based Signature (IDBS) cryptographic technique. Digital communication presents challenges for information evaluation and removal-back transmission. Security was consequently needed in a cloud-based system to interact with the correct location or nodes. Furthermore, in a cloud-based environment, it is difficult to track a group’s key escrow and secret key generations. We improve group signature security, an identity-based method, to address these problems. The strategy asks a member to sign documents on the group’s behalf. The group manager (GM) membership is controlled by two protocols: join and revoke. The GM may utilize the Open protocol to determine who signed a communication. The classic ID-Based Group Signature (IDBGS) method uses a public-key generator (PKG). This method is founded on difficult mathematical ideas like the computational Diffie–Hellman assumptions. Based on the ID-Based GS system, this technique enhances group members’ identity, legitimacy and visibility. The public key size and signature depend on the group members’ autonomy. The improved method guarantees realistic confirmation of nodes and fortifies them against forgery attempts. This solution promises faster execution and increased dependability for secure nodes.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-06-27T07:00:00Z
      DOI: 10.1142/S0218126623503164
       
  • SSA-SVR-Based Prediction Model of Charging Load for Electric Vehicles

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      Authors: Yingying Li, Jian Dong, Xinyi Lu, Jiahui Yuan, Haixin Wang, Junyou Yang, Shiyan Hu
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      The reliable and secure operation of power grids can be efficiently supported by the charging load prediction of electric vehicles (EVs). To address the problem of insufficient accuracy of existing charging load prediction models, a technique for predicting charging load for EVs using the sparrow search algorithm-support vector regression (SSA-SVR) is proposed. First, the daily travel patterns of space and time of EV users are analyzed. Therefore, EV charging load data is obtained by Monte Carlo simulation. Finally, a support vector regression (SVR)-based model for predicting EV charging load is established and the sparrow search algorithm (SSA) is further used to find the optimal kernel function factor and penalty factor of SVR to achieve the optimized prediction effect. The simulation experiments show that, compared with the backpropagation (BP) neural network, SVR methods and PSO-SVR methods, the proposed prediction model can enhance the prediction accuracy of the charging load of EVs.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-06-27T07:00:00Z
      DOI: 10.1142/S0218126624500014
       
  • Realization of Schmitt Trigger Using Single DXCCII and its Utility as an
           Adjustable Waveform Generator

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      Authors: Atul Kumar
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      This paper presents a Schmitt trigger (ST) circuit with anti-clockwise hysteresis and its utility as an adjustable square/triangular wave generator. The ST circuit employs a single dual-X second-generation current conveyor and two resistors. The threshold voltages of the circuit are adjustable such that it can also function as a zero crossing detector. The circuit has a wide operational frequency range and also consumes low power. Without using an additional active block, a square/triangular wave generator circuit is also realized within the same circuit topology. The generator circuit uses a single active element, one grounded resistor and one grounded capacitor only. The use of grounded passive components makes the proposed generator circuit easily integrable. Additionally, the generator circuit is adjustable as its duty cycle is tunable by means of an external current source. The generator circuit also has a wide operational frequency range from 2.1 Hz to 19.2 MHz. The theoretical aspects of the proposed circuits are validated via Cadence simulations. Additionally, a prototype of DXCCII, which is implemented by using current feedback operational amplifier ICs AD844, is used to verify the ST experimentally.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-06-27T07:00:00Z
      DOI: 10.1142/S0218126624500063
       
  • A Novel Model Based on Deep Learning Approach Combining Data Decomposition
           Technique and Grouping Distribution Strategy for Water Demand Forecasting
           of Urban Users

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      Authors: Zhang Cao, Hua Yan, Zhengping Wu, Dong Li, Bin Wen
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Urban user water demand prediction (WDP) is of significant importance for smart water supply system, which can provide a strong decision-making basis for the dispatching and management of smart water supply system. However, owing to the fluctuation, intermittence and nonstationarity of the user’s water consumption in urban buildings, it is extremely difficult to predict accurately. Therefore, a novel short-term WDP model (Singular Spectrum Analysis Convolutional Neural Network Bidirectional Gate Recurrent Unit, SSA-CNN-BiGRU) is proposed to promote the stability and accuracy of WDP, which successfully introduces organic combinations including deep learning, decomposition technique, and data partitioning policies into the domain of WDP. First, raw data are decomposed into components that carry distinct frequency signals for weakening its nonstationarity and complexity. Then, all the components are automatically divided into several groups using clustering algorithm based on their entropy, after which deep learning method is adopted to predict by groups. Finally, the predicted result of each group is summed up to be fused as the final value. To validate the predictive performance of SSA-CNN-BiGRU, real data have been selected for this study. In experiments, SSA-CNN-BiGRU achieved a fitting of 94.73%. Comparison by relevant evaluation metrics demonstrates that the proposed model exhibits superior performance, thus providing a more accurate basis for WDP.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-06-27T07:00:00Z
      DOI: 10.1142/S0218126624500075
       
  • Front-End Rectifier of Self-Compensation Matching with Parasitic
           Cancellation for Dual-Band RFID Tag

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      Authors: Xianming Liu, Yinghui Chang, Weikang Wu, Zhixin Zhou, Hongyin Luo, Wenrun Xiao, Chao Huang, Donghui Guo
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      This paper presents an innovative cross-coupled differential drive rectifier for dual-band Radio frequency identification (RFID) tags. A self-compensating rectifier with enhanced power-conversion efficiency (PCE) at low and high RF power is proposed. The proposed rectifier utilizes a self-compensating circuit, the extra two cross-couple transistors, to increase the gate voltage of transistors to control the conduction of the rectifying transistors. In order to adapt high frequency (HF) and ultrahigh frequency (UHF) rectification, the matching circuit is designed with parasitic cancellation technology. Moreover, the cascading power management circuits are added to generate a stable output voltage. The multi-standard rectifier is designed and simulated in [math] CMOS process. The simulated result shows that the proposed three-stage rectifier achieves a PCE 74% (at [math] load) when receiving a 915[math]MHz signal with average power of [math]. Moreover, the maximum efficiency achieves 56% at HF 13.56[math]MHz, and the final output voltage can be stabilized at a specific voltage of 1.052[math]V.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-06-23T07:00:00Z
      DOI: 10.1142/S0218126623503206
       
  • A Reduced Switch Count High-Frequency Single-Phase 5-L MLI for IH
           Applications

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      Authors: Manish Kurre, Atanu Banerjee, Priyankar Roy
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Nowadays, multilevel inverter (MLI)-based induction heating (IH) technology is the best-suited option in many domestic, commercial and medicinal applications because of its higher efficiency, low cost, fast heating and lower electromagnetic interference (EMI). This paper presents reduced components count high-frequency (HF) single phase five-level (5-L) MLI for IH applications. The working methodology of the proposed system has been analyzed in the multicarrier phase disposition pulse width modulation (MC-PD-PWM) method in high switching frequency i.e., 10[math]kHz. In addition, the proposed topology can produce output voltage twice of input voltage without any external source. Moreover, the detailed power loss and reliability analysis have been evaluated for the proposed system. In terms of switch count and efficiency, the single-phase 5-L inverter architecture is compared to some conventional and current topologies. Finally, to validate and justify the operation of the proposed system, the simulation and experimental results of five-level inverter are presented.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-06-23T07:00:00Z
      DOI: 10.1142/S0218126624500026
       
  • A Current-Fed ZVS High Step-Up Boost Converter Integrated with Isolated
           SEPIC Converter

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      Authors: Jalil Jalili, Sayyed Mohammad Mehdi Mirtalaei, Mohammad Reza Mohammadi, Behrooz Majidi
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      In this paper, the combination of a high step-up boost converter with extended voltage multiplier cell and isolated SEPIC converter with a series output module is presented. Since these converters use the same current source in their inputs, they can share the common parts, so the structure of the proposed converter is simple. In this converter, the high frequency transformer used in the SEPIC converter and the inductor of the extended voltage multiplier cell are coupled, so the volume of the magnetic parts is reduced. In addition, an active-clamp circuit is used to solve the problem of leakage inductor and achieve to Zero Voltage Switching (ZVS) turn on/off for switches and ZCS for diodes. Compared to its high step-up counterpart, the proposed converter has the following: (1) distributed voltage stress on the diodes and voltage of the output capacitors are fair. (2) Higher voltage gain. (3) Voltage stresses on the diodes are lower and the reverse-recovery problem of the diodes is eliminated. (4) Minimum root mean square (RMS) leakage inductor current. The operational principle and characteristics of the proposed converter are presented, and in order to verify the proposed converter, a 200 W, 20–400 V prototype converter is implemented and experimental results are provided.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-06-23T07:00:00Z
      DOI: 10.1142/S0218126624500051
       
  • An Optimal Selection and Placement of Distributed Energy Resources Using
           Hybrid Genetic Local Binary Knowledge Optimization

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      Authors: Kesavan Tamilselvan, Lakshmi Kaliappan, Prabaakaran Kandasamy
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      In recent times, the virtual power plant (VPP) is gaining more attention in power system engineering due to its tremendous potential in enhancing sustainable urbanism, in which, it supplies clean energy from distributed generators. Electricity is deemed a basic requirement for future automotive and ultra-modern technologies. The deficiency of traditional energy resources and their complex generation process make the production cost of electricity increase dramatically. Moreover, traditional power distribution systems are encountering issues in distributing electrical energy to fulfill customer demands. Therefore, this paper proposes a novel power management system named ‘the hybrid genetic local binary knowledge (HGLBK) algorithm’ to manage power distribution in the transmission lines and to optimize the total operation cost of the network. The hybrid optimization algorithm effectively controls the load by supplying the surplus power load to the adjacent feeders thereby optimally selecting and placing the distributed energy resource (DER). The proposed concept is implemented at Kayathar, Tamil Nadu in India, and their real-time data are utilized for modeling the VPP. The proposed VPP concept is implemented in the IEEE-9 bus system and the performance of VPP is simulated using the MATLAB software. The performance of the proposed HGLBK algorithm is assessed by comparing its effectiveness with the existing approaches.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-06-21T07:00:00Z
      DOI: 10.1142/S0218126623503073
       
  • Activation Function Effects and Simplified Implementation for Hopfield
           Neural Network

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      Authors: Quan Xu, Shoukui Ding, Han Bao, Bei Chen, Bocheng Bao
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      The activation function is crucial in the Hopfield neural network (HNN) to restrict the input–output relation of each neuron. The physical realizability and simplicity of the hardware circuit of activation function are beneficial to promote the practical engineering application of the HNN. However, the HNN commonly used hyperbolic tangent activation function involves a complex hardware circuit implementation. This paper discusses a piecewise-linear activation function (PWL-AF) with simplified circuit implementation and a tri-neuron small-world HNN is built as a paradigm. The hardware implementation circuit of the HNN is greatly simplified, benefited from the PWL-AF with a simple analog circuit. Meanwhile, the dynamics related to the PWL-AF and initial conditions are numerically explored. The numerical results demonstrate that the PWL-AF-based HNN can produce dynamical behaviors like the HNN based on the hyperbolic tangent activation function. Nevertheless, the multistability with up to six kinds of coexisting multiple attractors emerged because of the PWL-AF breakpoint. This can give more flexible and potential aspects in multistability-based engineering applications. Especially, the PWL-AF breakpoint value simultaneously acts as the offset booster and amplitude controller in regulating the offset boosting and amplitude rescaling of neuron states. Afterwards, an analog circuit with three straightforward operational amplifiers (op-amp)-based circuit modules is designed for the PWL-AF, and a PCB-based analog circuit is thereby implemented for the tri-neuron small-world HNN. The hardware experiments agree with the numerical simulations, implying the feasibility of the PWL-AF simplification for the HNN.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-06-21T07:00:00Z
      DOI: 10.1142/S0218126623503139
       
  • TBNet: Stereo Image Super-Resolution with Multi-Scale Attention

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      Authors: Jiyang Zhu, Xue Han
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      With 3D products being widely applied, more attention has focused on studying stereo image super-resolution (SR). Current stereo image SR studies mainly aim to improve the performance by the additional information from a pair of low-resolution stereo images. However, it is challenging for stereo image SR to fully exploit self-similarity information from its own image and parallax information between stereo image pairs. In line with these challenges, this paper presents a Two-Branch Network (TBNet) to integrate self-similarity information and parallax information for SR. In the TBnet, a stereo parallax transfer module with an encoder–decoder structure was first proposed to sufficiently transfer multi-scale parallax information and preserve the stereo consistency between stereo images. This paper further presented a residual pyramid self-attention module to employ self-similarity information to take advantage of self-predictive power. Finally, extensive experiments demonstrate the superiority of our model over the state-of-the-art performance in terms of objective and perceptual quality and the accuracy of disparity estimation.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-06-21T07:00:00Z
      DOI: 10.1142/S021812662350319X
       
  • Temporal Fusion Transformer-Gaussian Process for Multi-Horizon River Level
           Prediction and Uncertainty Quantification

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      Authors: Cheng Wang, Weihao Tang
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Accurate river level prediction is vital in water resource management and flood mitigation. Recent advances in data-driven modeling, especially in deep learning, provide profound insights into predicting river levels when mechanistic hydrological knowledge is absent. However, they often do not capture predictive uncertainty well, making them less robust in the hydrological prediction as they overconfidently extrapolate. Moreover, they are not flexible in handling hydrological variables with heterogeneous characteristics. In this work, we present the Temporal Fusion Transformer-Gaussian Process (TFT-GP), a novel model for multi-horizon probabilistic river level prediction. We show how TFT-GP inherits the nice properties of the Gaussian process and deep neural networks, giving it excellent representative power and uncertainty quantification ability. The performance of TFT-GP is thoroughly compared with existing well-known deep learning models in three real-world hydrological datasets, and the results showed that TFT-GP is not only more accurate in point prediction but also more reasonable in uncertainty quantification.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-06-16T07:00:00Z
      DOI: 10.1142/S0218126623503097
       
  • VDTA Based Unified Grounded Fractional/Integer Order Negative/Positive
           Inductance Emulator

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      Authors: Parveen Rani, Rajeshwari Pandey
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      In this technical communication a voltage differencing transconductance amplifier (VDTA)-based unified grounded fractional/integer order negative/positive inductance emulator (IE) has been proposed which can be configured as (i) fractional order negative inductance emulator (FO-PIE) (ii) fractional order positive inductor emulator (FO-PIE) (iii) integer order negative inductance emulator (IO-NIE) and (iv) integer order positive inductor emulator (IO-PIE). The proposed unified IE is designed around a single VDTA and a grounded fractional capacitor (FC) or capacitor only. Non-ideal mathematical formulations of the proposed IE are carried out to enumerate the effect of non-idealities associated with VDTA. The functionality of proposed structure is validated through Virtuoso from Cadence tool suite using 180[math]nm generic process design kit (gpdk) CMOS technology parameters. Power supplies of [math][math]V are used for VDTA simulation. The continued fraction expansion (CFE)-based rational approximation is used for FC implementation which is realized using RC ladder network truncated to 12th order. Fractional negative and positive inductances of value 78.13[math][math], 23.44[math][math] and 0.78[math][math] are realized and simulated. The topology is also tested for 1[math]mH positive and negative integer order inductances. The simulation results corroborate with theoretical propositions. The applicability of the proposed structure is justified through two application examples namely parasitic fractional order inductance cancellation and fractional order high pass filter.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-06-14T07:00:00Z
      DOI: 10.1142/S0218126623503036
       
  • D3-TD3: Deep Dense Dueling Architectures in TD3 Algorithm for Robot Path
           Planning Based on 3D Point Cloud

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      Authors: Yuwan Gu, Zhitao Zhu, Yongtao Chu, Jidong Lv, Xueyuan Wang, Shoukun Xu
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Twin delayed deep deterministic (TD3) policy gradient has several limitations when applied in planning a path in environment with a number of dilemmas according to our experiment, due to the complexity of the robot path planning task, the rate of convergence of TD3 algorithm is slow and the rate of collision is high. To address this problem, deep dense dueling twin delayed deep deterministic (D3-TD3) architecture is proposed, a method that preserves important information from cross-layer inputs through dense connections and divides the network into a value function and a dominance function, thus, allowing for faster convergence when solving complex tasks. Finally, a spatial model based on three-dimension (3D) point cloud is built, and simulation experimental results show that in static environment, the algorithm proposed in the paper has 40.6% fewer collisions compared to TD3, 30% fewer collisions compared to TD3-BC, 19.2% fewer collisions compared to Dueling TD3 and 17.4% fewer collisions compared to deep dense TD3. In dynamic and static environment, the algorithm proposed in the paper has 34.4% fewer collisions compared to TD3, 24% fewer collisions compared to TD3-BC, 6% fewer collisions compared to Dueling TD3 and 25% fewer collisions compared to deep dense TD3.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-06-14T07:00:00Z
      DOI: 10.1142/S021812662350305X
       
  • Statistical Analysis and EEG Signal Filtering Using Design of Window
           Function Based on Optimization Methods

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      Authors: Fatmanur Serbet, Turgay Kaya
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      The window functions, which are widely used in Finite Impulse Response (FIR) digital filter design with the Fourier Series Methods, aim to eliminate the oscillations adversely affecting the filter performance that occur during the filter design. Window functions, which were developed with different methods in the literature, were designed with three different optimization techniques in this study. By using Particle Swarm Optimization (PSO), Grey Wolf Colony Optimization (GWCO), Cuckoo Search Optimization (CSO) algorithms, which are among current metaheuristic optimization methods, new window functions are designed for FIR digital filter design such that the designed new window functions have different window coefficients and design parameters. The difference of the designed window functions was analyzed with the Friedman and Wilcoxon tests, which are statistical data analysis methods, and the originality of the designed window functions was proven. FIR digital filters that can perform the same operation as the designed window functions have been produced and the results obtained by performing the filtering application of the EEG signal with the produced filters are presented in the study.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-06-14T07:00:00Z
      DOI: 10.1142/S0218126623503061
       
  • Backstepping-Based Six Degrees of Freedom Adaptive Control for Spacecraft
           Tracking a Noncooperative Target

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      Authors: Zhihao Zhu, Zhi Gao, Yu Guo
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      In this paper, the six degrees of freedom adaptive tracking control for chaser spacecraft with uncertainty and disturbance to approach a noncooperative target are studied. The system equations with coupled relative translation and relative rotation are modeled. Considering the unknown inertia uncertainties and state-dependant disturbances, a backstepping-based adaptive tracking control law is developed to achieve high-precision proximity operations between chaser and noncooperative target. The unknown inertia and disturbance are estimated by adaptive update laws. The properties of the developed control law are discussed through the comparison of simulation results.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-06-14T07:00:00Z
      DOI: 10.1142/S021812662450004X
       
  • A Distributed Projection Neurodynamic Approach for Solving BP Denoising
           Problem in Sparse Recovery

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      Authors: Wenjian He, Xueyong Xu, Yu Xia, Qin Mao, You Zhao, Tao Xiang
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      This paper investigates a novel projection neurodynamic approach for solving the basis pursuit denoising (BPDN) in a distributed manner. First, by using the distributed consensus theorem over undirected graph and supplementary variables method, the distributed version of BPDN is obtained. Second, with the help of projection operators, primal-dual dynamical system and derivative feedback terms, a novel distributed neurodynamic approach is proposed to deal with the distributed version of BPDN for sparse recovery. Moreover, the optimality and convergence properties of the proposed distributed projection neurodynamic approach (DPNA) are analyzed rigorously. Finally, we apply DPNA to sparse signal reconstruction which demonstrates the effectiveness of DPNA through numerical experiments. In addition, inspired by the role of image reconstruction technology in the field of defense against adversarial attack, we use DPNA as a preprocessing method to enhance the robustness of the deep model. Compared with known defense schemes such as JEPG, ComDefend, and OMP, our DPNA is better than them.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-06-12T07:00:00Z
      DOI: 10.1142/S0218126623502808
       
  • High-Stability and High-Speed 11T CNTFET SRAM Cell for MIMO Applications

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      Authors: M. Elangovan, G. Saravanan, S. Jayanthi, P. Raja, Kulbhushan Sharma, S. Nireshkumar
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Many researchers are actively working on developing a fast-performing static random-access memory (SRAM) cell with low-power consumption and high stability. This study also introduces one such new and all-round excellent SRAM cell. In this paper, an SRAM cell with eleven transistors (11T) developed using carbon nanotube field effect transistor (CNTFET) is introduced. This new 11T CNTFET SRAM cell is another variant of the Schmitt-trigger (ST)-based SRAM cell. This new SRAM cell structure is achieved by incorporating a single-ended write mode, a feed-back cutting technique and a single-ended read approach into a Schmitt-trigger (ST)-based SRAM cell. The WSNM of the proposed 11T CNTFET SRAM cell is increased by using single-ended writing scheme and feed-back cutting method in the cell. The single ended read approach of 11T CNTFET SRAM cell increases the RSNM as the storage nodes are not disturbed. The write power, hold power, read power, WSNM, HSNM, RSNM, write delay and read delay of this 11T CNTFET SRAM cell are 2.1538e-10 W, 1.7077e-09 W, 1.4524e-08 W, 423.61 mV, 402.20 mV, 425.56 mV, 1.2932e-10s and 5.5225e-12s, respectively. The parameters of the proposed cell are compared with 6T SRAM [M. Elangovan and K. Gunavathi, Stability analysis of 6T CNTFET SRAM cell for single and multiple CNTs, 2018 4th Int. Conf. Devices, Circuits Syst., Coimbatore, India, 16–17 March 2018, vol. 2, pp. 63–67], 8T SRAM [M. Elangovan, A novel Darlington based 8T CNTFET SRAM cell for low, J. Circuits Syst. Comput. 30 (2021) 2150213], 12T SRAM [S. Pal, S. Bose, W. H. Ki and A. Islam, Half-select-free low-power dynamic loop-cutting write assist SRAM cell for space applications, IEEE Trans. Electron Dev. 67 (2020) 80–89, doi:10.1109/TED.2019.2952397], 12T SRAM [N. Yadav, A. P. Shah and S. K. Vishvakarma, Stable, reliable, and bit-interleaving 12T SRAM for space applications: A device circuit co-design, IEEE Trans. Semicond. Manuf. 30 (2017) 276–284, doi:10.1109/TSM.2017.2718029], 12T SRA-M [P. Sharma, S. Gupta, K. Gupta and N. Pandey, A low power subthreshold Schmitt Trigger-based 12T SRAM bit cell with process-variation-tolerant write-ability, Microelectron. J. 97 (2020) 104703, doi:10.1016/j.mejo.2020.104703] and 12T SRAM [P. Sharma, S. Gupta, K. Gupta and N. Pandey, A low power subthreshold Schmitt Trigger based 12T SRAM bit cell with process-variation-tolerant write-ability, Microelectron. J. 97 (2020) 104703, doi:10.1016/j.mejo.2020.104703] cells to understand the performance of the proposed SRAM cell. From the comparative study, it is observed that the proposed cell is more stable than the other cells considered for the comparison and consumes less power in all write, read and hold modes. Also, the read time of the introduced cell is much less than the others. This study also recorded the information on how the performance of an SRAM cell varies as the CNTFET parameters change. The simulation is done with the HSPICE simulation tool using the Stanford University 32[math]nm CNTFET model.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-06-12T07:00:00Z
      DOI: 10.1142/S0218126623502912
       
  • Sentiment Analysis of Social Network Comment Text Based on LSTM and Bert

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      Authors: Hongying Si, Xianyong Wei
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      This paper has the aim of solving problems in research studies on the analysis tasks of text emotion; the problems are the low utilization of text, the difficulty of effective information extraction, the failure of recognizing word polysemy with effectiveness. Thus, based on LSTM and Bert, the method of sentiment analysis on text is adopted. To be precise, word embedding of dataset in view of the skip-gram model is used for training course. In each sample, the word embeddings combine matric with the two-dimensional feature to be neural network input. Next, construction of analysis model for text sentiment combines Bert pre-training language model and long short-term memory (LSTM) network, using the word vector pre-trained by Bert instead of that trained in the traditional way to dynamically generate the semantic vector according to the word context. Finally, the semantic representation of words from text is improved by effectively identifying the polysemy of words, and the semantic vector is input into the LSTM to capture the semantic dependencies, thereby enhancing the ability to extract valid information. The Accuracy, Precision, Recall and F-Measure for the method of Bert–LSTM based on analysis of text sentiment are 0.89, 0.9, 0.84 and 0.87, indicating high value than the compared ones. Thus, the proposed method significantly outperforms the comparison methods in text sentiment analysis.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-06-12T07:00:00Z
      DOI: 10.1142/S0218126623502924
       
  • A Novel Chaotic System with Exponential Nonlinearity and its Adaptive
           Self-Synchronization: From Numerical Simulations to Circuit Implementation
           

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      Authors: Kriti Suneja, Neeta Pandey, Rajeshwari Pandey
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      In this paper, a new three-dimensional chaotic system with two exponential nonlinearities is presented. The analysis of fixed points of the proposed system suggests existence of one hyperbolic index-2 spiral saddle-type fixed point. The proposed system fulfils Shilnikov criterion and nature of the chaos is found to be dissipative. Bifurcation diagrams, maximum Lyapunov exponents and Kaplan–Yorke dimension are examined through numerical simulations to investigate dynamics of proposed system. The hardware feasibility of the proposed system is illustrated through current feedback operational amplifier (CFOA)-based circuit implementation. The proposed circuit uses six CFOAs, two diodes to establish nonlinearity, eleven resistors and three capacitors. The absence of analog multiplier in the proposed circuit makes it superior to the existing counterpart in the sense that it does not require area and power-consuming active building block. To confirm the chaotic nature of the proposed circuit, LTspice simulations are done to obtain phase portraits which are found to be strange attractors and are topologically different from the shape of the existing attractors. Moreover, we have investigated the synchronization of the proposed chaotic system using adaptive control scheme and proposed CFOA-based complete circuit design of the adaptively synchronized system. Also, the effect of the tolerance of passive components and temperature on the behavior of the proposed chaotic circuit and the complete synchronization circuit has also been studied. It is found that the circuit is sensitive to the value of resistors and temperature to an extent and can work properly within their limits.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-06-12T07:00:00Z
      DOI: 10.1142/S0218126623502961
       
  • A Compact Wideband (22–44[math]GHz) Printed [math] MIMO Array Antenna
           with High Gain for 26/28/38[math]GHz Millimeter-Wave 5G Applications

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      Authors: Nour Elhouda Nasri, Sudipta Das, Mohammed El Ghzaoui, Boddapati Taraka Phani Madhav, Samudrala Vara Kumari, Mohammed Fattah
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      In this work, a novel multiple input multiple output (MIMO) array antenna system with a large bandwidth and high gain has been simulated, analyzed, fabricated, and measured. The proposed antenna is structured in [math] patch configuration along with a cross shaped ground plane loaded with four square and one circular shaped defect. The projected antenna occupies a total size of [math]. Several slots in an elliptic form have been added to the patches to achieve the required results in terms of wide bandwidth and high gain. The MIMO antenna array is fabricated and experimentally tested to confirm the simulation results. The suggested MIMO array antenna offers an impedance bandwidth of 22[math]GHz covering 22–44[math]GHz wide range of frequencies with a high peak gain of 17[math]dBi at 38[math]GHz. The designed MIMO antenna offers superior diversity performance and it supports several 5G NR bands n257/n258/n259/n260/n261 in the mm-wave spectrum. The suggested MIMO antenna supports 5G application bands that are deployed in UK, USA, China, Europe, Canada, India, and Europe.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-06-12T07:00:00Z
      DOI: 10.1142/S0218126623503000
       
  • Modeling of Hybrid Henry Gas Solubility Optimization Algorithm with Deep
           Learning-Based LED Driver System

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      Authors: A. Fayaz Ahamed, Y. Sukhi
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Light emitting diodes (LEDs) have become an effective lighting solution because of the characteristics of energy efficiency, flexible controllability and extended lifetime. They find use in numerous lighting systems for residents, industries, enterprises and street lighting applications. The efficiency and trustworthiness of the LED systems considerably based on the thermal mechanical loading improved several degradation schemes and respective interfaces. The complication of the LED systems limits the theoretic interpretation of the core reasons for the luminous variation or the formation of the direct correlation among the thermal aging loading and the luminous output. Therefore, this paper designs a new hybrid Henry gas solubility optimization with deep learning (HHGSO-DL) algorithm for LED driver system design. The presented HHGSO-DL technique mainly concentrates on the derivation of empirical relationships among the design parameters, thermal aging loading and luminous outcomes of the LED product. In the presented HHGSO-DL technique, bidirectional long short-term memory (BiLSTM) algorithm is executed for examining the empirical relationship and its hyperparameters can be tuned by the HHGSO algorithm. In this work, the HHGSO algorithm is derived by the integration of traditional HGSO algorithm with oppositional-based learning (OBL) concept. The performance of the HHGSO-DL technique can be investigated on LED chip packaging and LED luminaire with thermal aging loading. The extensive results demonstrate the promising performance of the HHGSO-DL technique over other state-of-the-art approaches.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-06-12T07:00:00Z
      DOI: 10.1142/S0218126623503012
       
  • Adaptive Passive Cell Balancing of Battery Management System for an
           Electric Vehicle Application

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      Authors: Jeyashree Arthanareeswaran, Ashok Kumar Loganathan
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      The battery pack powers the electric motor in a battery-operated electric vehicle. To achieve the required power, the cells are connected in series and parallel combinations to form a battery pack. The battery pack is monitored using the battery management system. During the charging and discharging process, imbalance occurs in the cells due to intrinsic and extrinsic properties of the battery chemistry. This cell imbalance induces problems, such as an under-discharge, over-charge, increase in charging time and reduction in battery lifecycle. The passive and active balancing technique is employed to balance the individual cells in the battery pack. In this paper, the adaptive passive cell balancing is performed for a battery pack of six series-connected Li-ion cells of rating 3.6[math]V, 4[math]Ah under ideal, charging, discharging and drive cycle conditions using MATLAB/Simscape. In this proposed adaptive passive cell balancing methodology, a dynamic resistance is selected based on the threshold values to balance the individual cells in the battery pack. For this battery pack, the proposed design achieves 34% reduction in balancing time, 17% reduction in energy loss, and 14% reduction in power loss under ideal conditions. The experimental verification is also done and shows that the balancing time is about 2400[math]s. The capacity fade factor of the battery pack is also analyzed.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-06-09T07:00:00Z
      DOI: 10.1142/S021812662350278X
       
  • ECG R-Wave Detection and Its Application in Left Ventricular Assist Device

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      Authors: Rongguo Yan, Jie Wang, Jiahui Wang, Hongran Shao, Xuchen Fang
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Heart failure is one of the major diseases endangering human life. As a transitional support treatment before heart transplantation, the left ventricular assist device (LVAD) has significantly improved the quality of life and survival rate of patients with end-stage heart failure. In the automatic detection of electrocardiogram (ECG), the detection of QRS wave groups is the most critical aspect, which affects the correctness and accuracy of subsequent data analysis and processing. The paper used the data from the MIT-BIH database and the data collected from human ECG as the original number of samples for further processing. It processed the data through a high-order finite impulse response (FIR) low-pass filter and Shannon energy algorithm, and added the use of a high-order adaptive median filter algorithm on a field programmable gate array (FPGA) to minimize the noise of the processed real-time data. Finally, the tested ECG R-wave was used to drive the LVAD. After successful simulation by MATLAB and Modelsim software, the scheme of the real-time ECG signal controlling blood pump system was realized on the FPGA platform. The experiment showed that the method proposed could accurately extract the R-wave and control the LVAD to pump blood simultaneously.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-06-06T07:00:00Z
      DOI: 10.1142/S0218126623503085
       
  • A Quantitative Evaluation Method for Communication Impact of Sporting
           Events Based on SIR Dynamic Diffusion Model

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      Authors: Fangni Li, Siyuan Du
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      The quantitative evaluation for communicable events has been a significant demand in digital society management. This paper takes the 2022 Winter Olympic Games as the object and proposes a quantitative evaluation method for the communication impact of sporting events based on the SIR dynamic diffusion model. Specifically, this study combinesa long short-term memory (LSTM) neural network, wavelet packet decomposition, and other techniques to propose a digital evaluation approach for the quantification of communication impact. Among these, the transfer probability is quantified and calculated by the user node reputation value algorithm. In the experimental simulation, the effects of different mechanisms of joining consensus nodes and blockchain on the propagation probability in the model are discussed, respectively. Some simulation experiments are conducted on the real-world scenes of social networks, and the simulation results show that the number of nodes spreading false information is reduced by 9.89% compared with baseline methods. Finally, a sports event communication effect evaluation index system was constructed, and the data characteristics of indicators at all levels were analyzed to preliminarily predict the communication effect, after which the fuzzy hierarchical comprehensive evaluation method, combined with the expert survey method, was used to empirically evaluate, and test the communication effect of its events.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-05-30T07:00:00Z
      DOI: 10.1142/S0218126623502791
       
  • A Flooding-Based Droplet Routing Protocol for Digital Microfluidic Biochip

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      Authors: Jyotiranjan Swain, Sumanta Pyne
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Droplet routing is a critical phase in the biochemical synthesis using digital microfluidic biochip. The goal is to transport droplets from one module to another, maintaining fluidic constraint at every instant. In this paper, we proposed a new flooding-based droplet routing protocol. It uses multiple copies of scout packets to flood the whole biochip and discover multiple routes. The explored routes are then validated by hello packets. Route length defines the priority order among droplets. The routes are mapped using a new heuristic number of shared cells. In the compaction phase, generate the parallel moving sequence for droplets. The simulation result shows 12.25% and 20.5% improvement in the latest arrival time for free and virtual topology, respectively.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-05-30T07:00:00Z
      DOI: 10.1142/S0218126623503024
       
  • A Comprehensive Study of Different Techniques for Voltage References

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      Authors: Komal Duggal, Rishikesh Pandey, Vandana Niranjan
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      In the analog and mixed-signal integrated circuits, voltage references that are independent of various factors such as temperature drift, noise, supply voltage, etc., and efficient in terms of power as well as area, are highly in demand to improve the efficiency of the overall circuits. Voltage references are one of those circuits that have applications in both high-power systems and low-power system-on-chip (SoC) designs for wireless connectivity like the internet of the things (IoT) or the internet of the medical things (IoMT). They are responsible for providing a stable bias or reference voltage. Thus, voltage reference influences directly or indirectly the performance of these systems. A comparative study between the techniques used in bandgap voltage references and CMOS voltage references, in terms of performance parameters such as line sensitivity, output noise, PSRR, temperature coefficient, etc., is presented in this paper so that we can choose the voltage references as per the applications and environment.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-05-29T07:00:00Z
      DOI: 10.1142/S0218126623300052
       
  • Interrupt Stack Protection for Linux Kernel in Hardware Virtualization
           Layer of ARM64 Architecture

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      Authors: Chenglai Xiong, Xuejun Yu, Jialing Yang, Guoqi Xie
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Kernel security is of paramount importance in computer systems. As the number of vulnerabilities in the kernel continues to grow, computer systems security risks are increasing. To prevent the kernel interrupt stack from being attacked, researchers provide discussion over complete hypervisor supervision and kernel co-layer security domain techniques. Complete hypervisor supervision brings a heavy overhead and co-layer security domain techniques cannot achieve privilege-level isolation. We focus on memory-based security threats in kernel security vulnerabilities, protecting the kernel at a higher level by using virtualization technology. Compared with the existing work, our implementation method achieves a small performance loss to protect the interrupt stack. We have implemented our system on openEuler operating systems and Phytium processors. Although the deployment of protection code will result in increased kernel interrupt latency and processor overhead, experimental verification shows that the overall system overhead is acceptable.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-05-29T07:00:00Z
      DOI: 10.1142/S0218126623502705
       
  • Speculation-Free Function Table Construction in LLVM IR for Fine-Grained
           Control Flow Integrity

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      Authors: Sirong Zhao, Xuejun Yu, Jianchun Luo, Guoqi Xie
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Securing the operating system kernel is the key to overall system security. Due to developer negligence and the inherent limitations of the code language, kernel data is exposed to various security risks, such as execution flow leakage and privilege hijacking. In binary security, most vulnerabilities are exploited by hijacking the control flow to make the program run according to the attacker’s idea of attack. Control flow integrity is a common defense scheme against control flow hijacking attacks. In this paper, we use speculation-free function tables in LLVM IR to achieve the integrity of fine-grained control flow. The technique enforces CFI policies by making logical judgments on jump instruction stubbing. All jump instructions share a common function table, and the information in the table is not repeatedly stored, reducing the additional memory consumption caused by the function table and achieving fine-grained CFI protection.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-05-29T07:00:00Z
      DOI: 10.1142/S021812662350281X
       
  • Dimensional Measurement Method for PVC Plates Based on Improved Zernike
           Moment

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      Authors: Canwei Dai, Daneng Pi, Jiajun Li
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      There are many pixel-level and sub-pixel-level edge localization methods, but some methods perform poorly in the presence of noise and require image pre-processing or iterative methods to improve the localization accuracy, which increases the computational cost. In this paper, we propose an improved Zernike moment subpixel edge localization algorithm based on the ramp model, and combine the idea of bilinear interpolation method to optimize the selection of parameters in the edge model. Through the validation of several examples, it is found that the algorithm outperforms the compared methods for edge localization of noisy images. After the edge detection, in order to improve the measurement accuracy of polyvinyl chloride (PVC) plates, a parallel line fitting method is proposed to fit the edge points, thus avoiding the interference of extraneous noise points and achieving accurate measurement of PVC plate size. The experiments were carried out for several measurements of the sheet length, and the method was verified to have high measurement accuracy.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-05-29T07:00:00Z
      DOI: 10.1142/S0218126623502936
       
  • A Single Image Dehazing Method Based on End-to-End CPAD-Net Network in
           Deep Learning Environment

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      Authors: Chaoda Song, Jun Liu
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      To address the issues of blurred details and distortion of color in the images recovered by the original AOD-Net dehazing method, this paper proposes a CPAD-Net dehazing network model based on attention mechanism and dense residual blocks. The network is improved on the basis of AOD-Net, which can reduce the errors arising from the separately determined transmittance and atmospheric light values. A new dense residual block structure is designed to replace the traditional convolution method, which effectively improves the detail processing capability and the representation ability of the network model for image feature information. On this basis, the attention module determines how to learn the weights according to the feature importance of distinct channels and distinct pixels, and then obtain the recovery of images in terms of color and texture. The experiments showed that the dehazing efficiency of our method are richer in texture detail information and more natural in color recovery. Compared with other algorithms, the PSNR and SSIM indexes of our method are considerably superior to those listed algorithms, which definitively demonstrates that the dehazing effect of our method is more effective, and the recovered images are more realistic and natural.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-05-26T07:00:00Z
      DOI: 10.1142/S0218126623502729
       
  • Applying Coding Behavior Features to Student Plagiarism Detection on
           Programming Assignments

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      Authors: Zheng Li, Yuting Zhang, Yong Liu, Yonghao Wu, ShuMei Wu
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      In programming education, the result of plagiarism detection is a crucial criterion for assessing whether or not students can pass course exams. Recently, the prevalent methods for detecting student plagiarism have been proposed by analyzing source code. These methods extract features (such as token, abstract syntax tree and control flow graph) from the source code, examine the similarity of codes using various similarity detection methods, and then perform plagiarism detection based on a predefined plagiarism threshold. However, these previous methods for plagiarism detection have some problems. First, they are less effective in detecting code modification related to structure. Second, they require a considerable number of training data, which demand high computing time and space. Third, they cannot determine whether students plagiarize in time. We propose a novel plagiarism detection method by analyzing the behavioral features of students during the coding process. Specifically, we extract five behavioral features based on students’ programming habits. Then, we use a feature ranking-based suspiciousness algorithm to obtain the possibility of student plagiarism. Based on our proposed method, we develop the Online Integrated Programming Platform. To evaluate the accuracy of our method, we conduct a series of experiments. Final experimental results indicate that our method achieves promising results with Accuracy, Precision, Recall and [math] values of 0.95, 0.90, 0.95 and 0.92, respectively. Finally, we also analyze the correlation between whether students plagiarized and their regular and final grades, which can further verify the effectiveness of our proposed method.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-05-26T07:00:00Z
      DOI: 10.1142/S0218126623502869
       
  • VDIBA-Based Current-Mode PID Controller Desi̇gn

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      Authors: Umut Cem Oruçoğlu, Emre Özer, Firat Kaçar
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      This paper aims to bring a voltage differencing inverting buffered amplifier (VDIBA)-based current-mode (CM) proportional integral derivative (PID) controller circuit. This CM PID controller is designed with a single VDIBA, three resistors, and two grounded capacitors. The proposed circuit is easy to design, and the control parameters can be tuned without changing the design configuration. A sensitivity analysis of the control parameters to electronic components has been conducted. The Simulation Program with Integrated Circuit Emphasis (SPICE) simulation has been performed using Taiwan Semiconductor Manufacturing Company (TSMC) [math]m complementary metal-oxide semiconductor (CMOS) technology parameters. An application circuit example is given to demonstrate the reliability of the proposed PID design. A comparison table of the PID controllers previously reported in the literature is also presented.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-05-26T07:00:00Z
      DOI: 10.1142/S0218126623502882
       
  • Mathematical Modeling and Numerical Simulation of a Single-Turn MEMS
           Piezoresistive Pressure Sensor for Enhancement of Performance Metrics

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      Authors: Eshan Sabhapandit, Sumit Kumar Jindal, Dadasikandar Kanekal, Hemprasad Yashwant Patil
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Micro-Electro-Mechanical System (MEMS)-based pressure sensors operating on the principle of piezoresistivity have found profound application in various fields like automobile, aerospace, aviation, biomedical and consumer electronics. Various research studies have been conducted to optimize the design of MEMS-based pressure sensors to meet specific requirements of different fields. Modification in the structure of the piezoresistors placed on these sensors has shown great effect in this regard. However, most of these improvements have been validated through fabrication and measurement, but there has been a lack of significant studies developing analytical models to explain these improvements. This paper studies the performance of a single-turn piezoresistor design on a square silicon diaphragm. The analytical model relates the dimensions of the single-turn piezoresistor on a square diaphragm to the output voltage, and hence, sensor sensitivity is laid out. The correctness of the relation is also validated through Finite Element Analysis (FEA) performed using COMSOL Multiphysics software. Hence, an optimized single-turn design is presented which achieves a sensitivity of 203.57[math]mV/V/MPa over a pressure range of 0–1[math]MPa. These results are then compared to work from existing literature. The comparison shows an improved performance which was achieved by optimizing the design through its derived analytical model. The proposed sensor can be utilized in disposable blood pressure measurement system where high sensor sensitivity is required.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-05-23T07:00:00Z
      DOI: 10.1142/S0218126623502766
       
  • A 4.21-[math]V Offset Voltage and 42-nV/[math]Hz Input Noise Chopper
           Operational Amplifier with Dynamic Element Matching

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      Authors: Ruikai Zhu, Chenjian Wu
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      This paper presents a high-efficiency operational amplifier (op-amp) used in the readout circuit of micro-sensor. The chopping and dynamic element matching (DEM) techniques are used in the proposed design, which greatly reduce the offset voltage and flicker noise [math] noise) of the op-amp. By optimizing the circuit structure, the maximum chopping frequency is increased to 2[math]MHz when the offset voltage is less than [math][math]V. Therefore, the maximum bandwidth of signal processing can be up to 1MHz. The proposed circuit is designed and fabricated using TSMC 0.18-[math]m 1P5M CMOS technology. It occupies an area of 0.16[math]mm2 and consumes [math]A from a 1.8-V supply. When the chopping frequency is 100[math]kHz, the input-referred offset voltage is 4.21[math][math]V and the input-referred noise is 42[math]nV/[math][math]Hz. It achieves a noise efficiency factor of 7.82 and a power efficiency factor of 110.07.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-05-23T07:00:00Z
      DOI: 10.1142/S0218126623502845
       
  • A New Design of NCFF Compensated Operational Amplifier for Continuous-Time
           Delta Sigma Modulator

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      Authors: Kasturi Ghosh
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      A power-efficient second-order no-capacitor feedforward (NCFF) op-amp has been designed in 180[math]nm CMOS process. To attain high gain and better common mode rejection, cross-coupled loading network has been used in each differential stage. The designed op-amp achieves over 40[math]dB gain up to 400[math]MHz and over 10[math]dB open loop gain up to 4[math]GHz with 0.87[math]mW power consumption. It is suitable for application in continuous-time delta-sigma modulator (CT [math]M) with sampling frequency in GHz range.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-05-23T07:00:00Z
      DOI: 10.1142/S0218126623502894
       
  • Parallel Optimization of BLAS on a New-Generation Sunway Supercomputer

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      Authors: Yinqiao Ren, Yi Xu
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      The new-generation Sunway supercomputer has ultra-high computing capacity. But due to the unique heterogeneous architecture of the supercomputer, the open-source versions of basic linear algebra subprograms (BLAS) are insufficient for performance or compatibility. In addition, due to the update of the architecture, BLAS based on the previous Sunway could not fully exploit the performance of the successor. To address the challenges, we propose an optimized BLAS on the new-generation Sunway supercomputer in this paper. Specially, for achieving efficient computation, a parallel optimization method based on the new-generation Sunway for the Level-1 BLAS computing between vectors and the Level-2 BLAS computing between vectors and matrices is first proposed. Then, an adaptive scheduling algorithm for various data sizes is proposed, which is used to balance the tasks of core groups. Finally, to achieve highly efficient general matrix multiplication (GEMM) kernels, a parallel optimization method based on the new-generation Sunway for the Level-3 BLAS computing between matrices is proposed, which includes source-level optimization as well as assembly-level optimization. Experimental results show that the memory bandwidth utilization of the optimized Level-1/2 BLAS exceeds 95%, and the computational efficiency of the optimized GEMM kernel exceeds 94%.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-05-23T07:00:00Z
      DOI: 10.1142/S0218126623502900
       
  • High Performance FPGA Implementation of Single MAC Adaptive Filter for
           Independent Component Analysis

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      Authors: M. R. Ezilarasan, J. Britto Pari, Man-Fai Leung
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Blind source separation (BSS) is the process of extracting sources from mixed data without or with limited awareness of the sources. This paper uses field programmable gate array (FPGA) to create an effective version of the Blind source separation algorithm (ICA) with a single Multiply Accumulate (MAC) adaptive filter and to optimize it. Recently, space research has paid a lot of attention to this technique. We address this problem in two sections. The first approach is ICA, which seeks a linear revolution that can enhance the mutual independence of the mixture to distinguish the source signals from mixed signals. The second is a powerful flexible finite impulse response (FIR) filter construction that makes use of a MAC core and is adaptable. The adjustable coefficient filters have been used in the proposed study to determine the undiscovered system utilizing an optimal least mean square (LMS) technique. The filter tap under consideration in this paper includes 32 taps, and hardware description language (HDL) and FPGA devices were used to carry out the analysis and synthesis of it. When compared to the described architecture, the executed filter architecture uses 80% fewer resources and increases clock frequency by nearly five times, and speed is increased up to 32%.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-05-23T07:00:00Z
      DOI: 10.1142/S0218126623502948
       
  • Electronically Tunable Differential Difference Current Conveyor Using
           Commercially Available OTAS

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      Authors: Boonying Knobnob
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      This paper presents a new electronically tunable differential difference current conveyor (EDDCC) using the commercially available operational transconductance amplifiers (OTAs). Unlike the conventional DDCC, the proposed EDDCC offers current gain that can be electronically controlled. The EDDCC can be used to realize a new electronically tunable fully differential difference second-generation current conveyor (EFDCCII). Therefore, the current gain of the proposed EFDCCII can be electronically controlled. To show the advantages of the proposed EDDCC and EFDCCII, the EDDCC has been used to realize a quadrature oscillator and the EFDCCII has been used to realize a current-mode universal filter. The proposed circuits have been investigated by simulation and experimental tests using the commercially available LM13700 OTAs.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-05-23T07:00:00Z
      DOI: 10.1142/S021812662350295X
       
  • An Android Malware Detection Method Using Multi-Feature and MobileNet

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      Authors: Zhiyao Yang, Xu Yang, Heng Zhang, Haipeng Jia, Mingliang Zhou, Qin Mao, Cheng Ji, Xuekai Wei
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Most of the existing static analysis-based detection methods adopt one or few types of typical static features for avoiding the problem of dimensionality and computational resource consumption. In order to further improve detecting accuracy with reasonable resource consumption, in this paper, a new Android malware detection model based on multiple features with feature selection method and feature vectorization method are proposed. Feature selection method for each type of features reduces the dimensionality of feature set. Weight-based feature vectorization method for API calls, intent and permission is designed to construct feature vector. Co-occurrence matrix-based vectorization method is proposed to vectorize opcode sequence. To demonstrate the effectiveness of our method, we conducted comprehensive experiments with a total of 30,000 samples. Experimental results show that our method outperforms state-of-the-art methods.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-05-23T07:00:00Z
      DOI: 10.1142/S0218126623502997
       
  • Toward Design and Implementation of Self-Balancing Robot Using Deep
           Learning

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      Authors: Preeti Nagrath, Rachna Jain, Drishti Agarwal, Gopal Chaudhary, Tianhong Huang
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      In the Internet of Things (IoT) era, an immense amount of sensing devices are obtained and produce various sensory data over time for a wide range of disciplines and applications. These devices will result in significant, fast, and real-time data streams based on the utilization characteristics. Utilizing analytics over such data streams to identify new information, model future insights, and make control decisions is a necessary process that makes IoT a worthy paradigm for businesses and a quality-of-life improving technology. This paper presents a study of digital agriculture and its significance in terms of the application of an IoT-based device — a two-wheeled self-balancing robot — followed by a thorough procedural explanation of the development of the device, which begins with the mathematical modeling of the system through the Euler–Lagrange method to obtain the equations of motion for the same and linearize the equation to define the control method to be used to balance the robot structure, all based on the concept of the inverted pendulum. Then paper discusses the suitable and the most efficient control method, which is the linear quadratic regulator (LQR), for these robots. Then deep learning-based LQR (DL-LQR) method is implemented in the robots performing the algorithm to balance it successfully.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-05-22T07:00:00Z
      DOI: 10.1142/S0218126623502602
       
  • Cascaded Inner Loop Fuzzy SMC for DC–DC Boost Converter

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      Authors: Y. Rekha, V. Jamuna, I. William Christopher
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      In this paper, the implementation of the Fuzzy Sliding Mode Controller (FSMC) in the inner loop of the cascaded control structure of the DC–DC Boost Converter is presented. On account of nonlinearity and nonminimum phase nature, switched-mode DC–DC converters show a poor response in their dynamic characteristics. In most of the works, the inner loop is served by SMC/FLC, and the outer loop by PI. In this study, the proposed FSMC, which is the combination of SMC and FLC is recommended in the inner current loop which reduces the chattering phenomena and improves the robustness against uncertainties, disturbances and varying circuit parameters with the reaching law. The Lyapunov approach is considered to study the stability of the proposed controller. A comparative analysis is made with the results obtained from the proposed FSM controller, Fuzzy and SMC control. The effectiveness of the FSMC controller is validated by observing its system performance.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-05-22T07:00:00Z
      DOI: 10.1142/S0218126623502699
       
  • PipCKG-BS: A Method to Build Cybersecurity Knowledge Graph for Blockchain
           Systems via the Pipeline Approach

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      Authors: Jianbin Li, Jifang Li, Chunlei Xie, Yousheng Liang, Ketong Qu, Long Cheng, Zhiming Zhao
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      The increasing sophistication of cyberattacks on blockchain systems has significantly disrupted security experts from gaining immediate insight into the security situation. The Cybersecurity Knowledge Graph (CKG) currently provides a novel technical solution for blockchain system situational awareness by integrating massive fragmented Cyber Threat Intelligence (CTI) about blockchain technology. However, the existing literature does not provide a solution for building CKG appropriate for blockchain systems. Therefore, designing a method to construct a CKG for blockchain systems by efficiently extracting information from the CTI is mandatory. This paper proposes PipCKG-BS, a pipeline-based approach that builds CKG for blockchain systems. The PipCKG-BS incorporates contextual features and Pre-trained Language Models (PLMs) to improve the performance of the information extraction process. Precisely, we develop the Named Entity Recognition (NER) and Relation Extraction (RE) models for cybersecurity text in PipCKG-BS. In the NER model, we apply the prompt-based learning paradigm to cybersecurity text by constructing prompt templates. In the RE model, we employ external features and prior knowledge of sentences to improve entity relationship extraction accuracy. Several experimental results demonstrate that PipCKG-BS is better than advanced methods in extracting CTI information and is an appealing solution to build high-quality CKG for blockchain systems.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-05-22T07:00:00Z
      DOI: 10.1142/S0218126623502742
       
  • A Vision Comprehension-Driven Intelligent Recognition Approach for Actions
           of Tennis Players Based on Improved Convolution Neural Networks

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      Authors: Zhiqiang Cai, Zhixin Zhang, Zhengdao Lu
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      In this paper, we focus on two tasks: semantic segmentation and target detection in the visual semantic understanding of tennis sports images and we optimize the network structure to achieve a more complete location contour information mining of the target. In detail, we focus on a weakly supervised image semantic segmentation method based on null convolution pixel relations. To address the problem of incomplete pixel-level pseudo-labeling, we introduce a cavity convolution unit with multiple cavity rates and a self-attentive mechanism in the classification model to adaptively enhance the target regions and suppress other irrelevant regions while expanding the perceptual field to generate high-quality pixel-level pseudo-labeling and then train the semantic segmentation model. The final experimental results show that the hierarchical fusion algorithm proposed in this paper significantly outperforms other algorithms, and the overall classification accuracy of the tandem cavity neural network algorithm reaches 81% with good overall classification results. The recognition accuracy of static movements is higher than that of dynamic movements.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-05-22T07:00:00Z
      DOI: 10.1142/S0218126623502778
       
  • Resource Allocation for 5G Network Considering Privacy Protection in Edge
           Computing Environment

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      Authors: Li Wang, Xiaokai Wang
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      In the field of Internet of Things, mobile communication will be deeply integrated with industrial construction, biomedicine, agricultural production, transportation and other industries to fully realize the “Internet of Everything” and realize smart city and sustainable development. This paper intends to solve problems in increasing latency and consumption of energy and security after deploying Mobile Edge Computing (MEC) servers in single cell multi-user network model, and has advocated a strategy of allocating the resources of 5G communication in regards to the protection mechanism for privacy in the environment of edge computing. First of all, solution model for the problem is characterized as a model with time delay and energy consumption. Second, privacy is used to measure the uncertainty of data in order to quantify privacy data while computing the allocation of tasks and facilitate the design of objective function. Finally, the task migration problem of minimizing energy consumption under the limitation of completion time is constructed as a nonlinear 0–1 programming problem. Besides, we design the optimal resource allocation strategy of discrete algorithm of binary particle swarm optimization (BPSO) for problem solution. Results indicate that while the quantity of users is 100, the total user expenditure of proposed method is 18.3J, which is lower than 20.0J and 30.7J of the compared methods. Moreover, the proposed method has lower latency and energy consumption, which can well balance the load of MEC servers.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-05-22T07:00:00Z
      DOI: 10.1142/S0218126623502857
       
  • An Efficient Fully Automated Lung Cancer Classification Model Using
           GoogLeNet Classifier

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      Authors: P. Samundeeswari, R. Gunasundari
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Lung cancer (LC) causes the most superior mortality rate globally. Medical experts diagnose the disease and stage with prolonged procedures. Early diagnosis is only a promising way to improve the survival rate. Previously, an enormous investigation was executed to detect LC by different artificial intelligence systems. Still, detection accuracy has to be improved as equal to expert diagnosis. They were not majorly focused on LC type and TNM stage prediction. However, the treatment planning is strictly based on one cancer cell type and the survival rate is closely related to the stage. Hence in this work, a new Fully Automated Lung Cancer Classification System (FALCCS) using GoogLeNet classifier is proposed to detect non-small cell LC along with its types and stages. Initially, our previous segmentation work is adapted to automatically extract tumor regions from CT images. Then, a new post-processing technique is introduced to enhance image features and create required training databases. Using deep learning techniques, the proposed system used GoogLeNet to create five new automatic classifiers to perform LC detection, type, T state, N state and M state prediction. Finally, TNM state classifier’s outputs were gathered and combined to find the LC stage by referring TNM staging system eighth edition. The proposed system successfully put a novel step towards TNM stage classification as equal to expert’s diagnosis. Experimental results show that the proposed system achieved the superior cancer detection accuracy of 99.2% simultaneously with the type and final TNM stage categorizer resulting in 96.5% and 90.5% of accuracy. These results illustrate the proposed classifier’s efficacy more than the existing methods.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-05-13T07:00:00Z
      DOI: 10.1142/S0218126623502468
       
  • A Deep Learning and Morphological Method for Concrete Cracks Detection

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      Authors: Qilin Jin, Qingbang Han, Nana Su, Yang Wu, Yufeng Han
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Concrete crack detection is essential for infrastructure safety, and its detection efficiency and accuracy are the key issues. An improved YOLOV5 and three measurement algorithms are proposed in this paper, where the original prediction heads are replaced by Transformer Heads (TH) to expose the prediction potential with one self-attention model. Experiments show that the improved YOLOV5 effectively enhances the detection and classification of concrete cracks, and the Mean Average Precision (MAP) value of all classes increases to 99.5%. The first method is more accurate for small cracks, whilst the average width obtained based on the axial traverse correction method is more exact for large cracks. The crack width obtained from the concrete picture sample is the same as that obtained from the manual detection, with a deviation rate of 0–5.5%. This research demonstrates the recognition and classification of concrete cracks by integrating deep learning and machine vision with high precision and high efficiency. It is helpful for the real-time measurement and analysis of concrete cracks with potential safety hazards in bridges, high-rise buildings, etc.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-05-13T07:00:00Z
      DOI: 10.1142/S0218126623502717
       
  • Recent Progress on Calibration Methods of Timing Skew in Time-Interleaved
           ADCS

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      Authors: Huijing Yang, Ruidong Zhang, Mingyuan Ren
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Time interleaving has become a very common choice for increasing ADC speed. However, it is accompanied by defects such as offset, gain and time offset between the individual sub-ADCs, which can seriously degrade the performance of the overall ADC. For the elimination of gain and offset errors, the solution is relatively simple, and the calibration of the time offset is still in the exploratory stage. This paper systematically reviews several current mainstream time-interleaved ADC timing offset correction methods. At the same time, the characteristics and development trend of calibration methods are summarized.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-05-11T07:00:00Z
      DOI: 10.1142/S0218126623300040
       
  • A Self-Improved Optimizer-Based CNN for Wind Turbine Fault Detection

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      Authors: T. Ahilan, Andriya Narasimhulu, D. V. S. S. S. V. Prasad
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      In comparison to other alternative energy sources, wind power is more affordable and environmentally friendly, making it one of the most significant energy sources in the world. It is vital to monitor the condition of each wind turbine in the farm and recognize the various states of alert since difficulties with the operation as well as maintenance of wind farms considerably contribute to the rise in their overall expenses. The Supervisory Control and Data Acquisition (SCADA) data-based continuous observation of wind turbine conditions is the most widely used existing strategy to detect the fault early by preventing the wind turbine from reaching a shutdown stage. Several parameters irrelevant to the faults are saved in the SCADA system while the wind turbine is operating. To increase the efficacy of wind turbine fault diagnostics, optimally selected SCADA data parameters are required for fault prediction. Hence, this paper introduces an optimized Convolutional Neural Network (CNN)-based wind turbine fault identification method. For more precise detection, a Self-Improved Slime Mould Algorithm (SI-SMA) is used for the optimal selection of SCADA parameters as well as weight optimization of CNN. The proposed SI-SMA method is an enhanced form of the standard Slime Mould Algorithm (SMA). Eventually, an error analysis and a stability analysis are carried out to check the overall effectiveness of the suggested approach. In particular, the root mean square error (RMSE) of the implemented algorithm is lower, and it is 0.69%, 1.58%, 0.81% and 1.71% better than the existing FF, GWO, WOA and SMA models.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-05-11T07:00:00Z
      DOI: 10.1142/S021812662350247X
       
  • Low-Phase Noise, Low-Power Four-Stage Ring VCO for OFDM Systems

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      Authors: Parul Trivedi, Brij Bihari Tiwari
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      This work describes a new design approach for a four-stage ring Voltage-Controlled Oscillator (VCO) for Orthogonal Frequency Division Multiplexing (OFDM) systems, which is ideal for low-phase noise and low-power applications. The phase noise of the proposed ring VCO has been improved by limiting the delay cell’s output current to a relatively narrow portion of the output waveform, and the complementary nature of the delay cell prevents the power from increasing substantially. The proposed VCO is designed and simulated in GPDK 90[math]nm CMOS technology using Cadence Virtuoso under 1.0[math]V power supply. A tuning frequency range of 112–362[math]MHz is obtained with control voltage ranges 0.0–1.0[math]V. The proposed ring VCO consumes 1.07[math]mW of power. At a 1[math]MHz offset frequency, phase noise reduction is achieved to [math][math]dBc/Hz. The proposed design is also validated by the Process–Voltage–Temperature (PVT) analysis. The proposed VCO has a Figure of Merit (FOM) of [math][math]dBc/Hz and acquires a total area of 0.00085[math]mm2.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-05-11T07:00:00Z
      DOI: 10.1142/S0218126623502572
       
  • Area, Delay, and Energy-Efficient Full Dadda Multiplier

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      Authors: Muteen Munawar, Zain Shabbir, Muhammad Akram
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      The Dadda algorithm is a parallel structured multiplier, which is quite faster as compared to array multipliers, i.e., Booth, Braun, Baugh-Wooley, etc. However, it consumes more power and needs a larger number of gates for hardware implementation. In this paper, a modified-Dadda algorithm-based multiplier is designed using a proposed half-adder-based carry-select adder with a binary to excess-1 converter and an improved ripple-carry adder (RCA). The proposed design is simulated in different technologies, i.e., Taiwan Semiconductor Manufacturing Company (TSMC) 50[math]nm, 90[math]nm, and 120[math]nm, and on different GHz frequencies, i.e., 0.5, 1, 2, and 3.33[math]GHz. Specifically, the 4-bit circuit of the proposed design in TSMC’s 50[math]nm technology consumes 25[math]uW of power at 3.33[math]GHz with 76[math]ps of delay. The simulation results reveal that the design is faster, more power-energy-efficient, and requires a smaller number of transistors for implementation as compared to some closely related works. The proposed design can be a promising candidate for low-power and low-cost digital controllers. In the end, the design has been compared with recent relevant works in the literature.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-05-11T07:00:00Z
      DOI: 10.1142/S0218126623502584
       
  • A Novel Business Scheduling Approach for Enterprises via Vision
           Sensing-Based Automatic Documental Information Extraction

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      Authors: Yang Zhang, Xiu Liu
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Currently, the prevalence of various Internet intrusion technologies has brought much challenge to the enterprise management. For many core documents, the information leakage may lead to the loss of secrets of enterprises. Therefore, some core official documents in enterprises are in the format of papers, rather than electronic format. As a consequence, it is of significance to develop automatic information processing techniques for official documents in the format of papers, so as to improve the working efficiency of enterprises. In this paper, a novel business scheduling approach for enterprises via vision sensing-based automatic documental information extraction is proposed. For the first stage, the vision sensing-based optical character recognition (OCR) technique is utilized to extract textual information from official documents in the format of papers. For the second stage, the deep neural network is utilized to output business scheduling results on the basis of digital recognition contents from the first stage. Finally, the experimental simulation is also carried out to verify efficiency of the proposal.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-05-11T07:00:00Z
      DOI: 10.1142/S0218126623502663
       
  • A Graph Neural Network-Based Digital Assessment Method for Vocational
           Education Level of Specific Regions

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      Authors: Weitai Luo, Haining Huang, Wei Yan, Daiyuan Wang, Man Yang, Zemin Zhang, Xiaoying Zhang, Meiyong Pan, Liyun Kong, Gengrong Zhang
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      With the prevalence of artificial intelligence technologies, big data has been utilized to higher extent in many cross-domain fields. This paper concentrates on the digital assessment of vocational education level in some specific areas, and proposes a graph neural network-based assessment model for this purpose. Assume that all vocational colleges inside a specific region are with a social graph, in which each college is a node and the relations among them are the edges. The graph neural network (GNN) model is formulated to capture global structured features of all the nodes together. The GNN is then employed for the sequential modeling pattern, and the evolving characteristics of all the colleges can be captured. Some experiments are also conducted to evaluate the performance of the proposed GNN-VEL. It is compared with two typical forecasting methods under evaluation of two metrics. The results show that it performs better than other two methods.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-04-28T07:00:00Z
      DOI: 10.1142/S0218126623502626
       
  • Semantic Segmentation Algorithm of Night Images Based on Attention
           Mechanism

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      Authors: Xiaona Xie, Zhiyong Xu, Tao Jiang, JianYing Yuan, Zhengwei Chang, Linghao Zhang
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      At present, there are many semantic segmentation algorithms with excellent performance for intelligent driving vehicles, but most of them only work well on scenes with good illumination. In order to solve the problem of scene segmentation under low illumination, this paper proposes a novel semantic segmentation algorithm that combines visible and infrared images. In this algorithm, two parallel encoders are designed as the input of the images, and the decoder divides the fused images output from the encoder. The model is based on ResNet algorithm, and the residual attention module is used in each branch to mine and enhance the spatial features of multilevel channels to extract images information. Experiments are carried out on publicly available thermal infrared and visible datasets. The results show that the algorithm proposed in this paper is superior to the algorithm using only visible images in semantic segmentation of traffic environment.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-04-28T07:00:00Z
      DOI: 10.1142/S0218126623502638
       
  • Track Signal Intrusion Detection Method Based on Deep Learning in
           Cloud-Edge Collaborative Computing Environment

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      Authors: Yaojun Zhong, Shuhai Zhong
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Aiming at the low accuracy of the track signal intrusion detection (IDe) algorithm in the traditional cloud-side collaborative computing environment, this paper proposes a deep learning (D-L)-based track signal IDe method in the cloud edge collaborative computing environment. First, the main framework of the IDe method is constructed by comprehensively considering the backbone network, network transmission and ground equipment, and edge computing (EC) is introduced to cloud services. Then, the The CNN (Convolutional Neural Networks)-attention-based BiLSTM (Bi-directional Long Short-Term Memory) neural network is used in the cloud center layer of the system to train the historical data, a D-L method is proposed. Finally, a pooling layer and a dropout layer are introduced into the model to effectively prevent the overfitting of the model and achieve accurate detection of track signal intrusion. The purpose of introducing the pooling layer is to accelerate the model convergence, remove the redundancy and reduce the feature dimension, and the purpose of introducing the dropout layer is to prevent the overfitting of the model. Through simulation experiments, the proposed IDe method and the other three methods are compared and analyzed under the same conditions. The results show that the F1 value of the method proposed in this paper is optimal under four different types of sample data. The F1 value is the lowest of 0.948 and the highest of 0.963. The performance of the algorithm is better than the other three comparison algorithms. The method proposed in this paper is important for solving the IDe signal in the cloud-edge cooperative environment, and also provides a theoretical basis for tracking the signal IDe direction.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-04-28T07:00:00Z
      DOI: 10.1142/S0218126623502675
       
  • An Ensemble Learning Method Based on One-Class and Binary Classification
           for Credit Scoring

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      Authors: Zaimei Zhang, Yujie Yuan, Yan Liu
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      It is crucial to correctly assess whether a potential borrower can repay the loan in the credit scoring model. The credit loan data has a serious data imbalance because the number of defaulters is far less than the nondefaulters. However, most current methods for dealing with data imbalance are designed to improve the classification performance of minority data, which will reduce the performance of majority data. For a financial institution, the economic loss caused by the decrease in the classification performance of nondefaulters (majority data) cannot be ignored. This paper proposes an ensemble learning method based on one-class and binary classification (EMOBC) for credit scoring. The purpose is to improve the classification accuracy of the minority class while mitigating the loss of classification accuracy of the majority class as much as possible. EMOBC uses undersampling for the majority class (nondefault samples in credit scoring) and perform binary-class learning on the balanced data to improve the classification accuracy of the minority. To alleviate the decline in classification performance of the majority class, EMOBC uses one-class and binary collaborative classification to train classifiers. The classification result is determined by the average of one-class and binary-class classifiers. The experimental results show that EMOBC has good comprehensive performance compared with the existing methods.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-04-25T07:00:00Z
      DOI: 10.1142/S0218126623502560
       
  • Design of Fruit-Carrying Monitoring System for Monorail Transporter in
           Mountain Orchard

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      Authors: Zhen Li, Yuehuai Zhou, Shilei Lyu, Ying Huang, Yuanfei Yi, Chonghai Zhao
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      The real-time monitoring and detection of the fruit carrying for monorail transporter in the mountain orchard are significant for the transporter scheduling and safety. In this paper, we present a fruit-carrying monitoring system, including the pan-tilt camera platform, AI edge computing platform, improved detection algorithm and the web client. The system used a pan-tilt camera to capture images of the truck body of the monorail transporter, realizing monitoring of fruit carrying. Besides, we present an improved fruit-carrying detection algorithm based on YOLOv5s, taking the “basket”, “orange” and “fullbasket” as the object. We introduced the improved attention mechanism E-CBAM (Efficient-Convolutional Block Attention Module) based on CBAM, into the C3 module in the neck network of YOLOv5s. Focal loss was introduced to improve the classification and confidence loss to improve detection accuracy; to deploy the model on the embedded platform better, we compressed the model through the EagleEye pruning algorithm to reduce the parameters and improve the detection speed. The experiment was performed on the custom fruit-carrying datasets, the mAP was 91.5%, which was 9.6%, 9.9% and 12.0% higher than that of Faster-RCNN, RetinaNet-Res50 and YOLOv3-tiny, respectively, and detection speed at Jetson Nano was 72[math]ms/img. The monitoring system and detection algorithm proposed in the paper can provide technical support for the safe transportation of monorail transporter and scheduling transportation equipment more efficiently.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-04-25T07:00:00Z
      DOI: 10.1142/S021812662350264X
       
  • Remote Sensing Image Object Detection Based on Improved YOLOv3 in Deep
           Learning Environment

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      Authors: Tianle Yang, Jinghui Li
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      A deep learning-based method, improved YOLOv3 algorithm is proposed in the deep learning environment to tackle challenges such as big scale, uneven distribution, large-scale variation, and complicated background of small- and medium-sized remote sensing photos. This manufacture uses Densenet as the backbone, replacing Darknet-53 to realize feature reuse and make the feature extraction more effective; introduces the spatial pyramid pooling module into the feature pyramid part for increasing the receptive field and isolating the most prominent contextual features; adds SE attention module in the process of feature extraction and obtains richer features by learning more location information and channel information from the images. Under DOTA dataset, the final results are that the mean Average Precision value is 86.78%, which is 4.16% higher than the baseline YOLOv3 network. The model put forward makes it easier to extract information from the feature map and achieve higher detection accuracy without influencing the real-time performance of detection.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-04-25T07:00:00Z
      DOI: 10.1142/S0218126623502651
       
  • Research Progress on Interface Circuit of Capacitive Micro Accelerometer

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      Authors: Huijing Yang, Runze Lv, Mingyuan Ren
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Micro-Electro-Mechanical System (MEMS) capacitive accelerometers have received extensive attention in recent years due to their excellent performance indicators; especially in the fields of noise, power consumption, and bias instability, great development and progress have been made. In the field of noise, effective noise reduction is achieved by introducing oversampling modulation technology combined with digital noise reduction technology. In power consumption, the power consumption of the accelerometer is effectively reduced by using the successive approximation structure in the interface circuit and using the finite state machine for precise control. In bias instability, the effects of temperature offset and zero-point drift are suppressed by using a hybrid topology connection structure in the interface circuit, and an effective reduction of bias instability is achieved. In this paper, the research and progress of MEMS capacitive accelerometer in the field of noise, power consumption and bias instability are reviewed, and the articles published in recent years are listed and summarized and prospected.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-04-21T07:00:00Z
      DOI: 10.1142/S0218126623300064
       
  • A Deep Neural Network-Based Intelligent Detection Model for Manufacturing
           Defects of Automobile Parts

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      Authors: Wenbo Xu, Gang Liu, Mengmeng Wang
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Image defect detection of casting parts is a key part of the production process in the machinery manufacturing industry. The traditional methods are ineffective because traditional computer image processing methods require a large number of manual features to be set artificially, and the detection time is too long. In order to save human resources and improve the efficiency of image defect detection, this paper proposes a deep learning-based defect detection method for automobile parts. This paper selects EfficientNetB0 as the backbone framework of the target detection network, which significantly reduces the memory usage of the model and shortens the model inference time, while improving the model detection accuracy. Facing the problem of small samples of defect image dataset, we analyze the image characteristics of the dataset and introduce shape transformation and scale scaling as the basic online data enhancement method according to the industrial field image projection law. Then, it is expected to combine the traditional image processing algorithms according to the characteristics of casting parts with different depth distribution and multiple morphological changes, and develop a special image defect data enhancement method. This further improves the performance of the model and increases the detection accuracy of the algorithm by 22.3% without increasing the data.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-04-21T07:00:00Z
      DOI: 10.1142/S0218126623502365
       
  • Theoretical Investigation of Dual-Material Stacked Gate Oxide-Source
           Dielectric Pocket TFET Based on Interface Trap Charges and Temperature
           Variations

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      Authors: Kaushal Kumar Nigam, Dharmender, Vinay Anand Tikkiwal, Mukesh Kumar Bind
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      In this paper, the performance of dual-material stacked gate oxide-source dielectric pocket-tunnel field-effect transistor (DMSGO-SDP-TFET) has been investigated by considering fixed interface trap charges (ITCs) at the Si–SiO2 interface. During the analysis, both types of trap charges, positive (donor) and negative (acceptor), have been considered to investigate their effect on the DC, analog/radio frequency, linearity and harmonic distortion performance parameters in terms of the carrier concentration, electric field, band-to-band tunneling rate, transfer characteristics, transconductance ([math]), unity gain frequency ([math]), gain–bandwidth product, device efficiency ([math]/[math]), transconductance frequency product, transit time ([math]), second- and third-order transconductance and voltage intercept points ([math], [math], VIP2 and VIP3), third-order Input Intercept Point and Intermodulation Distortion (IIP3, IMD3), second-, third-order and total harmonic distortions (HD2, HD3 and THD), respectively. Further, the impact of temperature variations from [math][math]K to [math][math]K in the presence of ITCs is investigated and the results are compared with conventional DMSGO-TFET. In terms of percentage variation, DMSGO-SDP-TFET depicts lower variation than conventional DMSGO-TFET, indicating that the proposed device is more immune to trap charges and can be used for energy-efficient, high-frequency and linearity applications at elevated temperatures.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-04-21T07:00:00Z
      DOI: 10.1142/S0218126623502523
       
  • Optimizing FPGA-Based Convolutional Neural Network Performance

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      Authors: Chi-Chou Kao
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      In deep learning, convolutional neural networks (CNNs) are a class of artificial neural networks (ANNs), most commonly applied to analyze visual imagery. They are also known as Shift-Invariant or Space-Invariant Artificial Neural Networks (SIANNs), based on the shared-weight architecture of the convolution kernels or filters that slide along input features and provide translation-equivariant responses known as feature maps. Recently, various architectures for CNN based on FPGA platform have been proposed because it has the advantages of high performance and fast development cycle. However, some key issues including how to optimize the performance of CNN layers with different structures, high-performance heterogeneous accelerator design, and how to reduce the neural network framework integration overhead need to be improved. To overcome and improve these problems, we propose dynamic cycle pipeline tiling, data layout optimization, and a pipelined software and hardware (SW–HW)-integrated architecture with flexibility and integration. Some benchmarks have been tested and implemented on the FPGA board for the proposed architecture. The proposed dynamic tiling and data layout transformation improved by 2.3 times in the performance. Moreover, with two-level pipelining, we achieve up to five times speedup and the proposed system is 3.8 times more energy-efficient than the GPU.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-04-21T07:00:00Z
      DOI: 10.1142/S0218126623502547
       
  • High-Performance Multi-RNS-Assisted Concurrent RSA Cryptosystem
           Architectures

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      Authors: S. Elango, P. Sampath, S. Raja Sekar, Sajan P Philip, A. Danielraj
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      In public-key cryptography, the RSA algorithm is an inevitable part of hardware security because of the ease of implementation and security. RSA Cryptographic algorithm uses many modular arithmetic operations that decide the overall performance of the architecture. This paper proposes VLSI architecture to implement an RSA public-key cryptosystem driven by the Residue Number System (RNS). Modular exponentiation in the RSA algorithm is executed by dividing the entire process into modular squaring and multiplication operations. Based on the RNS employment in modulo-exponential operation, two RSA architectures are proposed. A Verilog HDL code is used to model the entire RSA architecture and ported in Zynq FPGA (XC7Z020CLG484-1) for Proof of Concept (PoC). The Cadence Genus Synthesizer tool characterizes a system’s performance for TSMCs standard Cell library. Partial RNS (Proposed-I)- and Fully RNS (Proposed-II)-based RSA architectures increase the operation speed by 13% and 35%, respectively, compared with the existing RSA. Even though there is an increase in parameters like area, power and PDP for a smaller key size, the improvement in area utilization and encryption/decryption speed of RSA for a larger key size is evident from the analysis.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-04-21T07:00:00Z
      DOI: 10.1142/S0218126623502559
       
  • A Memristive-Based Design of a Core Digital Circuit for Elliptic Curve
           Cryptography

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      Authors: Khalid Alammari, Majid Ahmadi, Arash Ahmadi
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      The new emerging non-volatile memory (NVM) devices known as memristors could be the promising candidate for future digital architecture, owing to their nanoscale size and its ability to integrate with the existing CMOS technology. The device has involved in various applications from memory design to analog and digital circuit design. In this paper, a combination of memristor devices and CMOS transistors is working together to form a hybrid CMOS-memristor circuit for XAX- Module, a core element used as digital circuit for elliptic curve cryptography. The proposed design was implemented using Pt/TaOx/Ta memristor device and simulated in Cadence Virtuoso. The simulation results demonstrate the design functionality. The proposed module appears to be efficient in terms of layout area, delay and power consumption since the design utilizes the hybrid CMOS/memristor gates.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-04-21T07:00:00Z
      DOI: 10.1142/S0218126623502596
       
  • A Fuzzy Comprehensive Evaluation Method of Regional Economic Development
           Quality Based on a Convolutional Neural Network

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      Authors: Jiqiang Li
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      This paper presents an in-depth research analysis on the evaluation of the development quality of regional economy through an improved convolutional neural network algorithm, and uses it to design a fuzzy comprehensive evaluation model for the practical process. Based on the measured indices of different variables, a spatial econometric model is constructed and provincial panel data are selected to empirically analyze the impact and spatial spillover effects of financial agglomeration and technological innovation on regional economic quality development from both static and dynamic aspects and to examine the spatial correlation of the factors. A new serial data flow model is adopted, which optimizes the control of data flow in convolutional computation, reduces the percentage of clock cycles used to read memory data, and increases the computational efficiency. At the same time, with dynamic data caching, a convolutional computation can be completed in one clock cycle, reducing the memory capacity required for caching intermediate data. The effectiveness of the evaluation system constructed in this paper is further tested. Most of the indicators have a significant positive or negative impact on the quality level of economic development, and the direction of the impact is consistent with the positive and negative attributes of the indicators in this study, which verifies the validity of the evaluation indicator system constructed in this paper. In summary of the study, effective suggestions are made in terms of human capital investment, reasonable allocation of fiscal expenditure, enhancing regional greening development and improving risk prevention measures.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-04-21T07:00:00Z
      DOI: 10.1142/S0218126623502687
       
  • An Efficient Model for Mitigating Power Transmission Congestion Using
           Novel Rescheduling Approach

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      Authors: Swakantik Mishra, Sudhansu Kumar Samal
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      In the electricity business, power evacuation from source to load is a challenging task when there is contingency and agencies have to swirl around for solutions in terms of rescheduling generator dispatch, load slashing, adding of network, etc. The more challenging scenario arises when the independent operator wants to re-dispatch a generator during the contingent situation. So, in this paper, we focus on a new generator rescheduling technique with congestion price and transmission security as an intervention. The significant intention of this paper involves restricting the load thereby dispatching a particular generator or a set of generators with low cost and secure transmission line. In addition to this, the network jamming is unpredictable and does not follow any pattern, but power supply in some zones is disrupted due to hidden reasons. Therefore, a macroscopic or holistic approach is adopted for congestion forecasting through demand schedule, gathering, minimum as well as maximum drawls. Here, two significant factors namely the transmission utilization charges as well as transmission congestion charges for predicting the congestion of a transmission line are evaluated. Finally, the experimental analysis to determine transmission utilization charges, transmission congestion charges, cost function and generation supply as well as demand balance with congestion optimization.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-04-21T07:00:00Z
      DOI: 10.1142/S0218126623502377
       
  • Architectural Design Model Guided On-Demand Power Management of
           Energy-Efficient GPGPU for SLAM

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      Authors: Kaige Yan, Zhujun Ma, Caiwei Li, Xin Fu, Jingweijia Tan
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Simultaneously localization and mapping (SLAM) is a core component in many embedded domains, e.g., robots, augmented and virtual reality. Due to SLAM’s high demand on computation resources, general-purpose graphic processing units (GPGPUs) are often used as its processing engine. Meanwhile, embedded systems usually have strict power constraint. Thus, how to deliver required performance for SLAM, yet still meet the power limit, is a great challenge faced by GPGPU designer. In this work, we discover the general principles of designing energy-efficient GPGPU for SLAM as “many SMs, enough SPs and registers, small caches”, by analyzing the implication of individual design parameters on both performance and power. Then, we conduct large-scale design space exploration and fit the Pareto frontier with a two-term exponential model. Further, we construct gradient boosting decision tree (GBDT)-based design models to predict the performance and power given the design parameters. The evaluation shows that our GBDT-based models can achieve [math]3% mean average percentage error, which significantly outperform other machine learning models. With these models, a kernel’s requirement on hardware resources can be well understood. Based on such knowledge, we introduce design model guided power management strategies, including power gating and dynamic frequency and voltage scaling (DFVS). Overall, by combining these two power management strategies, we can improve the energy delay product by 36%.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-04-21T07:00:00Z
      DOI: 10.1142/S0218126623502390
       
  • Intelligent Edge Based Efficient Disease Diagnosis using Optimization
           Based Deep Maxout Network

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      Authors: W Ancy Breen, S Muthu Vijaya Pandian
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      The healthcare model is considered an imperative part of remote sensing of health. Finding the disease requires constant monitoring of patients’ health and the detection of diseases. In order to diagnose the disease utilizing an edge computing platform, this study develops a method called grey wolf invasive weed optimization-deep maxout network (GWIWO-DMN). The proposed GWIWO, which is developed by integrating invasive weed optimization (IWO) and grey wolf optimization (GWO), is used here to train the DMN. The distributed edge computing platform consists of four units, namely monitoring devices, first layer edge server, second layer edge server, and cloud server. The monitoring devices are used for accumulating patient information. The preprocessing and feature selection are performed in the first layer edge server. Here, the preprocessing is carried out using the exponential kernel function. The selection of features is done using Jaro–Winkler distance in the first layer edge server. Then, at the second layer edge server, clustering and classification are carried out using deep fuzzy clustering and DMN, respectively. The proposed GWIWO algorithm is used to do the DMN training. Finally, the cloud server processes the decision fusion. The proposed GWIWO-DMN outperformed with the highest true positive rate (TPR) of 89.2%, highest true negative rate (TNR) of 93.7%, and highest accuracy of 90.9%.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-04-21T07:00:00Z
      DOI: 10.1142/S0218126623502419
       
  • LSTM Neural Network-Based Credit Prediction Method for Food Companies

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      Authors: Luqi Miao
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      As information technology expands across industries in the age of deep learning, companies face new changes in their credit assessment methods. One of the difficulties in financing food enterprises stems from the complexity of investment in reviewing enterprises’ credit. Therefore, this paper proposes a deep learning-based credit prediction and evaluation model for food enterprises, which performs well on the dataset and achieves 85.73% and 88.56% accuracy in verifying the performance and default test samples, respectively. In addition, the model was confirmed to have good robustness through ablation experiments. Finally, the paper concludes with relevant recommendations for food companies based on the study’s findings, offering new methods to improve their corporate credit assessment.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-04-21T07:00:00Z
      DOI: 10.1142/S0218126623502420
       
  • A Floating Decremental/Incremental Meminductor Emulator Using Voltage
           Differencing Inverted Buffered Amplifier and Current Follower

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      Authors: Bhawna Aggarwal, Shireesh Kumar Rai, Akanksha Arora, Amaan Siddiqui, Rupam Das
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      This paper presents a floating meminductor emulator circuit using a voltage differencing inverted buffered amplifier (VDIBA), current follower (CF), and two grounded capacitors. The parasitic resistance at the input terminal of the current follower has been utilized. The idea of implementing a meminductor emulator is simple and works on the principle of putting memory inside the active inductor circuit. A capacitor (memory element) has been charged by the current flowing through the active inductor circuit. Therefore, the proposed meminductor emulator can be viewed as an active inductor circuit having memory inside it. The proposed floating meminductor emulator works over a significant range of frequencies and satisfies all the characteristics of a meminductor. The meminductor emulator has been realized and simulated in the LTspice simulation tool using TSMC’s 180-nm CMOS technology parameters. A chaotic oscillator circuit has been realized using the proposed meminductor emulator to verify its performance. The results obtained for the chaotic oscillators are found to be satisfactory and thus verify the performance of the proposed meminductor emulator.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-04-15T07:00:00Z
      DOI: 10.1142/S0218126623502432
       
  • Single-Inductor, Multiple-Input, Multiple-Output, DC–DC Converter Based
           on A New Software Zero-Current Switching Technique

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      Authors: Akbar Asgharzadeh-Bonab, Samad Sheikhaei
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      A single-inductor multiple-input multiple-output converter is proposed in this paper that can be used in low-power systems due to low output current and voltage. This converter is implemented discretely, and only one microcontroller is employed to control the system. The unique zero-current switching (ZCS) technique considered in this paper is such that only by reading the inductor’s left-side voltage the optimal value of the inductor discharge duty cycle is determined. This method can be generalized to low-power and high-power converters, whether implemented and designed as discrete or integrated. This converter works in discontinuous conduction mode. It uses pulse width modulation control and the time-multiplexing control method, which makes the system have high efficiency and makes the cross-regulation problem between the converter’s outputs tiny. The control algorithm considered in this converter is digital, which determines the optimal charge and discharge duty cycles. Also, the switching frequency of this converter is constant, relatively low, and equal to 5[math]kHz. The efficiency of this converter has reached 91.6% by using the ZCS technique and other mentioned control methods.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-04-15T07:00:00Z
      DOI: 10.1142/S0218126623502456
       
  • PCSboost: A Multi-Model Machine Learning Framework for Key Fragments
           Selection of Channelrhodopsins Achieving Optogenetics

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      Authors: Xihe Qiu, Bo Zhang, Qiong Li, Xiaoyu Tan, Jue Chen
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Optogenetics combines optical and genetic methods to modulate light-controlled gene expression, protein localization, signal transduction and protein interactions to achieve precise control of specific neuronal activity, with the advantages of low tissue damage, high spatial and temporal resolution, and genetic specificity. It provides a cutting-edge approach to establishing a causal relationship between brain activity and behaviors associated with health and disease. Channelrhodopsin (ChR) functions as a photogenic activator for the control of neurons. As a result, ChR and its variants are more widely used in the realization of optogenetics. To enable effective optogenetics, we propose a novel multi-model machine learning framework, i.e., PCSboost, to accurately assist key fragments selection of ChRs segments that realize optogenetics from protein sequence structure and information dataset. We investigate the key regions of the ChR variant protein fragments that impact photocurrent properties of interest and automatically screen important fragments that realize optogenetics. To address the issue of the dataset containing a limited quantity of data but a high feature dimension, we employ principal component analysis (PCA) to reduce the dimensionality of the data and perform feature extraction, followed by the XGBoost model to classify the ChRs based on their kinetics, photocurrent and spectral properties. Simultaneously, we employ the SHAP interpretability analysis to perform an interpretability analysis of the ChR variant protein for pointwise, characteristic similarities to identify key regions of the protein fragment structure that contribute to the regulation of photocurrent intensity, photocurrent wavelength sensitivity and nonkinetic properties. Experimental findings demonstrate that our proposed PCSboost approach can speed up genetic and protein engineering investigations, simplify the screening of important protein fragment sections, and potentially be used to advance research in the areas of optogenetics, genetic engineering and protein engineering.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-04-15T07:00:00Z
      DOI: 10.1142/S0218126623502493
       
  • Optimal Sparse Volterra Modeling for Transient Behavior of Turbofan
           Engines Based on Internet of Things

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      Authors: Yidan Ma, Jianfu Cao
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      In recent years, Internet of Things (IoT) technologies have been increasingly utilized to collect enormous volumes of performance data for intelligent analysis and modeling of aero-engines. This has aided in the development of numerous data-driven solutions so that a strong knowledge of the intricate operations within the equipment is no longer needed. To characterize the dynamic nonlinear transient behavior of turbofan engines, fast response changes have the possibility of being captured accurately through high-order, long-memory-length Volterra series. However, exponentially increasing coefficients are still challenging to be handled properly. For fast and reliable modeling of turbofan engines, an Optimal Sparse Volterra (OSV) model is developed in this paper by reconstructing sparse nonzero coefficients after a global selection through particle swarm optimization. The OSV model focuses on the optimal sparsity of the Volterra kernels while being insensitive to the signal length. Besides, noise reduction and the correlation analysis method are specifically designed for sensor measurements of low-bypass ratio turbofan engines. The OSV model, as well as retaining the powerful descriptive capability of the Volterra series for nonlinear characteristics, finds the most relevant sets of variables and the set of model parameters automatically under the minimum computing workload. According to the experimental results, when real test data are used for turbofan transient maneuvers, the OSV model ensures that the mean absolute error is less than [math] for high-pressure rotor speed, thrust and exhaust temperature. Moreover, the nonzero identification coefficients produced by the OSV model in the experiments are less than 6% of the total coefficients. At the same time, the average running time required by the OSV model is less than 35% of that of traditional identification algorithms.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-04-15T07:00:00Z
      DOI: 10.1142/S0218126623502511
       
  • A Cross Entropy-Based Approach to Controller Placement Problem with Link
           Failures in SDN

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      Authors: Hanmin Yin, Jue Chen
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      The Controller Placement Problem (CPP) is a key research topic in Software Defined Network (SDN), as the communication delay is influenced by the position of controllers and switches. On that basis, the network failures may happen occasionally, which can cause the increase of propagation latency and the reduction of network performance. As a result, it is essential to research the Controller Placement problem for Link Failures (CPLF). In this paper, authors propose a method based on the cross entropy to solve CPP after link failures, and adopt the Halton sequence to reduce the computation overhead of simulating link failures while guaranteeing the accuracy. In the experiments, we measure and compare the worst-case delay among three methods: our proposed cross entropy-based controller placement algorithm, the optimized controller placement algorithm and a greedy-based controller placement algorithm, and conduct experiments on six real network topologies. The experimental results verify that our proposed method can reduce the worst-case delay by [math] in comparison with GPA. Moreover, the proposed method can always find optimized controller placement schemes no matter how the network scale or the number of controller varies, with a less than [math] error when compared with the optimal solution.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-04-06T07:00:00Z
      DOI: 10.1142/S0218126623502407
       
  • Graphical User Interface for Design, Analysis, Validation, and Reporting
           of Continuous-Time Systems Using Wolfram Language

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      Authors: Maja Lutovac-Banduka, Danijela Milosevic, Yigang Cen, Asutosh Kar, Vladimir Mladenovic
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      A graphical user interface presented is intended for fast design, symbolic analysis, accurate simulation, exact verification, and test report preparation. It helps to skip the gap between theory and practice in electrical engineering because the numeric analysis is usually approximate, and the power of symbolic systems has insufficient speed even, for simple engineering problems. The software is written using a computer algebra system that is free on small computers. The mathematical representation of the system can be obtained automatically from the schematic description. Further automated symbolic manipulations are possible according to the user’s aspirations.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-04-06T07:00:00Z
      DOI: 10.1142/S0218126623502444
       
  • Design of an Approximate Multiplier with Time and Power Efficient
           Approximation Methods

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      Authors: Ruyi Liu, Wei Duan, Xiaodie Luo, Qian Ren, Yifan Li, Min Song
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      Approximate multipliers have gradually become a focus of research due to the emergence of fault-tolerant applications. This paper deals with the approximation methods for an approximation multiplier with truncation, probability transformation and a majority gate-based compressor chain. With the help of probability analysis, the proposed approximation methods are utilized in an approximate [math] unsigned multiplier to achieve low accuracy loss, high efficiency for time and power. Compared with the precise and approximate multipliers, the proposed design brings 55.0%, 39.0% reduction in delay and 73.8%, 22.6% power saving. The proposed multiplier achieves better peak signal-to-noise ratio (PSNR) values when evaluated with an image processing application.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-03-31T07:00:00Z
      DOI: 10.1142/S0218126623502481
       
  • An IoT-Enabled Ground Loop Detection System: Design, Implementation and
           Testing

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      Authors: Md. Saifur Rahman, Md. Palash Uddin, Sikyung Kim
      Abstract: Journal of Circuits, Systems and Computers, Ahead of Print.
      The ground loop is a solemn problem in complex environments including laboratories and industries. In particular, it creates spurious signals, which interfere with low-level signals of instrumentation, and often imperil the human community. Manual ground loop detection is inefficient and requires more diagnosis time. As such, automatic ground loop detection is demanding although it is still a complex task in an environment of massive instruments. In this paper, we exploit the Internet of Things (IoT) technology to present a novel ground loop detection system to cope with such a difficult scenario. Specifically, the proposed scheme comprises an exciter block along with the IoT device to generate up to 100[math]kHz ground loop current, and a detector module to regulate the affected cable by receiving the test current. We also use multiple detectors to give a virtual cable identity (ID) number in a complex area for recognizing the faulty cable accurately. After detecting the ground loop, the affected cable ID number is sent to the server for immediate action for prevention through the use of a smartphone (Android) application and website. The test results clarify the superiority of the proposed ground loop detection scheme in terms of accuracy, dependency and robustness.
      Citation: Journal of Circuits, Systems and Computers
      PubDate: 2023-03-21T07:00:00Z
      DOI: 10.1142/S0218126623502389
       
 
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