 Subjects -> ELECTRONICS (Total: 207 journals)
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- IEEE Embedded Systems Letters Publication Information
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Pages: C2 - C2
PubDate:
June 2023
Issue No: Vol. 15, No. 2 (2023)
- An Energy Consumption Benchmark for a Low-Power RISC-V Core Aimed at
Implantable Medical Devices-
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Authors:
Roberto Molina-Robles;Alfredo Arnaud;Matías Miguez;Joel Gak;Alfonso Chacón-Rodríguez;Ronny García-Ramírez;
Pages: 57 - 60
Abstract: In this work, Siwa, a micropower 32-bits RISC-V core aimed at implantable medical SoCs is presented. The core was fabricated in a 180-nm CMOS-HV technology to directly drive biological stimuli circuits within the same ASIC. A complete set of power consumption measurements is presented; the core properly operated up to 30 MHz with a current consumption of $52~mu text{A}$ /MHz at 1.8-V supply voltage, and < 20-nA leakages at room temperature. Since the existing benchmarks are not completely adequate to compare Siwa performance to other microcontrollers used on implantable medical devices (IMDs), a simple, specific benchmark inspired in a pacemaker operation was developed. The new benchmark considers both the CPU current consumption and performance, sleep and run states, and allows to compare broadly different CPUs and operating conditions for specific IMD applications. Siwa’s performance was compared using this benchmark with 8 and 16-bits MCUs.
PubDate:
June 2023
Issue No: Vol. 15, No. 2 (2023)
- Three-Stage Power Supply System Model for a Wearable IoT Device for
COVID-19 Patients-
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Authors:
Ricardo Álvarez-González;Edgar R. González-Campos;Nicolás Quiroz-Hernández;Alba M. Sánchez-Gálvez;
Pages: 61 - 64
Abstract: During the current crisis caused by the COVID-19 pandemic, Wearable IoT (WIoT) health devices have become essential resources for remote monitoring of the main physiological signs affected by this disease. As well as sensors, microprocessor, and wireless communication elements are widely studied, the power supply unit has the same importance for the WIoT technology, since the autonomy of the system between recharges is of great importance. This letter presents the design of the power supply system of a WIoT device capable of monitoring oxygen saturation and body temperature, sending the collected data to an IoT platform. The supply system is based on a three-stage block consisting of a rechargeable battery, battery charge controller, and dc voltage converter. The power supply system is designed and implemented as a prototype in order to test performance and efficiency. The results show that the designed block provides a stable supply voltage avoiding energy losses, which makes it an efficient and rapidly developing system.
PubDate:
June 2023
Issue No: Vol. 15, No. 2 (2023)
- Hardware and Firmware Design and Implementation of Twin 8-Bit and 32-Bit
Microcontroller Boards for Research and Educational Applications-
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Authors:
Rafael B. Oliva;
Pages: 65 - 68
Abstract: This document describes the design and implementation sequence of hardware and firmware components of two microcontroller boards of 8-bit and 32-bit architectures, which use similar form factors and share common input/output devices and recently developed Web-based user interfaces. These developments are the result of over two decades of experimentation in educational and research measurement systems in renewable energy projects. The boards are intended to fill a gap between low-cost hobby systems and high-end research loggers, especially where international standards require control of uncertainties, as is the case with small wind turbine power curve assessments. The focus was to increase reliability in the hardware aspects and make software development easier by including user-friendly firmware and a set of in-house C language coding rules for new developments and refactoring of legacy code. Testing of the low-level driver sections and the use of automated tools such as Ceedling for higher-level module testing are also described.
PubDate:
June 2023
Issue No: Vol. 15, No. 2 (2023)
- Location Monitoring System for Sailboats by GPS Using GSM/GPRS Technology
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Authors:
Rosa M. Woo-García;V. Herrera-Nevraumont;E. Osorio-de-la-Rosa;S. E. Vázquez-Valdés;F. López-Huerta;
Pages: 69 - 72
Abstract: A monitoring and locating system for sailboats is developed using the general packet radio service/global system for mobile communications (GPRS/GSM) and global positioning system (GPS) technology. The implemented prototype can track the location of sailboats that do not go out more than 10 km into the sea. The system uses a GPS module to obtain the boat’s coordinates; it has a sensing station: environmental temperature, humidity, barometric pressure, and the angular movement of the ship. A structured query language (SQL) database has been implemented to store data received via AVR-GPRS. System monitoring tests were carried out over a 24-km route onboard a sailboat, obtaining its location during the entire course along the coast of the Atlantic Ocean, Gulf of Mexico.
PubDate:
June 2023
Issue No: Vol. 15, No. 2 (2023)
- Hardware Acceleration of SIKE on Low-End FPGAs
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Authors:
Carlos Andres Lara-Nino;Arturo Diaz-Perez;Miguel Morales-Sandoval;
Pages: 73 - 76
Abstract: In this letter, we present the design and implementation results of two hardware accelerators for the supersingular isogeny key encapsulation (SIKE) suite. These designs aim at enabling quantum-safe cryptography solutions for constrained platforms by offloading the cost of bulk arithmetic from the main processor. One of the proposed architectures has area reduction as the main implementation goal; the second design improves the former on the energy footprint. This software–hardware co-design addresses the challenges of performing bulk arithmetic in software and reducing the control complexity in hardware, thus minimizing the communication overheads found on simple arithmetic accelerators. Compared to other designs in the literature, the proposed architectures do not rely on in-fabric memory and processing units, a key point for porting such solutions to any implementation technology such as field-programmable gate arrays (FPGAs).
PubDate:
June 2023
Issue No: Vol. 15, No. 2 (2023)
- Codesign for Generation of Large Random Sequences on Zynq FPGA
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Authors:
Brenda Mariana Hernández-Morales;Sandra Díaz-Santiago;Cuauhtemoc Mancillas-López;
Pages: 77 - 80
Abstract: This work presents two codesign implementations of a true random number generation mechanism. Physical components provided by the programmable logic of FPGA are used for true random seed generation. The seed conditioning and generation of the large sequences were implemented using the block cipher Advanced Encryption Standard (AES) implemented on the Cortex-A9 processor (embedded in the Zynq FPGA) or specific AESNI instructions in modern processors. Our implementations use less than 10% of the available resources on the target FPGAs and pass all the National Institute of Standards and Technology (NIST) tests for random generators.
PubDate:
June 2023
Issue No: Vol. 15, No. 2 (2023)
- Design and Implementation of an Embedded Edge-Processing Water Quality
Monitoring System for Underground Waters-
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Authors:
Christian Correa;Diego Dujovne;Fernando Bolaño;
Pages: 81 - 84
Abstract: Global warming effects are seen around the world and Latin American countries are not an exception, especially for expanding drought areas. Therefore, underground water resources used in the region are incrementing exponentially. However, temporal and spatial underground water information concerning availability and quality is scarce, disabling proper decision making. In order to close that breach, we propose and embedded edge-processing Internet of Things (IoT)-based water quality monitoring system. This letter introduces the design and implementation of this solution, specifically targeted to monitor irrigation and drinking water extracted from water wells. The system is designed to be deployed in central Chile, considering the topographic conditions, which severely affect power availability and communication resources. The captured data are stored in a data lake, for further processing according to water quality models.
PubDate:
June 2023
Issue No: Vol. 15, No. 2 (2023)
- Methodology for CNN Implementation in FPGA-Based Embedded Systems
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Authors:
Federico G. Zacchigna;
Pages: 85 - 88
Abstract: The increasing interest in convolutional neural networks (CNNs) is driving the study and design of different implementations for a variety of platforms, each intended to optimize performance, power consumption, or latency, according to the application’s needs. While GPUs have dominated the high-performance terrain, FPGAs have proved to be a promising alternative due to their relatively high performance and reduced power consumption and costs, compared with GPUs. The main concern regarding FPGA implementations lies in the effort needed to develop the systems and difficulties reusing or combining designs by different authors, due to the highly heterogeneous architectures used in each project. This work proposes a methodology and a high-level architecture designed for CNN implementations in FPGAs, which eases the development process, allows the reusability of designs, and helps to maximize performance, minimize latency, reduce resource utilization, and avoid possible bottlenecks, while allowing high design flexibility. This proposal is validated by implementing a set of blocks that are later used to build different CNNs.
PubDate:
June 2023
Issue No: Vol. 15, No. 2 (2023)
- Wearable Device to Monitor Sheep Behavior
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Authors:
Victoria Campiotti;Nicolás Finozzi;Juan Irazoqui;Varinia Cabrera;Rodolfo Ungerfeld;Julián Oreggioni;
Pages: 89 - 92
Abstract: Monitoring sheep activity can be crucial for improving productivity and animal welfare. This work presents the design, manufacture, and test of a collar-type device to monitor sheep behavior. The device consists of an MSP-EXP432P401R microcontroller from Texas Instruments, a Bosch Sensortec’s BMI160 3-axis accelerometer, and a narrowband-IoT BG96 modem from Quectel that includes a global positioning system. The device has two operating modes: 1) validation mode (VM) to test and validate algorithms for characterizing sheep activity and 2) research mode (RM) to support multiday animal experiments to study their behavior. In VM, it sends accelerometer data, the animal’s state (run, walk, stand, or head down), and the location to the Central System every 20 s. VM has an autonomy of 51 h. In RM, the device transmits the animal’s state and the location every 2 or more minutes to extend the autonomy to more than ten days. The microcontroller identifies the sheep’s states (every 5 s) using real-time accelerometer data processed with an algorithm based on the linear discriminant analysis method. We trained a classifier on a PC using a public dataset, and then we ported it to the microcontroller. Preliminary tests show that the sheep’s state identification has a prediction success rate of 88%, opening exciting possibilities for developing an applicable device.
PubDate:
June 2023
Issue No: Vol. 15, No. 2 (2023)
- Payload-XL: A Platform for the In-Orbit Validation of the BRAVE FPGA
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Authors:
Felipe Viel;Kleber R. Gouveia;Edilberto Costa;Márcio Oliveira;Miguel Boing;André Martins Pio de Mattos;Gabriel Mariano Marcelino;David Merodio Codinachs;Laio Oriel Seman;Eduardo Augusto Bezerra;
Pages: 93 - 96
Abstract: Design and verification techniques targeting the space environment are widely used to explore the reliability levels of embedded systems for Cubesats. Considering that, we carried out a study to select and to adapt a design flow to be used as a guide for the development of Cubesats. The chosen design and development flow was used in a case study of a board, called Payload-XL, conceived to be the computing module of a Cubesat. The primary purpose of Payload-XL is to validate the big reprogrammable array for versatile environments (BRAVE) FPGA from Nanoxplore, in orbit. Research and development activities were carried out to integrate the GOMX-5 mission through a partnership between the Federal University of Santa Catarina, the European Space Agency, Cobham Gaisler, GMV, CBK, and GomSpace. The results demonstrate that Payload-XL innovates as a validation platform for the BRAVE FPGA and also brings mechanisms to reconfigure it remotely in orbit. Furthermore, the results show that Payload-XL complies with the power, size, and requirements of the GOMX-5 mission.
PubDate:
June 2023
Issue No: Vol. 15, No. 2 (2023)
- Multigateway Designation for Real-Time TSCH Networks Using Spectral
Clustering and Centrality-
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Authors:
Miguel Gutiérrez Gaitán;Diego Dujovne;Julián Zuñiga;Alejandro Figueroa;Luís Almeida;
Pages: 97 - 100
Abstract: This letter proposes a multigateway designation framework to design real-time wireless sensor networks (WSNs) improving traffic schedulability, i.e., meeting the traffic time constraints. To this end, we resort to spectral clustering-unsupervised learning that allows defining arbitrary $k$ disjoint clusters without the knowledge of the node’s physical position. In each cluster, we use a centrality metric from social sciences to designate one gateway. This novel combination is applied to a time-synchronized channel-hopping (TSCH) WSN under earliest-deadline-first (EDF) scheduling and shortest path routing. Simulation results under varying configurations show that our framework is able to produce WSN designs that greatly reduce the worst case network demand. In a situation with five gateways, 99% schedulability can be achieved with 3.5 times more real-time flows than in a random benchmark.
PubDate:
June 2023
Issue No: Vol. 15, No. 2 (2023)
- Monitoring Software Execution Flow Through Power Consumption and Dynamic
Time Warping-
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Authors:
Boris Vidal;Carlos Moreno;Sebastian Fischmeister;Gonzalo Carvajal;
Pages: 101 - 104
Abstract: This letter presents a technique for nonintrusive code execution tracking using side-channel signals of power consumption. Using a nearest-neighbor classifier that integrates the dynamic time warping distance with information from the control flow graph, it is possible to identify executed basic blocks from a trace of power consumption that exhibits temporal distortions due to assembly-level artifacts and varying operational conditions. Experimental results show that the proposed technique achieves over 95% precision when inferring the runtime execution flow of a cruise control application using unmarked traces of power consumption collected from different processors.
PubDate:
June 2023
Issue No: Vol. 15, No. 2 (2023)
- Design of a Low-Cost System for the Measurement of Variables Associated
With Air Quality-
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Authors:
Alain Martinez;Erik Hernandez-Rodríguez;Luis Hernandez;Olivier Schalm;Rosa Amalia González-Rivero;Daniellys Alejo-Sánchez;
Pages: 105 - 108
Abstract: Poor air quality is a global problem that affects human health and ecosystems all over the world. For that reason, many countries invest in networks of reference monitoring stations that measure air quality in real time. However, the high installation and maintenance costs of these stations mean that smaller cities or underdeveloped regions are less covered by such stations. In these regions, alternative detection technologies such as low-cost monitoring systems can be used instead. Unfortunately, the results of such monitoring devices are often questioned by academics. This contribution proposes the design of an air quality monitoring system where cost and reliability have been optimized from a hardware point of view. In addition, the device has been coupled to an IoT platform so that inexperienced users can view and share the collected information The design of affordable systems increases the ability to perform ad hoc analysis at the level of neighborhoods or cities by citizen science organizations or governmental entities.
PubDate:
June 2023
Issue No: Vol. 15, No. 2 (2023)
- Middleton’s Class A Noise Parameter Estimator
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Authors:
Lucas A. Rabioglio;María C. Cebedio;Jorge Castiñeira Moreira;Leonardo J. Arnone;
Pages: 109 - 112
Abstract: For the development of communication systems that intend to be based on the cognitive radio paradigm, it is of vital importance to obtain the characteristics of the communication channel in a simple and fast way. This letter presents a simple method for estimating the parameters of the probability density function, corresponding to Middleton’s Class A noise. The method is presented, justified, and compared with different known estimators in terms of precision and simplicity, resulting in a notable advantage in its general performance and its possible implementation.
PubDate:
June 2023
Issue No: Vol. 15, No. 2 (2023)
- FPGA-Based Accelerator for AI-Toolbox Reinforcement Learning Library
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Authors:
Lucas Leiva;Jordina Torrents-Barrena;Martín Vázquez;
Pages: 113 - 116
Abstract: In reinforcement learning (RL) an agent interacts with the environment based on sequential decisions. This agent receives a reward from the environment according to decisions and tries to maximize the reward. RL is used in several domains, such as production, autonomous driving, business management, education, games, healthcare, natural language processing, robotics, and among others. RL methodologies require processing large volumes of data and computational power. To speed up these applications, field-programmable gate array (FPGA) are widely employed in the literature. This letter proposes an accelerator for the Markov decision process (MDP) implemented in the AI-Toolbox public library using high-level synthesis tools, using the tiger-antelope problem as use case. Our approach shows an acceleration greater than $7times $ compared to the original version.
PubDate:
June 2023
Issue No: Vol. 15, No. 2 (2023)
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