Abstract: The design, implementation, and measurements of a high efficiency and high power wideband GaN HEMT power amplifier are presented. Package parasitic effect is reduced significantly by a novel compensation circuit design to improve the accuracy of impedance matching. An improved structure is proposed based on the traditional Class-F structure with all even harmonics and the third harmonic effectively controlled, respectively. Also the stepped-impedance matching method is applied to the third harmonic control network, which has a positive effect on the expansion bandwidth. CGH40025F power transistor is utilized to build the power amplifier working at 0.8 to 2.7 GHz, with the measured saturated output power 20–50 W, drain efficiency 52%–76%, and gain level above 10 dB. The second and the third harmonic suppression levels are maintained at −16 to −36 dBc and −16 to −33 dBc, respectively. The simulation and the measurement results of the proposed power amplifier show good consistency. PubDate: Wed, 14 Jun 2017 06:50:47 +000
Abstract: A simple half-bridge, galvanic separated power supply which can be short circuit proof is proposed for gate driver local supplies. The supply is made while hacking a common mode type filter as a transformer, as the transformer shows a good insulation, it has a very low parasitic capacitance between primary and secondary coils, and it is cost-effective. Very low standby losses were observed during lab experiments. This makes it compatible with energy efficient drives and solar inverters. PubDate: Wed, 24 May 2017 00:00:00 +000
Abstract: This paper presents a second-order voltage-mode filter with three inputs and single-output voltage using single commercially available IC, one resistor, and two capacitors. The used commercially available IC, called LT1228, is manufactured by Linear Technology Corporation. The proposed filter is based on parallel RLC circuit. The filter provides five output filter responses, namely, band-pass (BP), band-reject (BR), low-pass (LP), high-pass (HP), and all-pass (AP) functions. The selection of each filter response can be done without the requirement of active and passive component matching condition. Furthermore, the natural frequency and quality factor are electronically controlled. Besides, the nonideal case is also investigated. The output voltage node exhibits low impedance. The experimental results can validate the theoretical analyses. PubDate: Mon, 03 Apr 2017 00:00:00 +000
Abstract: Technology scaling below 22 nm has brought several detrimental effects such as increased short channel effects (SCEs) and leakage currents. In deep submicron technology further scaling in gate length and oxide thickness can be achieved by changing the device structure of MOSFET. For 10–30 nm channel length multigate MOSFETs have been considered as most promising devices and FinFETs are the leading multigate MOSFET devices. Process parameters can be varied to obtain the desired performance of the FinFET device. In this paper, evaluation of on-off current ratio (), subthreshold swing (SS) and Drain Induced Barrier Lowering (DIBL) for different process parameters, that is, doping concentration (1015/cm3 to 1018/cm3), oxide thickness (0.5 nm and 1 nm), and fin height (10 nm to 40 nm), has been presented for 20 nm triangular FinFET device. Density gradient model used in design simulation incorporates the considerable quantum effects and provides more practical environment for device simulation. Simulation result shows that fin shape has great impact on FinFET performance and triangular fin shape leads to reduction in leakage current and SCEs. Comparative analysis of simulation results has been investigated to observe the impact of process parameters on the performance of designed FinFET. PubDate: Tue, 21 Mar 2017 00:00:00 +000
Abstract: This paper presents a new compact controllable impedance multiplier using CMOS technology. The design is based on the use of the translinear principle using MOSFETs in subthreshold region. The value of the impedance will be controlled using the bias currents only. The impedance can be scaled up and down as required. The functionality of the proposed design was confirmed by simulation using BSIM3V3 MOS model in Tanner Tspice 0.18 μm TSMC CMOS process technology. Simulation results indicate that the proposed design is functioning properly with a tunable multiplication factor from 0.1- to 100-fold. Applications of the proposed multiplier in the design of low pass and high pass filters are also included. PubDate: Tue, 07 Mar 2017 00:00:00 +000
Abstract: In the current study, an Au/BN/C microwave back-to-back Schottky device is designed and characterized. The device morphology and roughness were evaluated by means of scanning electron and atomic force microscopy. As verified by the Richardson–Schottky current conduction transport mechanism which is well fitted to the experimental data, the temperature dependence of the current-voltage characteristics of the devices is dominated by the electric field assisted thermionic emission of charge carriers over a barrier height of ~0.87 eV and depletion region width of ~1.1 μm. Both the depletion width and barrier height followed an increasing trend with increasing temperature. On the other hand, the alternating current conductivity analysis which was carried out in the frequency range of 100–1400 MHz revealed the domination of the phonon assisted quantum mechanical tunneling (hopping) of charge carriers through correlated barriers (CBH). In addition, the impedance and power spectral studies carried out in the gigahertz-frequency domain revealed a resonance-antiresonance feature at frequency of ~1.6 GHz. The microwave power spectra of this device revealed an ideal band stop filter of notch frequency of ~1.6 GHz. The ac signal analysis of this device displays promising characteristics for using this device as wave traps. PubDate: Sun, 26 Feb 2017 08:55:36 +000
Abstract: In this paper, a substrate integrated waveguide (SIW) bandpass filter using defected ground structure (DGS) with complementary split ring resonators (CSRRs) is proposed. By using the unique resonant properties of CSRRs and DGSs, two passbands with a transmission zero in the middle have been achieved. The resonant modes of the two passbands are different and the bandwidth of the second passband is much wider than that of the first one. In order to increase out-of-band rejection, a pair of dumbbell DGSs has been added on each side of the CSRRs. The structure is analyzed using equivalent circuit models and simulated based on EM simulation software. For validation, the proposed filter is fabricated and measured. The measurement results are in good agreement with the simulated ones. PubDate: Sun, 29 Jan 2017 00:00:00 +000
Abstract: We propose a new design, Physical Unclonable Function (PUF) scheme, for the Internet of Things (IoT), which has been suffering from multiple-level security threats. As more and more objects interconnect on IoT networks, the identity of each thing is very important. To authenticate each object, we design an impedance mismatch PUF, which exploits random physical factors of the transmission line to generate a security unique private key. The characteristic impedance of the transmission line and signal transmission theory of the printed circuit board (PCB) are also analyzed in detail. To improve the reliability, current feedback amplifier (CFA) method is applied on the PUF. Finally, the proposed scheme is implemented and tested. The measure results show that impedance mismatch PUF provides better unpredictability and randomness. PubDate: Tue, 24 Jan 2017 00:00:00 +000
Abstract: In this paper, a systematic approach for implementing operational simulation of LC ladder filter using voltage differencing transconductance amplifier is presented. The proposed filter structure uses only grounded capacitor and possesses electronic tunability. PSPICE simulation using 180 nm CMOS technology parameter is carried out to verify the functionality of the presented approach. Experimental verification is also performed through commercially available IC LM13700/NS. Simulations and experimental results are found to be in close agreement with theoretical predictions. PubDate: Mon, 23 Jan 2017 00:00:00 +000
Abstract: In this paper, a new capacitor-less DC-DC converter is proposed to be used as a light emitting diode (LED) driver. The design is based on the utilization of the internal capacitance of the LED to replace the smoothing capacitor. LED lighting systems usually have many LEDs for better illumination that can reach multiple tens of LEDs. Such configuration can be utilized to enlarge the total internal capacitance and hence minimize the output ripple. Also, the switching frequency is selected such that a minimum ripple appears at the output. The functionality of the proposed design is confirmed experimentally and the efficiency of the driver is 85% at full load. PubDate: Tue, 17 Jan 2017 06:00:28 +000
Abstract: This paper presents a signal injection technology showing significant reductions in both 3rd-order and 5th-order intermodulation distortions (IMD3 and IMD5) in space traveling wave tube (STWT). By applying the IMD3 to the IMD5 ratio (TFR) as measures of location, the simultaneous suppressions of IMD3 and IMD5 in TWT are achieved by second harmonic distortion (2HD) and IMD3 injection. According to the research on theoretical analysis and computer simulation, the optimum amplitude and phase parameters of the injected signal for maximum simultaneous suppressions are obtained. Then an experiment system is established based on vector network analyzer, optimum TFR are 2.1 dB and 12.5 dB, respectively, by second harmonic and IM3 injection, and the output powers of IMD3 and IMD5 were decreased. TFR with IMD3 injection is smaller than that with second harmonic injection in STWT, and the experiment system is more straightforward and easy to operate. Thus, the IMD3 injection performs better than that of second harmonic injection to suppress IMD5s for the narrow-band STWT. PubDate: Tue, 10 Jan 2017 00:00:00 +000
Abstract: In this article, a compact narrow-bandpass filter with high selectivity and improved rejection level is presented. For miniaturization, a pair of double negative (DNG) cells consisting of quasi-planar chiral resonators are cascaded and electrically loaded to a microstrip transmission line; short ended stubs are introduced to expand upper rejection band. The structure is analyzed using equivalent circuit models and simulated based on EM simulation software. For validation, the proposed filter is fabricated and measured. The measured results are in good agreement with the simulated ones. By comparing to other filters in the references, it is shown that the proposed filter has the advantage of skirt selectivity and compact size, so it can be integrated more conveniently in modern wireless communication systems and microwave planar circuits. PubDate: Mon, 26 Dec 2016 06:28:40 +000
Abstract: This paper reconsiders the mathematical formulation of the conventional nonparabolic band model and proposes a model of the effective mass of conduction band electrons including the nonparabolicity of the conduction band. It is demonstrated that this model produces realistic results for a sub-10-nm-thick Si layer surrounded by an SiO2 layer. The major part of the discussion is focused on the low-dimensional electron system confined with insulator barriers. To examine the feasibility of our consideration, the model is applied to the threshold voltage of nanoscale SOI FinFETs and compared to prior experimental results. This paper also addresses a model of the effective mass of valence band holes assuming the nonparabolic condition. PubDate: Sun, 25 Dec 2016 09:42:11 +000
Abstract: Numerical simulation results for the dynamics of -systems abound in the literature but their experimental results are yet to be known. This paper presents the chaotic dynamics of -Van der Pol oscillator via electronic design, simulation, and hardware implementation. The results obtained are found to be in good agreement with numerical simulation results. The condition for stability of the fixed points is also computed and the method of multiple time scale is used to investigate the dynamical behaviour of the system. Therefore, the -circuits which have rich dynamics and may have important applications in secure communications, random number generations, cryptography, and so forth have been practically implemented. PubDate: Thu, 15 Dec 2016 14:09:49 +000
Abstract: A novel optimized apodization of Fiber Bragg Grating Sensor (FBGS) for quasi-distributed strain sensing applications is developed and introduced in this paper. The main objective of the proposed optimization is to obtain a reflectivity level higher than 90% and a side lobe level around −40 dB, which is suitable for use in quasi-distributed strain sensing application. For this purpose, different design parameters as apodization profile, grating length, and refractive index have been investigated to enhance and optimize the FBGS design. The performance of the proposed apodization has then been compared in terms of reflectivity, side lobe level (SLL), and full width at half maximum (FWHM) with apodization profiles proposed by other authors. The optimized sensor is integrated on quasi-distributed sensing system of 8 sensors demonstrating high reliability. Wide strain sensitivity range for each channel has also been achieved in the quasi-distributed system. Results prove the efficiency of the proposed optimization which can be further implemented for any quasi-distributed sensing application. PubDate: Sun, 04 Dec 2016 11:15:16 +000
Abstract: Noise parameters of silicon germanium (SiGe) heterojunction bipolar transistors (HBTs) for different sizes are investigated in the breakdown region for the first time. When the emitter length of SiGe HBTs shortens, minimum noise figure at breakdown decreases. In addition, narrower emitter width also decreases noise figure of SiGe HBTs in the avalanche region. Reduction of noise performance for smaller emitter length and width of SiGe HBTs at breakdown resulted from the lower noise spectral density resulting from the breakdown mechanism. Good agreement between experimental and simulated noise performance at breakdown is achieved for different sized SiGe HBTs. The presented analysis can benefit the RF circuits operating in the breakdown region. PubDate: Wed, 12 Oct 2016 06:44:41 +000
Abstract: Recently, high power-density, high power-efficiency, and wide regulation range isolated DC-DC converters have been required. This paper presents considerations of physical design and implementation for wide regulation range MHz-level LLC resonant DC-DC converters. The circuit parameters are designed with 3–5 MHz-level switching frequency. Also, the physical parameters and the size of the planar transformer are optimized by using derived equations and finite element method (FEM) with Maxwell 3D. Some experiments are done with prototype LLC resonant DC-DC converter using gallium nitride high electron mobility transistors (GaN-HEMTs); the input voltage is 42–53 V, the reference output voltage is 12 V, the load current is 8 A, the maximum switching frequency is about 5 MHz, the total volume of the circuit is 4.1 cm3, and the power density of the prototype converter is 24.4 W/cc. PubDate: Thu, 29 Sep 2016 07:01:15 +000
Abstract: The accurate prediction of the SiC MOSFET withstanding time for single fault events greatly influences the requirements for device protection circuits for these devices in power converter applications, like voltage source inverters or power electronic transformers. For this reason, a thermal model, based on the structural design and the physical dimensions of the chip as well as material properties of 4H-SiC, is proposed. This article gives a general description of the thermal behaviour of vertical SiC MOSFET under various driving and boundary conditions in case of a short-circuit event. The thermal model substitutes destructive tests of a device for an individual set of boundary conditions of an occurring fault event. The validity of the analytically parametrised thermal model is verified by experimental short-circuit tests of state-of-the-art vertical SiC MOSFETs for a set of various boundary conditions. The investigated thermal model can furthermore be used to standardise different gate-oxide degradation values from the literature for means of lifetime prediction of the gate oxide for an individual application under repetitive occurring fault or overload conditions. These manufacturer specific reported values measured with no standardised testing procedures can be translated into a maximum junction temperature, which is repeatedly reached. The thermal model therefore provides a unifying parameter for the gate-oxide lifetime calculation for an individual chip and application. PubDate: Wed, 21 Sep 2016 09:18:42 +000
Abstract: Compared with conventional Class-A, Class-B, and Class-AB amplifiers, Class-D amplifier, also known as switching amplifier, employs pulse width modulation (PWM) technology and solid-state switching devices, capable of achieving much higher efficiency. However, PWM-based switching amplifier is usually designed for low-voltage application, offering a maximum output voltage of several hundred Volts. Therefore, a step-up transformer is indispensably adopted in PWM-based Class-D amplifier to produce high-voltage output. In this paper, a switching amplifier without step-up transformer is developed based on digital pulse step modulation (PSM) and hybrid multilevel converter. Under the control of input signal, cascaded power converters with separate DC sources operate in PSM switch mode to directly generate high-voltage and high-power output. The relevant topological structure, operating principle, and design scheme are introduced. Finally, a prototype system is built, which can provide power up to 1400 Watts and peak voltage up to ±1700 Volts. And the performance, including efficiency, linearity, and distortion, is evaluated by experimental tests. PubDate: Tue, 20 Sep 2016 14:26:26 +000
Abstract: A new multifunction power amplifier (MFPA) is designed and fabricated for the application of point-to-point K-Band backhaul TR module. A DC temperature life test was performed to model the up-limit temperature effect of the designed MFPA under space application. After 240 hours of 100°C life test, the test results illustrate that the designed MFPA has only slight power degradation at the saturation region without change of the linear gain. The general performance of the designed MFPA satisfies the requirement of the application scenario. PubDate: Wed, 17 Aug 2016 12:02:58 +000
Abstract: The analysis of random variation in the performance of Floating Gate Metal Oxide Semiconductor Field Effect Transistor (FGMOSFET) which is an often cited semiconductor based electronic device, operated in the subthreshold region defined in terms of its drain current (), has been proposed in this research. is of interest because it is directly measurable and can be the basis for determining the others. All related manufacturing process induced device level random variations, their statistical correlations, and low voltage/low power operating condition have been taken into account. The analysis result has been found to be very accurate since it can fit the nanometer level SPICE BSIM4 based reference with very high accuracy. By using such result, the strategies for minimizing variation in can be found and the analysis of variation in the circuit level parameter of any subthreshold FGMOSFET based circuit can be performed. So, the result of this research has been found to be beneficial to the variability aware design of subthreshold FGMOSFET based circuit. PubDate: Thu, 28 Jul 2016 06:06:53 +000
Abstract: Color measurement by the colorized vision system is a superior method to achieve the evaluation of color objectively and continuously. However, the accuracy of color measurement is influenced by the spectral responses of digital sensor and the spectral mismatch of illumination. In this paper, two-color vision system illuminated by digital sensor and LED array, respectively, is presented. The Polynomial-Based Regression method is applied to solve the problem of color calibration in the sRGB and color spaces. By mapping the tristimulus values from RGB to sRGB color space, color difference between the estimated values and the reference values is less than . Additionally, the mapping matrix has proved a better performance in reducing the color difference, and it is introduced subsequently into the colorized vision system proposed for a better color measurement. Necessarily, the printed matter of clothes and the colored ceramic tile are chosen as the application experiment samples of our colorized vision system. As shown in the experimental data, the average color difference of images is less than . It indicates that a better performance of color measurement is obtained via the colorized vision system proposed. PubDate: Thu, 14 Jul 2016 06:52:26 +000
Abstract: A new high-efficiency K-band MMIC medium-power amplifier (PA) is designed with multiharmonic matching using GaAs pHEMT process technology. It has an operation frequency centered at 26 GHz with a bandwidth of 2 GHz. A 20 dBm 1 dB-compression-point output power and 40% efficiency are achieved. A novel thermal reliability analysis method based on ICEPAK is proposed also to evaluate its thermal characteristic. The test result by using a QFI InfraScope™ infrared imaging system is compared with the simulation result. It agrees well with an accuracy within ±1°C differences, which reflects the advantages of the thermal analysis method with respect to accuracy and convenience for use. PubDate: Thu, 19 May 2016 12:59:35 +000
Abstract: Spin-transfer torque-based magnetoresistive random access memory (STT-MRAM) is a promising candidate for universal memory that may replace traditional memory forms. It is expected to provide high-speed operation, scalability, low-power dissipation, and high endurance. MRAM switching technology has evolved from the field-induced magnetic switching (FIMS) technique to the spin-transfer torque (STT) switching technique. Additionally, material technology that induces perpendicular magnetic anisotropy (PMA) facilitates low-power operation through the reduction of the switching current density. In this paper, the modeling of magnetic tunnel junctions (MTJs) is reviewed. Modeling methods and models of MTJ characteristics are classified into two groups, macromodels and behavioral models, and the most important characteristics of MTJs, the voltage-dependent MTJ resistance and the switching behavior, are compared. To represent the voltage dependency of MTJ resistance, some models are based on physical mechanisms, such as Landau-Lifshitz-Gilbert (LLG) equation or voltage-dependent conductance. Some behavioral models are constructed by adding fitting parameters or introducing new physical parameters to represent the complex switching behavior of an MTJ over a wide range of input current conditions. Other models that are not based on physical mechanisms are implemented by simply fitting to experimental data. PubDate: Wed, 18 May 2016 07:12:22 +000
Abstract: A wide-band microstrip bandpass filter (BPF) based on the improved composite right/left-handed transmission line (CRLH-TL) structure is presented in this paper. Compared to the traditional CRLH-TL with via hole, the improved one is an all-planar structure, which owns the advantage of fabrication and loss. The equivalent lossless LC circuit model of the proposed structure is established. EM software Sonnet is adopted to design the wide-band filter with bandwidth of 1.4 GHz (from 1.9 GHz to 3.3 GHz). The circuit occupies only 20.6 × 12.8 mm2. Finally, the fabrication and measurement are implemented. A good agreement between simulation and measured results verifies the validity of the design methodology. PubDate: Mon, 11 Apr 2016 13:33:19 +000
Abstract: We have demonstrated a method for using proper models of pentacene P-channel and fullerene N-channel thin-film transistors (TFTs) in order to design and simulate organic integrated circuits. Initially, the transistors were fabricated, and we measured their main physical and electrical parameters. Then, these organic TFTs (OTFTs) were modeled with support of an organic process design kit (OPDK) added in Cadence. The key specifications of the modeled elements were extracted from measured data, whereas the fitting ones were elected to replicate experimental curves. The simulating process proves that frequency responses of the TFTs cover all biosignal frequency ranges; hence, it is reasonable to deploy the elements to design integrated circuits used in biomedical applications. Complying with complementary rules, the organic circuits work properly, including logic gates, flip-flops, comparators, and analog-to-digital converters (ADCs) as well. The proposed successive-approximation-register (SAR) ADC consumes a power of 883.7 µW and achieves an ENOB of 5.05 bits, a SNR of 32.17 dB at a supply voltage of 10 V, and a sampling frequency of about 2 KHz. PubDate: Tue, 15 Mar 2016 09:49:23 +000
Abstract: This paper proposes new positive feedback source coupled logic (PFSCL) tristate buffers suited to bus applications. The proposed buffers use switch to attain high impedance state and modify the load or the current source section. An interesting consequence of this is overall reduction in the power consumption. The proposed tristate buffers consume half the power compared to the available switch based counterpart. The issues with available PFSCL tristate buffers based bus implementation are identified and benefits of employing the proposed tristate buffer topologies are put forward. SPICE simulation results using TSMC 180 nm CMOS technology parameters are included to support the theoretical formulations. The performance of proposed tristate buffer topologies is examined on the basis of propagation delay, output enable time, and power consumption. It is found that one of the proposed tristate buffer topology outperforms the others in terms of all the performance parameters. An examination of behavior of available and the proposed PFSCL tristate buffer topologies under parameter variations and mismatch shows a maximum variation of 14%. PubDate: Mon, 29 Feb 2016 12:01:38 +000
Abstract: A reconfigurable low-noise amplifier (LNA) with digitally controllable gain and power consumption is presented. This architecture allows increasing power consumption only when required, that is, to improve LNA’s radiofrequency performance at extreme communication-channel conditions and/or to counteract the effect of process, voltage, and temperature variations. The proposed design leads to significant power saving when a relaxed operation is acceptable. The LNA is implemented in a 130 nm 1.2 V CMOS technology for a 2.4 GHz IEEE-802.15.4 application. Simulated LNA performance (taking into account the worst cases under process variations) is comparable to recently published works. PubDate: Thu, 18 Feb 2016 06:51:48 +000
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