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  Subjects -> ELECTRONICS (Total: 194 journals)
Showing 1 - 200 of 277 Journals sorted alphabetically
Acta Electronica Malaysia     Open Access  
Advanced Materials Technologies     Hybrid Journal  
Advances in Electrical and Electronic Engineering     Open Access   (Followers: 8)
Advances in Electronics     Open Access   (Followers: 94)
Advances in Magnetic and Optical Resonance     Full-text available via subscription   (Followers: 8)
Advances in Power Electronics     Open Access   (Followers: 39)
Advancing Microelectronics     Hybrid Journal  
Aerospace and Electronic Systems, IEEE Transactions on     Hybrid Journal   (Followers: 353)
American Journal of Electrical and Electronic Engineering     Open Access   (Followers: 27)
Annals of Telecommunications     Hybrid Journal   (Followers: 9)
APSIPA Transactions on Signal and Information Processing     Open Access   (Followers: 9)
Archives of Electrical Engineering     Open Access   (Followers: 14)
Australian Journal of Electrical and Electronics Engineering     Hybrid Journal  
Autonomous Mental Development, IEEE Transactions on     Hybrid Journal   (Followers: 8)
Batteries     Open Access   (Followers: 7)
Batteries & Supercaps     Hybrid Journal  
Bell Labs Technical Journal     Hybrid Journal   (Followers: 30)
Bioelectronics in Medicine     Hybrid Journal  
Biomedical Engineering, IEEE Reviews in     Full-text available via subscription   (Followers: 22)
Biomedical Engineering, IEEE Transactions on     Hybrid Journal   (Followers: 38)
Biomedical Instrumentation & Technology     Hybrid Journal   (Followers: 6)
Broadcasting, IEEE Transactions on     Hybrid Journal   (Followers: 13)
BULLETIN of National Technical University of Ukraine. Series RADIOTECHNIQUE. RADIOAPPARATUS BUILDING     Open Access   (Followers: 1)
Bulletin of the Polish Academy of Sciences : Technical Sciences     Open Access   (Followers: 1)
Canadian Journal of Remote Sensing     Full-text available via subscription   (Followers: 47)
China Communications     Full-text available via subscription   (Followers: 9)
Chinese Journal of Electronics     Hybrid Journal  
Circuits and Systems     Open Access   (Followers: 15)
Consumer Electronics Times     Open Access   (Followers: 5)
Control Systems     Hybrid Journal   (Followers: 301)
ECTI Transactions on Computer and Information Technology (ECTI-CIT)     Open Access  
ECTI Transactions on Electrical Engineering, Electronics, and Communications     Open Access   (Followers: 2)
Edu Elektrika Journal     Open Access   (Followers: 1)
Electrica     Open Access  
Electronic Design     Partially Free   (Followers: 123)
Electronic Markets     Hybrid Journal   (Followers: 7)
Electronic Materials Letters     Hybrid Journal   (Followers: 4)
Electronics     Open Access   (Followers: 104)
Electronics and Communications in Japan     Hybrid Journal   (Followers: 10)
Electronics For You     Partially Free   (Followers: 103)
Electronics Letters     Hybrid Journal   (Followers: 26)
Elkha : Jurnal Teknik Elektro     Open Access  
Embedded Systems Letters, IEEE     Hybrid Journal   (Followers: 55)
Energy Harvesting and Systems     Hybrid Journal   (Followers: 4)
Energy Storage     Hybrid Journal  
Energy Storage Materials     Full-text available via subscription   (Followers: 3)
EPE Journal : European Power Electronics and Drives     Hybrid Journal  
EPJ Quantum Technology     Open Access   (Followers: 1)
EURASIP Journal on Embedded Systems     Open Access   (Followers: 11)
Facta Universitatis, Series : Electronics and Energetics     Open Access  
Foundations and Trends® in Communications and Information Theory     Full-text available via subscription   (Followers: 6)
Foundations and Trends® in Signal Processing     Full-text available via subscription   (Followers: 10)
Frequenz     Hybrid Journal   (Followers: 1)
Frontiers of Optoelectronics     Hybrid Journal   (Followers: 1)
Geoscience and Remote Sensing, IEEE Transactions on     Hybrid Journal   (Followers: 217)
Haptics, IEEE Transactions on     Hybrid Journal   (Followers: 4)
IACR Transactions on Symmetric Cryptology     Open Access  
IEEE Antennas and Propagation Magazine     Hybrid Journal   (Followers: 100)
IEEE Antennas and Wireless Propagation Letters     Hybrid Journal   (Followers: 81)
IEEE Journal of Emerging and Selected Topics in Power Electronics     Hybrid Journal   (Followers: 51)
IEEE Journal of the Electron Devices Society     Open Access   (Followers: 9)
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits     Hybrid Journal   (Followers: 1)
IEEE Power Electronics Magazine     Full-text available via subscription   (Followers: 75)
IEEE Transactions on Antennas and Propagation     Full-text available via subscription   (Followers: 73)
IEEE Transactions on Automatic Control     Hybrid Journal   (Followers: 59)
IEEE Transactions on Circuits and Systems for Video Technology     Hybrid Journal   (Followers: 26)
IEEE Transactions on Consumer Electronics     Hybrid Journal   (Followers: 44)
IEEE Transactions on Electron Devices     Hybrid Journal   (Followers: 19)
IEEE Transactions on Information Theory     Hybrid Journal   (Followers: 26)
IEEE Transactions on Power Electronics     Hybrid Journal   (Followers: 78)
IEEE Transactions on Signal and Information Processing over Networks     Full-text available via subscription   (Followers: 13)
IEICE - Transactions on Electronics     Full-text available via subscription   (Followers: 12)
IEICE - Transactions on Information and Systems     Full-text available via subscription   (Followers: 5)
IET Cyber-Physical Systems : Theory & Applications     Open Access   (Followers: 1)
IET Energy Systems Integration     Open Access  
IET Microwaves, Antennas & Propagation     Hybrid Journal   (Followers: 35)
IET Nanodielectrics     Open Access  
IET Power Electronics     Hybrid Journal   (Followers: 57)
IET Smart Grid     Open Access  
IET Wireless Sensor Systems     Hybrid Journal   (Followers: 18)
IETE Journal of Education     Open Access   (Followers: 4)
IETE Journal of Research     Open Access   (Followers: 11)
IETE Technical Review     Open Access   (Followers: 13)
IJEIS (Indonesian Journal of Electronics and Instrumentation Systems)     Open Access   (Followers: 3)
Industrial Electronics, IEEE Transactions on     Hybrid Journal   (Followers: 74)
Industrial Technology Research Journal Phranakhon Rajabhat University     Open Access  
Industry Applications, IEEE Transactions on     Hybrid Journal   (Followers: 38)
Informatik-Spektrum     Hybrid Journal   (Followers: 2)
Instabilities in Silicon Devices     Full-text available via subscription   (Followers: 1)
Intelligent Transportation Systems Magazine, IEEE     Full-text available via subscription   (Followers: 13)
International Journal of Advanced Research in Computer Science and Electronics Engineering     Open Access   (Followers: 18)
International Journal of Advances in Telecommunications, Electrotechnics, Signals and Systems     Open Access   (Followers: 12)
International Journal of Antennas and Propagation     Open Access   (Followers: 11)
International Journal of Applied Electronics in Physics & Robotics     Open Access   (Followers: 4)
International Journal of Computational Vision and Robotics     Hybrid Journal   (Followers: 5)
International Journal of Control     Hybrid Journal   (Followers: 11)
International Journal of Electronics     Hybrid Journal   (Followers: 7)
International Journal of Electronics and Telecommunications     Open Access   (Followers: 13)
International Journal of Granular Computing, Rough Sets and Intelligent Systems     Hybrid Journal   (Followers: 3)
International Journal of High Speed Electronics and Systems     Hybrid Journal  
International Journal of Hybrid Intelligence     Hybrid Journal  
International Journal of Image, Graphics and Signal Processing     Open Access   (Followers: 16)
International Journal of Microwave and Wireless Technologies     Hybrid Journal   (Followers: 10)
International Journal of Nanoscience     Hybrid Journal   (Followers: 1)
International Journal of Numerical Modelling: Electronic Networks, Devices and Fields     Hybrid Journal   (Followers: 4)
International Journal of Power Electronics     Hybrid Journal   (Followers: 25)
International Journal of Review in Electronics & Communication Engineering     Open Access   (Followers: 4)
International Journal of Sensors, Wireless Communications and Control     Hybrid Journal   (Followers: 10)
International Journal of Systems, Control and Communications     Hybrid Journal   (Followers: 4)
International Journal of Wireless and Microwave Technologies     Open Access   (Followers: 6)
International Transaction of Electrical and Computer Engineers System     Open Access   (Followers: 2)
JAREE (Journal on Advanced Research in Electrical Engineering)     Open Access  
Journal of Biosensors & Bioelectronics     Open Access   (Followers: 4)
Journal of Advanced Dielectrics     Open Access   (Followers: 1)
Journal of Artificial Intelligence     Open Access   (Followers: 12)
Journal of Circuits, Systems, and Computers     Hybrid Journal   (Followers: 4)
Journal of Computational Intelligence and Electronic Systems     Full-text available via subscription   (Followers: 1)
Journal of Electrical and Electronics Engineering Research     Open Access   (Followers: 36)
Journal of Electrical Bioimpedance     Open Access  
Journal of Electrical Bioimpedance     Open Access   (Followers: 2)
Journal of Electrical Engineering & Electronic Technology     Hybrid Journal   (Followers: 7)
Journal of Electrical, Electronics and Informatics     Open Access  
Journal of Electromagnetic Analysis and Applications     Open Access   (Followers: 8)
Journal of Electromagnetic Waves and Applications     Hybrid Journal   (Followers: 9)
Journal of Electronic Design Technology     Full-text available via subscription   (Followers: 6)
Journal of Electronics (China)     Hybrid Journal   (Followers: 5)
Journal of Energy Storage     Full-text available via subscription   (Followers: 4)
Journal of Engineered Fibers and Fabrics     Open Access   (Followers: 2)
Journal of Field Robotics     Hybrid Journal   (Followers: 3)
Journal of Guidance, Control, and Dynamics     Hybrid Journal   (Followers: 182)
Journal of Information and Telecommunication     Open Access   (Followers: 1)
Journal of Intelligent Procedures in Electrical Technology     Open Access   (Followers: 3)
Journal of Low Power Electronics     Full-text available via subscription   (Followers: 10)
Journal of Low Power Electronics and Applications     Open Access   (Followers: 10)
Journal of Microelectronics and Electronic Packaging     Hybrid Journal  
Journal of Microwave Power and Electromagnetic Energy     Hybrid Journal   (Followers: 3)
Journal of Microwaves, Optoelectronics and Electromagnetic Applications     Open Access   (Followers: 11)
Journal of Nuclear Cardiology     Hybrid Journal  
Journal of Optoelectronics Engineering     Open Access   (Followers: 4)
Journal of Physics B: Atomic, Molecular and Optical Physics     Hybrid Journal   (Followers: 30)
Journal of Power Electronics & Power Systems     Full-text available via subscription   (Followers: 11)
Journal of Semiconductors     Full-text available via subscription   (Followers: 5)
Journal of Sensors     Open Access   (Followers: 26)
Journal of Signal and Information Processing     Open Access   (Followers: 9)
Jurnal ELTIKOM : Jurnal Teknik Elektro, Teknologi Informasi dan Komputer     Open Access  
Jurnal Rekayasa Elektrika     Open Access  
Jurnal Teknik Elektro     Open Access  
Jurnal Teknologi Elektro     Open Access  
Kinetik : Game Technology, Information System, Computer Network, Computing, Electronics, and Control     Open Access  
Learning Technologies, IEEE Transactions on     Hybrid Journal   (Followers: 12)
Magnetics Letters, IEEE     Hybrid Journal   (Followers: 7)
Majalah Ilmiah Teknologi Elektro : Journal of Electrical Technology     Open Access   (Followers: 2)
Metrology and Measurement Systems     Open Access   (Followers: 6)
Microelectronics and Solid State Electronics     Open Access   (Followers: 28)
Nanotechnology Magazine, IEEE     Full-text available via subscription   (Followers: 42)
Nanotechnology, Science and Applications     Open Access   (Followers: 6)
Nature Electronics     Hybrid Journal   (Followers: 1)
Networks: an International Journal     Hybrid Journal   (Followers: 5)
Open Electrical & Electronic Engineering Journal     Open Access  
Open Journal of Antennas and Propagation     Open Access   (Followers: 9)
Optical Communications and Networking, IEEE/OSA Journal of     Full-text available via subscription   (Followers: 16)
Paladyn. Journal of Behavioral Robotics     Open Access   (Followers: 1)
Power Electronics and Drives     Open Access   (Followers: 2)
Problemy Peredachi Informatsii     Full-text available via subscription  
Progress in Quantum Electronics     Full-text available via subscription   (Followers: 7)
Pulse     Full-text available via subscription   (Followers: 5)
Radiophysics and Quantum Electronics     Hybrid Journal   (Followers: 2)
Recent Advances in Communications and Networking Technology     Hybrid Journal   (Followers: 4)
Recent Advances in Electrical & Electronic Engineering     Hybrid Journal   (Followers: 10)
Research & Reviews : Journal of Embedded System & Applications     Full-text available via subscription   (Followers: 5)
Revue Méditerranéenne des Télécommunications     Open Access  
Security and Communication Networks     Hybrid Journal   (Followers: 2)
Selected Topics in Applied Earth Observations and Remote Sensing, IEEE Journal of     Hybrid Journal   (Followers: 56)
Semiconductors and Semimetals     Full-text available via subscription   (Followers: 1)
Sensing and Imaging : An International Journal     Hybrid Journal   (Followers: 2)
Services Computing, IEEE Transactions on     Hybrid Journal   (Followers: 4)
Software Engineering, IEEE Transactions on     Hybrid Journal   (Followers: 79)
Solid State Electronics Letters     Open Access  
Solid-State Circuits Magazine, IEEE     Hybrid Journal   (Followers: 13)
Solid-State Electronics     Hybrid Journal   (Followers: 9)
Superconductor Science and Technology     Hybrid Journal   (Followers: 3)
Synthesis Lectures on Power Electronics     Full-text available via subscription   (Followers: 3)
Technical Report Electronics and Computer Engineering     Open Access  
TELE     Open Access  
Telematique     Open Access  
TELKOMNIKA (Telecommunication, Computing, Electronics and Control)     Open Access   (Followers: 9)
Transactions on Electrical and Electronic Materials     Hybrid Journal   (Followers: 1)
Universal Journal of Electrical and Electronic Engineering     Open Access   (Followers: 7)
Ural Radio Engineering Journal     Open Access   (Followers: 1)
Visión Electrónica : algo más que un estado sólido     Open Access   (Followers: 1)
Wireless and Mobile Technologies     Open Access   (Followers: 6)
Wireless Power Transfer     Full-text available via subscription   (Followers: 4)
Women in Engineering Magazine, IEEE     Full-text available via subscription   (Followers: 11)
Електротехніка і Електромеханіка     Open Access  

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Similar Journals
Journal Cover
IEEE Transactions on Electron Devices
Journal Prestige (SJR): 0.839
Citation Impact (citeScore): 3
Number of Followers: 19  
 
  Hybrid Journal Hybrid journal (It can contain Open Access articles)
ISSN (Print) 0018-9383
Published by IEEE Homepage  [191 journals]
  • IEEE Transactions on Electron Devices publication information
    • Abstract: Provides a listing of current staff, committee members and society officers.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • IEEE Transactions on Electron Devices information for authors
    • Abstract: Provides instructions and guidelines to prospective authors who wish to submit manuscripts.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • [Blank page]
    • Abstract: This page or pages intentionally left blank.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • Characterization and Modeling of Hot Carrier Degradation in N-Channel
           Gate-All-Around Nanowire FETs
    • Authors: Charu Gupta;Anshul Gupta;Shikhar Tuli;Erik Bury;Bertrand Parvais;Abhisek Dixit;
      Pages: 4 - 10
      Abstract: In this article, we present a detailed analysis of the dependence of hot-carrier (HC) induced damage on the device design parameters in silicon-on-insulator (SOI) gate-all-around (GAA) nanowire (NW) n-field-effect transistors (FETs). Particularly, the HC reliability of NWs at extremely small (5 nm) to large (40 nm) widths is assessed for devices with different gate lengths. A substantial improvement in device reliability is observed at smaller NW widths, which could be due to the quantization effects and reduced effective stress voltages due to the increase in source/drain resistance. The difference in prestress device parameters, such as threshold voltage and source/drain resistance, is shown to affect the HC degradation (HCD) by altering the actual stress voltages applied to the device. Further, the impact of self-heating on the HCD mechanism is studied for devices with different fin density and gates per active region. Consequently, an empirical model is extracted using the measurement results where the empirical prefactors accurately capture the degradation in deeply scaled GAA-NWFETs.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • $mu$+ TSVs&rft.title=IEEE+Transactions+on+Electron+Devices&rft.issn=0018-9383&rft.date=2020&rft.volume=67&rft.spage=11&rft.epage=17&rft.aulast=Bakir;&rft.aufirst=Md&rft.au=Md+Obaidul+Hossen;Bharani+Chava;Geert+Van+der+Plas;Eric+Beyne;Muhannad+S.+Bakir;">Power Delivery Network (PDN) Modeling for Backside-PDN Configurations With
           Buried Power Rails and $mu$ TSVs
    • Authors: Md Obaidul Hossen;Bharani Chava;Geert Van der Plas;Eric Beyne;Muhannad S. Bakir;
      Pages: 11 - 17
      Abstract: In this article, a power delivery network (PDN) modeling framework for backside-PDN configurations is presented. A backside-PDN configuration contains dense microthrough silicon vias ( $mu $ TSVs) and power/ground metal stack on the backside of the die. This approach separates the PDN from a conventional signaling network of the back-end-of-the-line (BEOL) and improves power integrity and core utilization. We benchmark this technology with conventional front-side BEOL PDN configurations. Owing to the lower resistivity compared with Cu metal lines for advanced technology nodes, we use ruthenium (Ru)-based buried power rail for PDN modeling. Our analysis shows that the steady-state IR-drop reduces by more than $4times $ in the backside-PDN configuration, and a simultaneous switching noise analysis shows a significant reduction in transient droops. The framework results are validated with a place-and-route (P&R)-based physical implementation flow. We quantify the area improvement in the actual flow and observe 25%–30% improvement in the backside-PDN configuration. From a PDN modeling framework, the PDN results follow a trend similar to the ones obtained from the block-level P&R of the given configurations. Moreover, we investigate the impacts of package-to-die interconnect pitch, metal–insulator–metal cap density, and input pulse on the PDN performance. In addition, we perform thermal modeling to analyze the thermal implications of the backside-PDN configuration. From a thermal modeling perspective, there is negligible influence from a dielectric bonding layer in the backside-PDN configuration.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • Double-Gate Field-Effect Diode: A Novel Device for Improving
           Digital-and-Analog Performance
    • Authors: Seyed Amir Hashemi;Pezhman Pourmolla;Satyabrata Jit;
      Pages: 18 - 25
      Abstract: In this article, a novel double-gate (DG) field-effect diode (FED) has been proposed, which exhibits smaller short-channel effects (SCEs), smaller OFF-state current ( $I_{mathrm{scriptscriptstyle OFF}}$ ) and higher ON-state current ( $I_{mathrm{scriptscriptstyle ON}}$ ) compared with the previously introduced common FEDs and the side-contacted FEDs (SFEDs). Based on the TCAD simulation study, due to the stronger control of the two gates over the channel, the proposed double-gate FED (DGFED) is shown to suppress the SCEs and to improve $I_{mathrm{scriptscriptstyle ON}}$ / $I_{mathrm{scriptscriptstyle OFF}}$ ratio significantly compared with the SFEDs. The proposed device is also shown to have smaller gate delay time, smaller energy-delay product, larger cutoff frequency, and larger transconductance than the SFED. Thus, DGFED is a promising device for substituting the SFED in possible high-frequency analog and digital applications.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • Design Considerations for Si- and Ge-Stacked Nanosheet pMOSFETs Based on
           Quantum Transport Simulations
    • Authors: Shuo Zhang;Jun Z. Huang;Hao Xie;Afshan Khaliq;Dawei Wang;Wenchao Chen;Kai Miao;Hongsheng Chen;Wen-Yan Yin;
      Pages: 26 - 32
      Abstract: Design considerations of vertically stacked horizontal nanosheet (NSH) gate-all-around pMOSFETs are examined at the sub-5-nm technology node using in-house-developed non-equilibrium Green’s function (NEGF) quantum ballistic transport simulator. In the individual Si and Ge NSHs, ON-state current and subthreshold swing are evaluated and analyzed for different crystal orientations and various sheet widths. Performance benchmarking of the stacked FET arrays at the iso-footprint is accomplished to explore the roles of sheet configurations further with stack number and sheet spacing changed. It is found that the benefit of the larger effective channel width provided by the wider NSH is always compromised by degraded gate control, especially in the Ge channel. [111] and [100] are shown to be the best transport orientations for individual Si and Ge NSHs, respectively. However, [100] channel vertically confined along [011] shows greater potential for the applications of wider Si and Ge NSHs in the stacked FET array. The process-induced NSH width variation is studied statistically, and it is shown to cause significant performance fluctuations in the stacked array consisting of wide Si or narrow Ge NSHs.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • Compact ESD Protection Design for CMOS Low-Noise Amplifier
    • Authors: Chun-Yu Lin;Guo-Lun Huang;Meng-Ting Lin;
      Pages: 33 - 39
      Abstract: A low-noise amplifier (LNA) is the input part of a radio frequency (RF) transceiver, which is vulnerable to electrostatic discharge (ESD). When ESD events occur, they may change the original characteristics of the LNA, such as gain decrease and noise figure (NF) increase. Dual diodes (DD) with MOS-based power clamp is a traditional on-chip ESD protection circuit, but it has disadvantages of large parasitic capacitance, large turn-on resistance, large layout area, and large leakage current. Therefore, a new compact ESD protection circuit is proposed, which uses stacked diodes with embedded silicon-controlled rectifier (SDeSCR) and SCR-based power clamp to protect the LNA. The proposed design has advantages of low parasitic capacitance, low clamping voltage, high ESD robustness, and compact layout area. In this work, the ESD protection circuit and the ${K}$ -band LNA are fabricated in CMOS technology, and their RF characteristics and ESD robustness are verified.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • Design of High-Voltage-Tolerant Power-Rail ESD Protection Circuit for
           Power Pin of Negative Voltage in Low-Voltage CMOS Processes
    • Authors: Rong-Kun Chang;Ming-Dou Ker;
      Pages: 40 - 46
      Abstract: In the implanted biomedical devices, the silicon chips with monopolar stimulation design have been widely applied. To protect the negative-voltage pins of the implanted silicon chip from the electrostatic discharge (ESD) damage, the ESD protection circuit should be carefully designed to avoid any wrong current path under normal circuit operation with the negative voltage. In this article, a new power-rail ESD clamp circuit for the application with an operating voltage of −6 V has been proposed and verified in a 0.18- $mu text{m}$ 3.3-V CMOS process. The proposed circuit, realized with only 3.3-V nMOS/pMOS devices, is able to prevent the gate-oxide reliability issue under this −6-V application. With the proposed ESD detection circuit, the turn-on speed of the main ESD clamp device, which is a stacked-nMOS (STnMOS), can be greatly enhanced. The STnMOS with a width of $400~mu text{m}$ can sustain over 8-kV human body model (HBM) ESD stress and perform low standby leakage current of ~5.4 nA at room temperature under the circuit operating condition with −6-V supply voltage.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • Enhancement of Hot Spot Cooling by Capped Diamond Layer Deposition for
           Multifinger AlGaN/GaN HEMTs
    • Authors: Hang Zhang;Zhixiong Guo;Yongfeng Lu;
      Pages: 47 - 52
      Abstract: The impact of a capped diamond layer for enhanced cooling of multifinger AlGaN/GaN high-electron-mobility transistors (HEMTs) has been investigated under the steady-state operating condition. By depositing a capped diamond thin film onto the HEMTs, the temperature distribution around the hot spots tends to be more uniform and the junction temperature can be suppressed significantly. The capped diamond serves as a highly effective heat spreader, and its thermal spreading ability depends on the structural design patterns and working conditions. Some key parameters affecting the thermal performance of the capped diamond have been examined, including the heat dissipation power density, gate pitch distance, embedding depth of the heat source, thermal boundary resistance, substrate material, as well as the cap thickness. For the 12-finger model with 20- $mu text{m}$ gate pitch distance and gate power density of 6 W/mm, a 20- $mu text{m}$ layer of capped diamond could reduce the junction temperature by 12.1% for GaN-on-diamond HEMTs and by 25.3% for GaN-on-SiC HEMTs. Even with a 1- $mu text{m}$ capped diamond layer, the reduction would be 7.6% and 9.9%, respectively. The temperature reduction for GaN-on-Si is more significant.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • Investigation of Contact Edge Effects in the Channel of Planar Gunn Diodes
    • Authors: A. Mindil;G. M. Dunn;A. Khalid;C. H. Oxley;
      Pages: 53 - 56
      Abstract: The effect of the edge of the channel on the operation of planar Gunn diodes has been examined using Monte Carlo simulations. High fields at the corner of the anode contact are known to cause impact ionization and consequent electroluminescence, but our simulations show that the Gunn domains are attracted to these corners, perturbing the formation of the domains, which can lead to chaotic dynamics within the rest of the channel leading to uneven heating and reduced RF output power. We show how novel shaping of the electrical contacts at the ends of the channel reduces the attraction and restores the domain wavefronts for good device operation.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • The Effects of Gate-Connected Field Plates on Hotspot Temperatures of
           AlGaN/GaN HEMTs
    • Authors: Canberk Dundar;Dogacan Kara;Nazli Donmezer;
      Pages: 57 - 62
      Abstract: To increase the reliability and the maximum performance of AlGaN/GaN high electron mobility transistors (HEMTs), gate field plates are frequently used with surface passivation. Although significant research has been done to understand the electrical effects of gate field plates on devices, their thermal effects are still not fully understood. For this purpose, electrothermal simulations are performed on devices with and without gate field plates having different thicknesses of Si3N4 surface passivation at two different biasing conditions. These simulations prove that more than 8% reduction of maximum temperature can be achieved with the use of gate field plates on devices operated at ${P}={4}$ W/mm. Field plates, when used in multifinger device configurations, have a greater impact on the outermost fingers’ temperatures and can be used to achieve temperature uniformity. Surface passivation studies suggest that while thick passivation layers (~200 nm in case of Si3N4) eliminate the thermal advantages of the field plate technology, very thin passivation layers (~45 nm) cause an increase in the electric field and a decrease in the breakdown voltage. Thus, significant thermal advantages can be achieved when gate field plates are introduced following a field plate length and passivation thickness optimization based on the device biasing conditions.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • Extraction of the 4H-SiC/SiO2 Barrier Height Over Temperature
    • Authors: O. Aviñó-Salvadó;B. Asllani;C. Buttay;C. Raynaud;H. Morel;
      Pages: 63 - 68
      Abstract: The behavior of the barrier height of the SiC/SiO2 interface has been investigated over a wide temperature range, from 173 K to 523 K. These data complement the literature, providing a better knowledge of this parameter, which was studied only over a more restricted temperature range, and never before for low temperatures. It is highlighted that the measured samples exhibit a barrier height temperature dependence very near to the theoretical one (≈−0.7 meVK−1). Beyond 473 K, the barrier height seems to drop faster for some samples, reaching ≈−1.4 meVK−1. If this faster decreasing rate is maintained for higher temperatures, it could limit 4H-SiC MOSFETs performances or reliability for high-temperature applications. It is expected that the data provided here will allow for more accurate modeling of the gate current and the charge injection in the oxide layer of power MOSFETs, leading to more reliable predictions of the oxide lifetime for 4H-SiC MOSFETs.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • Design of GaN/AlGaN/GaN Super-Heterojunction Schottky Diode
    • Authors: Sang-Woo Han;Jianan Song;Rongming Chu;
      Pages: 69 - 74
      Abstract: We present a systematic study on the design of a novel GaN/AlGaN/GaN super-heterojunction Schottky diode. Through physics-based TCAD simulation, we discuss three important design aspects: 1) how to design a GaN/AlGaN/GaN structure to form a high-density 2-D electron gas and to scale it to multiple vertically stacked channels with less risk in reaching the critical thickness limited by the strain in epitaxy; 2) how to reach charge balance and how sensitive is the breakdown voltage with respect to the doping imbalance; and 3) how to ensure that the processes of depleting and accumulating electrons and holes in the structure are fast enough for practical power switching applications.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • Investigation of Switching Time in GaN/AlN Resonant Tunneling Diodes by
           Experiments and P-SPICE Models
    • Authors: W.-D. Zhang;T. A. Growden;D. F. Storm;D. J. Meyer;P. R. Berger;E. R. Brown;
      Pages: 75 - 79
      Abstract: The experimental and simulated switching behavior across the negative differential resistance (NDR) region of GaN/AlN double-barrier resonant tunneling diodes (RTDs) is presented. The shortest 10%–90% experimental switching time was ~55 ps. The experimental results are also studied with P-SPICE circuit models, which show that the relatively low peak-to-valley current ratio (~1.5), relatively high specific contact resistance ( $geq textsf {1}times textsf {10}^{-textsf {6}},,Omega $ -cm2), and relatively large specific capacitance limit the switching time.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • Half-Select-Free Low-Power Dynamic Loop-Cutting Write Assist SRAM Cell for
           Space Applications
    • Authors: Soumitra Pal;Subhankar Bose;Wing-Hung Ki;Aminul Islam;
      Pages: 80 - 89
      Abstract: Smaller, lighter, and cost-effective satellite design is a major field of research today. Since such satellites are equipped with limited resources, there is a huge demand for low-power cache memory capable of performing reliably even when subjected to harsh cosmic radiations. To address the same, we have proposed a reliable, power-efficient, half-select-free dynamic loop-cutting write assist 12T (DWA12T) cell. The DWA12T has been compared with other state-of-the-art designs, such as the fully differential 8T (FD8T), single-ended disturb free 9T (SEDF9T), bit-interleaving architecture-implementing 11T (BI11T), differential 12T (D12T), and self-refreshing logic-based 12T (WWL12T) cells to estimate their relative performance in terms of major design metrics under severe process, voltage, and temperature (PVT) variations. The proposed cell exhibits $1.65times /3.03times /1.08times /1.38times $ shorter write delay ( ${T} _{text{WA}}$ ) and $3.81times /1.20times /1.90times /2.13times $ higher write ability [write margin (WM)] than that of SEDF9T/BI11T/D12T/WWL12T and $1.36times /1.54times /1.22times $ shorter read delay ( ${T} _{text{RA}}$ ) and $6.63times $ higher read stability [read static noise margin (RSNM)] than that of SEDF9T/BI11T/D12T and FD8T, respectively. Moreover, it consumes $1.05times /1.21times /1.10times /1.81times $ lower static power ( ${H} _{text{PWR}}$ ) than that-of FD8T/SEDF9T/D12T/WWL12T while showing $3.44times $ higher hold stability [hold static noise margin (HSNM)] when compared to BI11T. In addition, the DWA12T cell consumes $1.01times /1.02times /1.04times $ smaller area than that of BI11T/D12T/WWL12T. Furthermore, DWA12T shows lower susceptibility to soft error when compared to FD8T. These improvements are achieved at the cost of $1.37times /1.13times $ penalty in ${T} _{text{WA}}/{T} _{text{RA}}$ and $6.23times $ penalty in ${H} _{text{PWR}}$ when compared to FD8T and BI11T, respectively, at ${V} _{text{DD}} = text{0.7}$ V.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • Modeling of Voltage-Controlled Spin–Orbit Torque MRAM for
           Multilevel Switching Application
    • Authors: Sonal Shreya;Brajesh Kumar Kaushik;
      Pages: 90 - 98
      Abstract: Magnetic tunnel junction (MTJ) has emerged as a viable candidate for next-generation memory and logic applications. Manipulation of the magnetic and electric field can control the spin and charge state variables that are of utmost importance in spintronics devices. In this article, the modeling of voltage-controlled spin–orbit torque (VCSOT)-based magnetic random access memory (MRAM) is demonstrated. VCSOT MRAM is an ultrafast device owing to a magnetic switching time of 0.7 ns. It is more energy-efficient as compared to spin–orbit torque (SOT) MRAM. VCSOT MRAM has been exemplified for multilevel cell (MLC) application to enhance the memory integration density. Two-bit serial MLC (sMLC) and parallel MLC (pMLC) designs are proposed using VCSOT MRAM. These MLCs are more energy-efficient as compared to SOT-MLCs. Moreover, 2-bit sMLC and pMLC VCSOT-MRAM significantly reduce average write energy by 91.5% and 49.6%, respectively, as compared to SOT-based MLC. Performance metrics for these devices have been illustrated, which shows the negligible read disturbance and write error rates.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • Performance Enhancement of 3-D NAND Flash Featuring a Two-Step Dummy
           Wordline Program Waveform and Pair-Bitline Program Scheme
    • Authors: Wei-Chen Chen;Hang-Ting Lue;Chih-Chang Hsieh;Keh-Chung Wang;Chih-Yuan Lu;
      Pages: 99 - 104
      Abstract: In this work, we report two performance enhancement schemes for single-gate vertical-channel (SGVC) 3-D NAND Flash. The first one features a programming (PGM) waveform where the bias of the dummy wordline (DWL) is raised in a two-step manner so that the resultant disturbance that the DWL and edge WL suffer is appreciably alleviated. The second scheme takes advantage of a unique behavior termed “self-boosting-enhanced-PGM” mechanism in the pair- bitline PGM method to deal with the slow PGM bits and achieve a much lower bit error rate as a consequence. By using these two approaches, the bit error rate after multilevel cell (MLC) operation can be substantially improved by 82%.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • Flexible Femtojoule Energy-Consumption In-Ga-Zn-O Synaptic Transistors
           With Extensively Tunable Memory Time
    • Authors: Lingkai Li;Yan Shao;Xiaolin Wang;Xiaohan Wu;Wen-Jun Liu;David Wei Zhang;Shi-Jin Ding;
      Pages: 105 - 112
      Abstract: A neuromorphic electronic system requires the component devices to not only mimic typical synaptic behaviors but also be energy-efficient, together with excellent uniformity and tunable memory time. For this purpose, we fabricated amorphous In-Ga-Zn-O (a-IGZO) thin-film transistors with plasma-enhanced atomic layer deposition AlOx:H dielectrics, successfully demonstrating typical synaptic behaviors, such as excitatory and inhibitory postsynaptic current, pair-pules facilitation, dynamic filter, learning and forgetting abilities and spike-timing dependent plasticity. In particular, such synaptic transistors exhibit ultralow energy consumption down to 3.18 fJ per synaptic event and tunable extensive memory time ranging from 76.6 ms to at least thousands of seconds. The ultralow energy consumption is realized by electron trapping and releasing at and near the interface between a-IGZO channel and AlOx:H dielectric under low voltages. By adjusting the concentration of oxygen vacancy defects in the a-IGZO domain adjacent to the interface by means of changing the growth temperature of the AlOx:H dielectrics, the memory time of the device can be further tuned on a large scale. Device flexibility was also demonstrated by fabricating the synaptic transistors onto polymer substrates at room temperature.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • Analytical Modeling of Read-Induced SET-State Conductance Change in a
           Hafnium-Oxide Resistive Switching Device
    • Authors: Po-Cheng Su;Cheng-Min Jiang;Yu-Jia Chen;Chih-Chieh Wang;Kai-Shin Li;Chao-Cheng Lin;Tahui Wang;
      Pages: 113 - 117
      Abstract: A SET-state conductance change in a hafnium-oxide resistive switching memory cell due to repeated read events is investigated. We characterize a read-induced conductance change at different read voltages and SET-state conductance levels. Our result shows that the read-induced conductance degradation exhibits a two-stage evolution with the read pulse number. A SET-state conductance decreases slightly in the first stage and then follows inverse power-law dependence on the read number in the second stage. The power factor is an exponential function of a read voltage without regard to the SET-state conductance level, and the read pulse number at the transition of the two stages is related to a read voltage and conductance level. An analytical model to describe the two-stage conductance evolution is proposed. The parameters in the model are extracted from measurement data. Our model is verified by good agreement between the modeled and measured results in a wide range of read pulse number, read voltage, and SET-state conductance level.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • Kinetic Monte Carlo Simulation of Interface-Controlled Hafnia-Based
           Resistive Memory
    • Authors: Xu Xu;Bipin Rajendran;M. P. Anantram;
      Pages: 118 - 124
      Abstract: Kinetic Monte Carlo simulations of resistive memory devices have been performed by paying attention to the vacancy–interstitial generation near the Hafnia-metal electrode interface. In our model, an oxygen vacancy is generated in Hafnia near the interface, with the corresponding oxygen atom residing in the metal electrode. These oxygen atoms form a thin insulating oxide layer at the Hafnia-active electrode interface. This interfacial layer is essential to thicken the filament, even after the filament bridges the two metal electrodes at low current levels. This thickening of the conducting filament is captured by the model and it naturally explains the trend of resistance decrease with an increase in compliance current found in some experiments. Simulations results as a function of the bonding energy between vacancies show a large increase in retention time with an increase in bonding energy. We also find that as the compliance current increases, the morphology of the filament transitions from conical to dumbbell-shaped. Finally, using a single set of values for various energies, our simulations capture the SET, RESET, and retention processes.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • $_{{x}}$+ N+$_{text{1}-{x}},,({x}=text{0.57}$+ )+Tunnel+Barrier&rft.title=IEEE+Transactions+on+Electron+Devices&rft.issn=0018-9383&rft.date=2020&rft.volume=67&rft.spage=125&rft.epage=132&rft.aulast=Sharma;&rft.aufirst=Mohamad&rft.au=Mohamad+G.+Moinuddin;Aijaz+H.+Lone;Shivangi+Shringi;Srikant+Srinivasan;Satinder+K.+Sharma;">Low-Current-Density Magnetic Tunnel Junctions for STT-RAM Application
           Using MgO $_{{x}}$ N $_{text{1}-{x}},,({x}=text{0.57}$ ) Tunnel Barrier
    • Authors: Mohamad G. Moinuddin;Aijaz H. Lone;Shivangi Shringi;Srikant Srinivasan;Satinder K. Sharma;
      Pages: 125 - 132
      Abstract: High switching speed, endurance, and low-current-based perpendicular magnetic tunnel junction (p-MTJ) memory is attracting wide interest as a key promising candidate for next-generation spintronic memory technology. p-MTJ-based spin-transfer torque RAM (STT-RAM) has been extensively investigated, and despite the promise, there is concern about the high switching current density and low stability with regard to scaling. In this work, the current controllability of p-MTJ in iron (Fe)-enriched Co20Fe60B20 with a newly designed MgOxN1–x tunnel layer is systematically investigated, with the expectation that the introduction of N minimizes the oxidation of Fe to improve the performance of the device. A facile, plasma-based oxynitridation (MgOx= 0.57N1–x=0.43) of MgO through RF-sputter deposition serves as a reliable procedure to establish a tunnel barrier for an MTJ structure fabricated with ~300-nm diameter and pinned with synthetic antiferromagnetic (SAF) [Co/Pt] ${_{n}}$ multilayer stack. Current-controlled tunneling magnetoresistance (TMR) up to ~65% was observed at room temperature (RT) with ultralow switching current density ( ${J}_{c}$ ) of 136 ± 17 kA/cm2. TMR along with tunnel conductance ( ${g}$ ( ${V}$ )) was measured to be highly stable in the read-bias regime (−200 to +200 mV) for MgOxN1–-italic>x as compared to the reported MgO barrier. The analogous MgOxN1–x-based MTJ structures were modeled using the nonequilibrium Green’s function (NEGF) with appropriate tunnel barrier parameters and incorporating modulated barrier height as compared with the MgO barrier. The current–voltage characteristics of the modeled device showed close agreement with experimental data indicating high spin current. Based on the field-induced magnetization analysis, the macro-magnetic reversal analysis suggests the free-layer switching duration of ~3 ns. These observations show the strong candidature of MgOxN1–x ( ${x} = {0.57}$ ) MTJs for STT-RAM device application.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • A Compact Phase Change Memory Model With Dynamic State Variables
    • Authors: Huifang Hu;Dayong Liu;Xuhui Chen;Deqi Dong;Xiaole Cui;Ming Liu;Xinnan Lin;Lining Zhang;Mansun Chan;
      Pages: 133 - 139
      Abstract: A SPICE model for phase change memories (PCM) without relying on macro modules is developed in this work. The crystal fraction, physical geometry, and the conduction path of the amorphous region are treated as dynamic state variables to keep track of the memory cell status during SET and RESET. The memory cell resistance is calculated based on a detail 3-D resistance model to capture its transitional behavior during switching. The detail physical formulation correctly reproduced a recent observation of oscillation during the SET operation. The model has been implemented in SPICE, and the convergence of the model is demonstrated by simulations of a complete PCM array. The use of dynamic state variables also significantly reduces the number of internal nodes to one, which helps convergence and reduces the simulation time.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • Polycrystalline In–Ga–O Thin-Film Transistors Coupled With a Nitrogen
           Doping Technique for High-Performance UV Detectors
    • Authors: Yen-Chi Cheng;Sheng-Po Chang;Ih-Chin Chen;Yen-Lin Tsai;Tien-Hung Cheng;Shoou-Jinn Chang;
      Pages: 140 - 145
      Abstract: In this article, thin-film transistors (TFTs) with a polycrystalline indium–gallium–oxide (poly IGO) active layer were fabricated for ultraviolet (UV) detection. To achieve better sensing performance, an in situ nitrogen doping (N-doping) technique was employed to passivate the excessive defect states in the bandgap. Under UV illumination, it is evident that the N-doped IGO TFT exhibited superior photoresponsivity and UV-to-visible rejection ratio (17.4 A/W and ${1.0},,times {10}^{{{6}}}$ ) as compared to the undoped one (13.1 A/W and ${1.2}times {10}^{{{5}}}$ ). More importantly, a sharper responsivity cutoff at 340 nm ( ${E}_{{text {g}}}sim ~3.65$ eV) was observed, suggesting that the N-doped phototransistor had better wavelength selectivity. Through X-ray photoelectron spectroscopy analysis, it was shown that N-doping reduced the subgap states and thus suppressed the visible light-induced ionization of oxygen vacancy. Furthermore, the nitrogen incorporation slightly reduced the effective bandgap, which enhanced the band-to-band electron transition and the UV responsivity.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • A Lifetime Performance Analysis of LED Luminaires Under Real-Operation
           Profiles
    • Authors: Anjan N. Padmasali;Savitha G. Kini;
      Pages: 146 - 153
      Abstract: Light-emitting diode (LED)-based lighting is the most dominant lighting solution in the current era since it is energy-efficient and long-lasting. Hence, performance analysis of the LEDs throughout its lifetime is of prime importance. The work presented in this article provides insight on degradation analysis of the LED luminaire inclusive of the LED driver in real operating ambient conditions and investigates the performance of both LED light engine and LED driver throughout the period of its lifetime. To represent the practical scenario of LED lighting system usage in commercial applications, analysis of switching cycles on the performance of LED luminaires is also studied. The outcome of this article suggests that LED luminaire under study tends to fail due to lumen degradation, followed by color shift represented by Duv and then lastly by driver failure. Scanning electron microscope and energy-dispersive spectroscopy (SEM-EDS) analysis suggests the corrosion of Ag mirror resulting in lumen output reduction and, thus, is the main reason for the failure of LED luminaire. This provides an insight into the LED manufacturing companies to have better estimate on lifetime of LED luminaires and also the necessity to improve the LEDs’ performance such that luminaires will have longer lifetime as claimed.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • A 4H-SiC UV Phototransistor With Excellent Optical Gain Based on
           Controlled Potential Barrier
    • Authors: L. Di Benedetto;G. D. Licciardo;T. Erlbacher;A. J. Bauer;A. Rubino;
      Pages: 154 - 159
      Abstract: In this article, we report the experimental results of a visible-light-blind 4H-polytype silicon carbide phototransistor able to detect ultraviolet (UV) radiations for wavelengths lower than 380 nm with a significative improvement in the optical gain compared with the state-of-the-art of 4H-SiC UV phototransistors. From the electro-optical measurements, the device shows a dark current of 0.62 pA, an ON-/OFF-current ratio of seven orders of magnitude up to bias voltage of −0.5 V, and an excellent optical gain of $1.14cdot {10}^{{{5}}}$ at 300 nm, whereas it is only $2.6cdot {10}^{-{{3}}}$ at 400 nm demonstrating a good rejection of visible radiations. Besides having high optical gain, the phototransistor is also more sensitive than the conventional 4H-SiC UV detectors for wavelengths with low penetration depths, because its structure is designed to have the electric field up to the radiated surface where the photogenerated electron–hole pairs are efficiently swept up before recombination occurs. The operating principle of the detector is also investigated, and we experimentally proved that differently from the conventional 4H-SiC bipolar junction transistor phototransistor, it is based on the change in the potential barrier height, which controls the current flow, due to the variation in the Fermi levels when the electron–hole pairs are photogenerated. A comparison with the state-of-the-art of 4H-SiC UV phototransistors is reported.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • Analysis of High-Temperature Carrier Transport Mechanisms for High
           Al-Content Al0.6Ga0.4N MSM Photodetectors
    • Authors: Yan Gu;Guofeng Yang;Aaron Danner;Dawei Yan;Naiyan Lu;Xiumei Zhang;Feng Xie;Yueke Wang;Bin Hua;Xianfeng Ni;Qian Fan;Xing Gu;Guoqing Chen;
      Pages: 160 - 165
      Abstract: An AlGaN-based solar blind ultraviolet (UV) metal–semiconductor–metal (MSM) photodetector (PD) with a high Al-content of 0.6 has been successfully fabricated. The device exhibits a cutoff wavelength of 255 nm corresponding to the sharp cutoff transmission spectrum of Al0.6Ga0.4N. In addition, dislocations in the Al0.6Ga0.4N epi-layer has been analyzed by high-resolution transmission electron microscope (TEM). The Al0.6Ga0.4N-based solar blind PD exhibits a responsivity of 0.51 A/W at 10 V with a high breakdown voltage of 470 V. Suggesting its potential applications for high-temperature solar blind UV detection, the ${I}$ – ${V}$ – ${T}$ characteristics have been comprehensively investigated to explore its high-temperature carrier transport mechanisms. It is convincingly demonstrated that the bias leakage current across the device is dominated by thermionic-field emission transport at low bias voltages and Poole–Frenkel emission at high bias voltages from room temperature up to 425 K.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • In2O3/TiO2 Heterostructure for Highly Responsive Low-Noise Ultraviolet
           Photodetector
    • Authors: Akshay Moudgil;Keshav Kumar Sharma;Samaresh Das;
      Pages: 166 - 172
      Abstract: High-performance metal-semiconductor-metal ultraviolet (UV) photodetector was fabricated based on In2O3/TiO2 heterostructure. The In2O3/TiO2 heterostructure photodetector exhibits the maximum responsivity of 799.5 A/W and Gain of 3541.8 under 280 nm wavelength of illumination at 2 V, which is eight times higher than the In2O3 photodetector. The In2O3/TiO2 photodetector exhibited lower noise-equivalent power ( $5.5,,,,times ,,{10}^{{-{12}}}$ W. Hz−1/2) and higher detectivity (1.1 $times ,,{10}^{{{12}}}$ cm.Hz1/2 W−1) as compared to In2O3 photodetector. Flicker noise dominated the In2O3/TiO2 photodetector with a corner frequency of 9 Hz. The enhanced performance of the device is assigned to improved electron-hole dissociation efficiency in In2O3 via electron transfer from In2O3 to TiO2. This heterostructure-based photodetector with improved performance can pave the way for efficient UV photodetection applications.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • MgZnO-Based Schottky Barrier Ultraviolet-B Photodiode by Ultrasonic Spray
           Pyrolysis Deposition
    • Authors: Han-Yin Liu;Wei-Hsin Liu;Hung-Sheng Chu;
      Pages: 173 - 178
      Abstract: This article demonstrates a Mg0.4Zn0.6 O-based ultraviolet-B photodiode using ultrasonic spray pyrolysis deposition (USPD). The material characteristics of the USPD-deposited Mg0.4Zn0.6O thin film are investigated by the X-ray diffraction, X-ray photoelectron spectroscopy, photoluminescence, and ellipsometer. Schottky photodiode is fabricated by using Pt as the anode and Ti/Au as the cathode. Note that 0.84-eV Schottky barrier height is formed between Pt and Mg0.4Zn0.6O. The present Schottky barrier photodiode shows high rectification ratio of 104 and high ultraviolet-to-visible rejection ratio of ${1.83} times {10}^{{5}}$ . Furthermore, the specific detectivity is over 1011 Jones at ultraviolet-B region.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • InSb Avalanche Photodiodes on GaAs Substrates for Mid-Infrared Detection
    • Authors: Y. Alimi;V. Pusino;Matthew J. Steer;D. R. S. Cumming;
      Pages: 179 - 184
      Abstract: We present indium antimonide-based devices for mid-infrared (mid-IR) detection with enhanced sensitivity. InSb devices will be useful for many applications, such as gas sensing and imaging. InSb avalanche photodiodes (APDs) monolithically integrated with GaAs substrates were fabricated with diameters ranging from 90 to $200~mu text{m}$ and extensively characterized at temperatures ranging from 77 K to 300 K. At 120 K a zero-bias responsivity of 2 A/W was measured, corresponding to a quantum efficiency of 55%. An experimental gain value of 10 at a reverse bias of −3 V was obtained at 120 K, which to the best of our knowledge, is the highest ever reported for InSb APDs. These results pave the way for the development of a monolithically integrated mid-IR array with added gain and wavelength tunability.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • Reliability Concerns on LDMOS With Different Split-STI Layout Patterns
    • Authors: Ran Ye;Li Lu;Siyang Liu;Haibo Wu;Hongting Chen;Weifeng Sun;Shengli Lu;Long Zhang;Wangran Wu;Wei Su;Boyong He;Feng Lin;Guipeng Sun;
      Pages: 185 - 192
      Abstract: Compared with the full shallow trench isolation (full-STI) lateral double-diffused MOS (LDMOS), the split-STI LDMOS has been demonstrated as a superior device with better breakdown voltage (BVOFF and specific on-resistance ( ${R}_{ {scriptstylemathrm{ON}},text {sp}})$ by virtue of its low resistance current path and dielectric reduced surface field effect. The layout of STI may not only be restricted in one pattern. Instead, it can have a variety of changes based on the split-STI structure. Actually, improvement of ${R}_{ {scriptstylemathrm{ON}},text {sp}}$ can be achieved upon modifying the STI layout pattern. In this way, four STI layout patterns, named split-STI, stair-STI, slope-STI, and H-shape-STI, are proposed. However, there is lack of information about the impacts of STI layout patterns on the reliability features of LDMOS. Therefore, in this article, the reliability features of the LDMOS with different STI layout patterns are investigated in detail, including electrical safe operating area (e-SOA), electro-static discharge (ESD) robustness, and hot carrier injection (HCI) degradation. Combining the experiment and technology computer-aided design (TCAD) simulation, the root causes of different reliability features are analyzed and discussed. Comparing them each, the LDMOS with H-shape-STI is recommended because of its better reliability features.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • Low-Voltage AlGaAs/GaAs Thyristors as High-Peak-Current Pulse Switches for
           High-Power Semiconductor Laser Pumping
    • Authors: Sergey O. Slipchenko;Aleksandr A. Podoskin;Vyacheslav S. Golovin;Polina S. Gavrina;Victor V. Shamakhov;Dmitriy N. Nikolaev;Vasilii V. Zolotarev;Nikita A. Pikhtin;Timur A. Bagaev;Maxim A. Ladugin;Aleksandr A. Marmalyuk;Vladimir A. Simakov;
      Pages: 193 - 197
      Abstract: The dynamic characteristics of a low-voltage thyristor based on an AlGaAs/GaAs heterostructure have been studied in the mode of generation of high-amplitude pulses with width of tens of nanoseconds in a circuit with low-impedance load based on an array of high-power AlGaAs/GaAs semiconductor lasers. The presented approach uses thyristors and diode laser arrays as discrete components, so it can be extended to other (not AlGaAs/GaAs-based) semiconductor lasers. It is demonstrated that a current pulse can be generated with an amplitude of 69 A and a width of 40 ns in a vertically assembled stack of an array of semiconductor lasers and thyristors. It was shown that raising the number of single thyristors does not lead to pulse broadening and makes it possible to raise several-fold the peak current amplitude to 208 A, with the peak laser emission power reaching a value of 78 W.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • Frequency-Improved 4H-SiC IGBT With Multizone Collector Design
    • Authors: Guannan Tang;Xiaoyan Tang;Qingwen Song;Shuai Yang;Yimeng Zhang;Yimen Zhang;Yuming Zhang;
      Pages: 198 - 203
      Abstract: A novel 4H-SiC multizone collector vertical insulated-gate bipolar transistor (MZC-IGBT) with an alternate P+/P−/P+ multizone structure in the collector region is proposed and investigated by numerical simulations in this article. Comparing with conventional 4H-SiC IGBTs, lower potential barrier regions are formed in the proposed MZC-IGBT at the interface between the N field-stop buffer and the collector region, modifying the carrier extraction effect to a proper level and resulting in a superior tradeoff between the static and dynamic performances. The proposed device consumes less energy in a wide frequency range. The numerical simulation reveals that the average dissipation power of the optimized 4H-SiC MZC-IGBT can be decreased by 63.1% at a high frequency of 20 kHz and even 2.26% at a low frequency of 500 Hz, which makes the proposed device much more suitable for high-frequency applications.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • $beta$+ -Ga2O3+Thin-Channel+MOSFETs+by+Pulsed++${I}$+ +${V}$+ +and+Raman+Nanothermography&rft.title=IEEE+Transactions+on+Electron+Devices&rft.issn=0018-9383&rft.date=2020&rft.volume=67&rft.spage=204&rft.epage=211&rft.aulast=Jessen;&rft.aufirst=Nicholas&rft.au=Nicholas+A.+Blumenschein;Neil+A.+Moser;Eric+R.+Heller;Nicholas+C.+Miller;Andrew+J.+Green;Andreas+Popp;Antonio+Crespo;Kevin+Leedy;Miles+Lindquist;Taylor+Moule;Stefano+Dalcanale;Elisha+Mercado;Manikant+Singh;James+W.+Pomeroy;Martin+Kuball;Gunter+Wagner;Tania+Paskova;John+F.+Muth;Kelson+D.+Chabak;Gregg+H.+Jessen;">Self-Heating Characterization of $beta$ -Ga2O3 Thin-Channel MOSFETs by
           Pulsed ${I}$ – ${V}$ and Raman Nanothermography
    • Authors: Nicholas A. Blumenschein;Neil A. Moser;Eric R. Heller;Nicholas C. Miller;Andrew J. Green;Andreas Popp;Antonio Crespo;Kevin Leedy;Miles Lindquist;Taylor Moule;Stefano Dalcanale;Elisha Mercado;Manikant Singh;James W. Pomeroy;Martin Kuball;Gunter Wagner;Tania Paskova;John F. Muth;Kelson D. Chabak;Gregg H. Jessen;
      Pages: 204 - 211
      Abstract: $beta $ -Ga2O3 thin-channel MOSFETs were evaluated using both dc and pulsed ${I}$ – ${V}$ measurements. The reported pulsed ${I}$ – ${V}$ technique was used to study self-heating effects in the MOSFET channel. The device was analyzed over a large temperature range of 23 °C–200 °C. A relationship between dissipated power and channel temperature was established, and it was found that the MOSFET channel was heating up to 208 °C when dissipating 2.5 W/mm of power. The thermal resistance of the channel was found to be 73 °C-mm/W. The results are supported with the experimental Raman nanothermography and thermal simulations and are in reasonable agreement with pulsed ${I}$ – ${V}$ findings. The high thermal resistance underpins the importance of optimizing thermal management in future Ga2O3 devices.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • Characterization of Schottky Barrier Diodes on Heteroepitaxial Diamond on
           3C-SiC/Si Substrates
    • Authors: Takuya Murooka;Junya Yaita;Toshiharu Makino;Masahiko Ogura;Hiromitsu Kato;Satoshi Yamasaki;Meralys Natal;Stephen E. Saddow;Takayuki Iwasaki;Mutsuko Hatano;
      Pages: 212 - 216
      Abstract: We demonstrated and characterized Schottky barrier diodes (SBDs) fabricated on heteroepitaxial diamond films grown onto 3C-SiC/Si substrates. SBDs showed clear diode properties with rectification ratios above 109 at ±5 V and maintained above 108 even at 500 K. Temperature dependence of the Schottky barrier height (SBH) and the ideality factor was explained by assuming inhomogeneous Schottky barriers following the Gaussian distribution. For leakage current analysis, two types of defects, linear pits (LPs) and nonepitaxial crystals (NCs), were shown to be fatal defects, causing the flow of leakage currents. The leakage current was found to be an exponential function of the length of the LPs and a linear function of the size of the NCs. These defects can be suppressed by highly oriented heteroepitaxial diamond films with reduction of tilt and twist spread for diamond nuclei and optimized growth condition. Moreover, intrinsic layer thickening and inserting a buffer layer stopping propagation of dislocations are also effective. By reducing both crystal defects, we can obtain device properties comparable to SBDs fabricated on homoepitaxial diamond films because the leakage currents can be suppressed.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • ${E}$+ -Mode+GaN+MIS-FETs:+Impact+of+Substrate+Terminations&rft.title=IEEE+Transactions+on+Electron+Devices&rft.issn=0018-9383&rft.date=2020&rft.volume=67&rft.spage=217&rft.epage=223&rft.aulast=Chen;&rft.aufirst=Mengyuan&rft.au=Mengyuan+Hua;Song+Yang;Jin+Wei;Zheyang+Zheng;Jiabei+He;Kevin+J.+Chen;">Hole-Induced Degradation in ${E}$ -Mode GaN MIS-FETs: Impact of Substrate
           Terminations
    • Authors: Mengyuan Hua;Song Yang;Jin Wei;Zheyang Zheng;Jiabei He;Kevin J. Chen;
      Pages: 217 - 223
      Abstract: We conducted reliability characterization under reverse-bias stress (i.e., stress at OFF-state with high ${V}_{text {DS}}$ ) on the ${E}$ -mode GaN metal–insulator–semiconductor field-effect-transistors (MIS-FETs) with various substrate terminations. The MIS-FETs with floating substrate (FS) show worse threshold voltage ( ${V}_{text {TH}}$ ) stability than that with a grounded substrate. A non monotonic dependence of ${V}_{text {TH}}$ shifts and OFF-state time-to-breakdown ( ${t}_{text {BD}}$ ) on the positive substrate bias ( ${V}_{text {sub}}$ ) was also observed. The underlying mechanisms are the different impacts of positive ${V}_{text {sub}}$ on the drift of electrons and holes during the long-term stress. An important indication is that positive-biased and FS terminations should be restricted at OFF-state in order to obtain good ${V}_{text {TH}}$ stability in applications of the GaN MIS-FET.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • 4H-SiC CMOS Transimpedance Amplifier of Gamma-Irradiation Resistance Over
           1 MGy
    • Authors: Masahiro Masunaga;Shintaroh Sato;Ryo Kuwana;Nobuyuki Sugii;Akio Shima;
      Pages: 224 - 229
      Abstract: A transimpedance amplifier (TIA)—with gamma-irradiation resistance of over 1 MGy—based on a novel 4H-SiC complementary MOS (CMOS) technology was fabricated. This TIA is robust enough to be applied in measuring instruments installed in nuclear power plants or other harshly irradiated environments. The SiC CMOS transistors comprising the TIA feature a thin (8-nm-thick) gate oxide to reduce the threshold-voltage shift ( ${V}_{{text {th}}}$ ) due to irradiation by more than 90% compared with that of the conventional transistors. Oxynitride protection formed at the SiC–SiO2 interface in the thin gate-oxide region suppresses the deterioration of mobility by interface traps generated by the gamma radiation. The TIA consisting of these SiC-CMOS transistors operated properly up to at least 1.2 MGy without an increase in the offset voltage, although its open-loop gain was degraded due to deteriorated mobility of the p-channel metal–oxide–semiconductor field-effect transistor (MOSFET). On the other hand, increasing the drain leakage current in the nonactive region impeded further improvement of the SiC TIA under a high integral dose. To decrease the drain leakage current, a structure with a high doping concentration layer between the source and the drain in the nonactive region was fabricated. The structure stops the parasitic transistor turning on and the trap-assisted current increasing. The leakage current of the improved structure is about 42% lower than that of a conventional structure.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • An Improved Behavior Model for IGBT Modules Driven by Datasheet and
           Measurement
    • Authors: Lei Jing;Mingxing Du;Kexin Wei;William Gerard Hurley;
      Pages: 230 - 236
      Abstract: This article describes an improved behavior model for IGBT modules. The new steady-state characteristic model of the IGBT with a correction function was built to improve the saturation current for different gate-emitter voltages. Two important nonlinear capacitances were described by two continuous functions to solve the convergence problem in the circuit simulation. The parasitic parameters generated by the package were extracted by the impedance measurement. All the parameters of the model are derived from datasheet and measurement. The improved model was implemented by MAST language in SABER circuit simulation. A double-pulse test was applied to verify the improved model. Compared with the conventional model for transient waveforms, switching losses, and electromagnetic interference (EMI), the improved model shows a better agreement with experiments. The satisfactory results indicate that the improved model can offer a simple, fast, and generic modeling approach.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • A First Evaluation of Thick Oxide 3C-SiC MOS Capacitors Reliability
    • Authors: Fan Li;Qiu Song;Amador Perez-Tomas;Vishal Shah;Yogesh Sharma;Dean Hamilton;Craig Fisher;Peter Gammon;Mike Jennings;Phil Mawby;
      Pages: 237 - 242
      Abstract: Despite the recent advances in 3C-SiC technology, there is a lack of statistical analysis on the reliability of SiO2 layers on 3C-SiC, which is crucial in power MOS device developments. This article presents a comprehensive study of the medium- and long-term time-dependent dielectric breakdowns (TDDBs) of 65-nm-thick SiO2 layers thermally grown on a state-of-the-art 3C-SiC/Si wafer. Fowler–Nordheim (F-N) tunneling is observed above 7 MV/cm and an effective barrier height of 3.7 eV is obtained, which is the highest known for native SiO2 layers grown on the semiconductor substrate. The observed dependence of the oxide reliability on the gate active area suggests that the oxide quality has not reached the intrinsic level. Three failure mechanisms were identified and confirmed by both medium- and long-term results. Although two of them are likely due to extrinsic defects from material quality and fabrication steps, the one dominating the high field (>8.5 MV/cm) should be attributed to the electron impact ionization within SiO2. At room temperature, the field acceleration factor is found to be $approx 0.906$ dec/(MV/cm) for high fields, and the projected lifetime exceeds 10 years at 4.5 MV/cm.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • A Novel Diode-Clamped Carrier Stored Trench IGBT With Improved
           Performances
    • Authors: Bo Yi;XinTong Xie;MouFu Kong;JunJi Cheng;XingBi Chen;
      Pages: 243 - 248
      Abstract: In this article, a novel diode-clamped carrier stored trench IGBT (DC-CS-TIGBT) is proposed and investigated by the TCAD tool. Two series-connected diodes implemented on the surface of the IGBT is proposed to clamp the voltage potential of the carrier stored layer (CSL). Hence, the CSL can be heavily doped. A significant improvement in the tradeoff between ON-state voltage ( $V_{ mathrm{scriptscriptstyle ON}}$ ) and turn-off loss ( $E_{ mathrm{scriptscriptstyle OFF}}$ ) can be achieved due to enhanced emitter injection. Moreover, due to the shielding effect on the voltage potential of the CSL, the saturation current is reduced by over 41% compared with that of the buried P-shield CS-TIGBT(PS-CS-TIGBT). Consequently, the withstand time of short-circuit is improved from 6.7 to $15~mu text{s}$ compared with that of the PS-CS-TIGBT.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • Design Analysis and Human Tests of Foil-Based Wheezing Monitoring System
           for Asthma Detection
    • Authors: Sherjeel M. Khan;Nadeem Qaiser;Sohail F. Shaikh;Muhammad Mustafa Hussain;
      Pages: 249 - 257
      Abstract: We present a flexible acoustic sensor that has been designed to detect wheezing (a common symptom of asthma) while attached to the chest of a human. We adopted a parallel-plate capacitive structure using air as the dielectric material. The pressure (acoustic) waves from wheezing vibrate the top diaphragm of the structure, thereby changing the output capacitance. The sensor is designed in such a way that it resonates in the frequency range of wheezing (100–1000 Hz), which presents twofold benefits. The resonance results in large deflection of the diaphragm that eradicates the need for using signal amplifiers (used in microphones). Second, the design itself acts as a low-pass filter to reduce the effect of background noise, which mostly lies in the >1000-Hz frequency range. The resulting analog interface is minimal, and thus consumes less power and occupies less space. The sensor is made up of low-cost sustainable materials (aluminum foil) that greatly reduce the cost and complexity of manufacturing processes. A robust wheezing detection (matched filter) algorithm is used to identify different types of wheezing sounds among the noisy signals originating from the chest that lie in the same frequency range as wheezing. The sensor is connected to a smartphone via Bluetooth, enabling signal processing and further integration into digital medical electronic systems based on the Internet of Things (IoT). Bending, cyclic pressure, heat, and sweat tests are performed on the sensor to evaluate its performance in simulated real-life harsh conditions.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • Sensitivity of Source/Drain Critical Dimension Variations for Sub-5-nm
           Node Fin and Nanosheet FETs
    • Authors: Jun-Sik Yoon;Jinsu Jeong;Seunghwan Lee;Rock-Hyun Baek;
      Pages: 258 - 262
      Abstract: Source/drain (S/D) variations in sub-5-nm node fin and nanosheet field-effect transistors (NSFETs) were thoroughly analyzed by using fully calibrated technology computer-aided design (TCAD). S/D open and contact critical dimensions (OCD and CCD) vary during anisotropic etching for silicide and S/D epi formations, respectively, and these vary dc/ac performances. OCD varies S/D resistances and parasitic capacitances, but slight RC delay variations occur. CCD affects OFF-state currents ( ${I}_{{ mathrm{scriptscriptstyle OFF}}}$ ) and RC delay, but differently in terms of fin field-effect transistors (FinFETs) and NSFETs. As the S/D epi enlarges by CCD changes, high subfin leakage of FinFETs flows into the fin bottom regions, thus varying ${I}_{{ mathrm{scriptscriptstyle OFF}}}$ greatly. NSFETs have the dielectric layers beneath the S/D epi; therefore, the ${I}_{{ mathrm{scriptscriptstyle OFF}}}$ variations are smaller. Both effective currents ( ${I}_{{text {eff}}}$ ) and gate capacitances ( ${C}_{{text {gg}}}$ ) of FinFETs vary in the same direction, whereas the NSFETs have constant ${C}_{{text {gg}}}$ with respect to CCD changes because of the tradeoff between the intrinsic and parasitic capacitances. Although this effect increases the RC delay variations of the NSFETs, p-type FinFETs have the largest RC delay variations due to the greatest relative variations of ${I}_{{text {eff}}}$ - Thus, the NSFETs are much immune to CCD variations compared with FinFETs in terms of ${I}_{{ mathrm{scriptscriptstyle OFF}}}$ and RC delay.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • Thermal Noise Models for Trigate Junctionless Transistors Including
           Substrate Bias Effects
    • Authors: Deepti Gola;Balraj Singh;P. S. T. N. Srinivas;Pramod Kumar Tiwari;
      Pages: 263 - 269
      Abstract: Thermal noise power spectral density (PSD) models for trigate junctionless field-effect transistors (TG-JLFETs) incorporating substrate bias effects are developed in this article. The PSDs of drain current thermal noise, induced gate noise, and cross correlation between the two noises are derived for TG-JLFET using the modified Klaassen and Prins (KP) equation. An all-region drain current model of TG-JLFET is used to obtain the aforementioned thermal noises. Thermal noise PSD in TG-JLFET depends on channel conductance, and substrate bias voltage significantly modulates the channel conductance, and thus, the substantial impact of substrate bias can be observed on thermal noise of TG-JLFET. Model results are validated with the simulation results obtained using a 3-D technology computer-aided design (TCAD)-based device simulator from Synopsys.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • Band Variations Caused by Strain Effects for Quantum Wires With Arbitrary
           Orientations
    • Authors: Heather L. Cihak;Wei Li;
      Pages: 270 - 276
      Abstract: We develop a 2-D continuum elasticity model to study semiconductor band variations caused by strain effects for quantum wires (QWRs) with arbitrary orientations on the (001) plane. The model is implemented by the finite-element method, considering the anisotropic properties of semiconductor crystals and the geometric shapes of QWRs. Using this model, we systematically investigate the changes of band profiles and band gaps as the orientation of an InAs/GaAs QWR varies. We find that band energy deformations due to hydrostatic strain, biaxial strain, and piezoelectric effects are all orientation dependent. In particular, the piezoelectric energy changed dramatically with the orientation. These effects, in turn, cause the bandgap to be orientation dependent. The QWR along [100] or [010] has the minimum bandgap; and the QWR along the [110] or $[{1}{overline {{{1}}}}{0}]$ direction has the largest bandgap. For some cases, such as the triangle-based QWR, the bandgap change can be significant; and the heavy-hole and light-hole bands may cross or even flip at certain orientations. We also observe that the bandgap profile or pattern inside the QWRs is not sensitive to the orientation. For cylindrical QWRs, the bandgap is uniform, but for the triangle-based QWR, the bandgap has strong location dependence.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • Effects of the Molecular Chain Length of Polyimide on the Characteristics
           of Organic Resistive Random Access Memories
    • Authors: Chi-Chang Wu;Wen-Fa Wu;Guan-Wei Lin;Wen-Luh Yang;
      Pages: 277 - 282
      Abstract: We developed organic resistive random access memory (ReRAM) devices using spin-coated polyimide (PI) as the resistive layer. In this article, the effect of the chain length of the PI macromolecules on the electrical performance of ReRAM devices was studied. The chain length of the PI macromolecule was controlled by repeating the addition step of 4, $4^prime $ -diaminodioxydianiline in a polyamic acid precursor. A long molecular chain of the PI film could be obtained by increasing the addition times. The electrical properties of the PI-based ReRAM devices revealed that the leakage current in the high-resistance state and memory window can be improved by increasing the molecular chain length of the PI film. A model is proposed to explain the effects of the chain length on the conduction mechanism in the PI film. Moreover, PI films with long molecular chains exhibited an increased retention time.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • Density-of-States-Based Physical Model for Ink-Jet Printed Thiophene
           Polymeric TFTs
    • Authors: Jiyoul Lee;Jun Tae Jang;Jaeman Jang;Jaehyeong Kim;Jong Won Chung;Sung-Jin Choi;Dong Myong Kim;Kyung Rok Kim;Dae Hwan Kim;
      Pages: 283 - 288
      Abstract: We proposed a physical model for ink-jet printed polymeric thin-film transistors (PTFTs) all over the sub- and above-threshold regions by using an effective carrier density. The nonlinearity under the low lateral electric field in the printed thiophene PTFTs was reproduced by applying the back-to-back Schottky diode model based on simple Poole–Frenkel (PF) mobility formalism. The analytical ${I}{-}!{V}$ model supplemented with ${C}{-}!{V}$ model in a single framework was also verified by successfully reproducing the measured characteristics of TFTs with three different thiophene polymeric channel materials. Additionally, we applied the physics-based analytical model on the inkjet-printed PTFT-based inverter and confirmed that the proposed models could predict the inverter circuit characteristics of the gain and static noise margin (SNM) based on the physical parameters.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • High-Resolution AlGaN/GaN HEMT-Based Electrochemical Sensor for Biomedical
           Applications
    • Authors: Niketa Sharma;Shivanshu Mishra;Kuldip Singh;Nitin Chaturvedi;Ashok Chauhan;C. Periasamy;Dheeraj Kumar Kharbanda;Priyavart Parjapat;P. K. Khanna;Nidhi Chaturvedi;
      Pages: 289 - 295
      Abstract: We have investigated the characteristics of pH and salinity sensor derived from the gated AlGaN/GaN high-electron mobility transistor (HEMT) structures in phosphate buffer saline (PBS) and aqueous salt solutions (NaCl + DI). In deionized (DI) water, the HEMT device showed good drain ${I}$ – ${V}$ characteristics, which is very close to the output characteristics of the typical HEMT structures subjected to the air. We observed a significant change in the output drain characteristics curves concerning to the variation in the pH values of PBS solutions, signifying the subsequent potential variation at the AlGaN surface. The output drain current recorded at ${V}_{text {ds}}= +1$ V was linearly decremented with the pH value. A high sensitivity of $4.32~{mu }text{A}$ /mm-pH was obtained. These GaN HEMT structures demonstrated a quick response to the pH changes. It was also investigated that the devices were susceptible toward the aqueous salt solution (NaCl + DI). The percentage change in drain current linearly decreased with decreasing NaCl molar concentration in DI water. We have reported on the change in current with the smaller range of molar concentration of NaCl present in water. Evaluating the sensitivity and response time, we obtained a high sensitivity of 6.48 mA/mm-molar and a response time of 250–350 ms at ${V}_{text {ds}}= +1$ V. We have also reported on the change in current with the molar concentration of NaCl present in PBS with a high sensitivity of 2.02 mA/mm-molar at ${V}_{te-t {ds}}= +5$ V. These outcomes show that the AlGaN/GaN HEMTs are exceptionally promising as a high-sensitivity pH sensor and salinity sensor for biological experiments.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • Ammonia Sensing Characteristics of a Platinum (Pt) Hybrid
           Structure/GaN-Based Schottky Diode
    • Authors: Ching-Hong Chang;Wei-Cheng Chen;Jing-Shiuan Niu;Bu-Yuan Ke;Shiou-Ying Cheng;Kun-Wei Lin;Wen-Chau Liu;
      Pages: 296 - 303
      Abstract: A hybrid structure of platinum nanoparticles (Pt NPs) and a Pt thin film are employed to fabricate a new Pt NP/Pt thin film/GaN-based Schottky diode-type ammonia sensor. Pt NPs are formed by a drop coating and UV illumination approach. The increased surface-area-to-volume ratio and “spillover” effect of Pt NPs are beneficial in ammonia sensing. Due to the synergistic catalytic activity of Pt NPs and Pt thin film, the studied device shows good ammonia sensing properties, including a high sensing response of 522.1 under 1000-ppm NH3/air gas at 473 K and an extremely low detecting level of 0.4-ppm NH3/air. A thermodynamic analysis is employed to study the related ammonia sensing mechanism. Furthermore, a Kalman filter and the related algorithm are introduced to effectively reduce the redundant data without affecting the original sensing results. Based on the good performance and advantages of a relatively simple structure and easy fabrication, the studied device is promising for ammonia sensing and wireless transmission applications.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • UV Illumination and Au Nanoparticles Enhanced ZnO Nanorods Field Electron
           Emission Device
    • Authors: Sheng-Joue Young;Lin-Tzu Lai;
      Pages: 304 - 308
      Abstract: In this study, ZnO and gold-adsorbed ZnO (Au-ZnO) nanorods (NRs) are successfully synthesized by hydrothermal method. The result of scanning electron microscopy verifies that high-density ZnO NRs are successfully grown on the substrate. The NRs are mostly perpendicular to the substrate surface. The ${J}$ – ${E}$ curves in the dark and under UV indicate that the turn-on field values of the ZnO and Au-ZnO NRs are 6.85 and 5.85 V/ $mu text{m}$ and 4.85 and 4.14 V/ $mu text{m}$ , respectively. The ${F}$ – ${N}$ plot in the dark and under UV demonstrates that the field enhancement factors of the ZnO and Au-ZnO NRs are approximately 700, 1896 and 1796, 4109, respectively. The performance of ZnO NR field emission (FE) is improved by adsorbed Au. The results show that the FE properties remain stable and that the manufactured device features excellent characteristics.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • ${H}$+ -+and++${E}$+ -Plane+Loaded+Slow+Wave+Structure+for++${W}$+ -Band+TWT&rft.title=IEEE+Transactions+on+Electron+Devices&rft.issn=0018-9383&rft.date=2020&rft.volume=67&rft.spage=309&rft.epage=313&rft.aulast=Chen;&rft.aufirst=Laxma&rft.au=Laxma+R.+Billa;M.+Nadeem+Akram;Claudio+Paoloni;Xuyuan+Chen;">${H}$ - and ${E}$ -Plane Loaded Slow Wave Structure for ${W}$ -Band TWT
    • Authors: Laxma R. Billa;M. Nadeem Akram;Claudio Paoloni;Xuyuan Chen;
      Pages: 309 - 313
      Abstract: Sheet beam vacuum electron tubes are an attractive solution for high-power sources or amplifiers at millimeter-waves. In this article, a novel ${W}$ -band slow wave structure (SWS) for traveling wave tube (TWT) amplifiers supporting a sheet beam is proposed. The SWS is based on a rectangular waveguide with ${H}$ - and ${E}$ -plane loaded (HEL) metal corrugations. A test structure of the proposed HEL SWS with purposely designed input and output couplers was built in the frequency range of 91–98 GHz ( ${W}$ -band). The measured scattering-parameters agree well with the simulations showing ${S}_{11}< - 15$ dB over 10-GHz bandwidth. A TWT was designed and simulated with the HEL SWS. It shows very good gain-bandwidth performance. The SWS is easy to manufacture by low-cost computer numerical controlled (CNC)-milling. The results demonstrated that the HEL SWS is a very good solution to build high-power, wideband millimeter-wave TWTs for a wide range of applications that need high power in a broad frequency range.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • $Ka$+ -Band+RBWO+Operating+in+TM02+Mode+With+Low-Guiding+Magnetic+Field&rft.title=IEEE+Transactions+on+Electron+Devices&rft.issn=0018-9383&rft.date=2020&rft.volume=67&rft.spage=314&rft.epage=321&rft.aulast=Chen;&rft.aufirst=Dongyang&rft.au=Dongyang+Wang;Yan+Teng;Shuang+Li;Yanchao+Shi;Ping+Wu;Yuqun+Deng;Tianze+Miao;Zhimin+Song;Changhua+Chen;">Research on an Overmoded $Ka$ -Band RBWO Operating in TM02 Mode With
           Low-Guiding Magnetic Field
    • Authors: Dongyang Wang;Yan Teng;Shuang Li;Yanchao Shi;Ping Wu;Yuqun Deng;Tianze Miao;Zhimin Song;Changhua Chen;
      Pages: 314 - 321
      Abstract: A Ka-band relativistic backward-wave oscillator (RBWO) operating in the TM02 mode is researched theoretically and experimentally in this article. The RBWO can overcome the disadvantages of a traditional RBWO, such as small size and low-power capability, when the operating frequency goes to the millimeter-wave band and is more suitable for adopting a lower-guiding magnetic field. The mode-selection mechanisms in the RBWO ensure that the electron beam interacts with the negative first-harmonic wave of the TM02 mode efficiently. The particle-in-cell (PIC) simulation preformed the 490-MW output power at a frequency of 29.3 GHz. The experiment was done on the SINUS-881 accelerator, and with the diode voltage and current at 580 kV and 3.6 kA, respectively, at a guiding magnetic field of 1 T, the RBWO produced a microwave pulse with a power as high as 360 MW at a central frequency of 29.3 GHz. The dependence of microwave power on diode voltage coincides with PIC simulation. Pulse shortening as well as severe bombarding damage of the electron beam on the postcascaded resonators were observed. By increasing the guiding magnetic field to 1.26 T, the pulsewidth was evidently improved.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • Numerical Computation of Dispersion Curves for Both Symmetric and
           Asymmetric Modes in Metal Coaxial Slow Wave Structures
    • Authors: Siyao Chen;Jun Zhang;Jiande Zhang;Dian Zhang;Haitao Wang;
      Pages: 322 - 327
      Abstract: In the overmoded coaxial slow wave structures (SWSs), the asymmetric mode is easier to be excited by the electron beam. For conveniently studying the high frequency characteristics of coaxial asymmetric modes, we derive and solve the universal dispersion equation for both symmetric and asymmetric modes in coaxial SWSs. In principle, this numerical formula can be applied to arbitrary even-function SWSs, arbitrary corrugated depth and arbitrary transverse dimension. By this dispersion equation, the dispersion curves of asymmetric modes can be calculated more quickly and conveniently than the simulation software based on finite-element method.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • Second Harmonic 527-GHz Gyrotron for DNP-NMR: Design and Experimental
           Results
    • Authors: Sudheer K. Jawla;Robert G. Griffin;Ivan A. Mastovsky;Michael A. Shapiro;Richard J. Temkin;
      Pages: 328 - 334
      Abstract: We report the design and experimental demonstration of a frequency tunable terahertz gyrotron at 527 GHz built for an 800-MHz dynamic nuclear polarization enhanced nuclear magnetic resonance (DNP-NMR) spectrometer. The gyrotron is designed at the second harmonic ( $omega = {2}omega _{c}$ ) of the electron cyclotron frequency. It produces up to 9.3-W continuous microwave (CW) power at 527.2-GHz frequency using a diode type electron gun operating at ${V} = {16.65}$ kV, ${I}_{b} = {110}$ mA in a TE11,2,1 mode, corresponding to an efficiency of ~0.5%. The gyrotron is tunable within ~0.4 GHz by combining voltage and magnetic field tuning. The gyrotron has an internal mode converter that produces a Gaussian-like beam that couples to the HE11 mode of an internal 12-mm i.d. corrugated waveguide periscope assembly leading up to the output window. An external corrugated waveguide transmission line system is built including a corrugated taper from 12- to 16-mm i.d. waveguide followed by 3 m of the 16-mm i.d. waveguide The microwave beam profile is measured using a pyroelectric camera showing ~84% HE11 mode content.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • A High-Efficiency Dual-Cavity Extended Interaction Oscillator
    • Authors: Zhiwei Chang;Lin Meng;Hailong Li;Bin Wang;Xuesong Yuan;Che Xu;Ruibin Peng;Yong Yin;
      Pages: 335 - 340
      Abstract: A dual-cavity extended interaction oscillator (EIO) is proposed to overcome the efficiency limitation and circuit instability of the conventional EIO (i.e., the single-cavity, strong-coupling EIO), and its advantages in efficiency and stability are demonstrated by the study of a dual-cavity, Ka-band, EIO circuit. Circuit characteristics of the weak-coupling and strong-coupling circuits are studied and the key design issues are analyzed. Efficiency improvement from 14.2% to 20.2% and from 16.8% to 21.7% is predicted by the 3-D particle-in-cell (PIC) simulations performed in CST and CHIPIC, respectively. Not only a high-efficiency dual-cavity EIO circuit is achieved, but also the stability and robustness are analyzed and improved. This design provides an effective approach toward efficiency and stability improvement in the millimeter-wave range, and analyses on the weak-coupling and strong-coupling circuits are practical for the extended interaction structure study.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • Nonadiabatic Effects on Beam-Quality Parameters for Frequency-Tunable
           Gyrotrons
    • Authors: Cheng-Hung Tsai;Tsun-Hsu Chang;Yuusuke Yamaguchi;Toshitaka Idehara;
      Pages: 341 - 346
      Abstract: We propose an unconventional structure of an electron gun to produce an annular beam for the frequency-tunable gyrotrons. The proposed gun takes advantage of the nonadiabatic electron motion during the acceleration of electrons by placing an emitter on the concave region of the cathode with a relatively weak electric field. The commonly employed adiabatic theory fails to predict the simulated transverse velocity spread, which suggests that the nonadiabatic effect plays an important role during the acceleration of electrons. Simulations are carried out by the EGUN code and verified with the commercial Computer Simulation Technology (CST) Particle Studio. From the change in the kinetic energy and the magnetic moment, we can define a section of the nonadiabatic electron motion. The rapid change in the beam-quality parameters within the nonadiabatic section is associated with the significant change in the electric field near the cathode. By considering the nonadiabatic electron motion, simulations predict appropriate parameters, namely, a pitch factor of 1.5 and a transverse velocity spread of 2.8%, over a wide range of the magnetic field (7.4–8.0 T) and the beam voltage (12–22 kV) with a high structural tolerance on the cathode geometry. The promising results enable the development of frequency-tunable gyrotrons.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • Electron Injector Based on Thermionic RF-Modulated Electron Gun for
           Particle Accelerator Applications
    • Authors: Liang Zhang;Georgia Adam;Boris Militsyn;Wenlong He;Adrian W. Cross;
      Pages: 347 - 353
      Abstract: In this article, the design and simulation of an electron injector based on a thermionic RF-modulated electron gun for particle accelerator applications is presented. The electron gun is based on a gridded thermionic cathode with the geometry based on a Pierce-type configuration. Both theory and numerical simulation were used to explore the relationship between the bunch length and the charge. The reasons for the pulse widening were also analyzed. The beam dynamics simulations showed that a minimum pulselength of 106 ps could be achieved with a bunch charge of 33 pC when the driving RF frequency was 1.5 GHz. The average transverse emittance was about 17 mm·mrad from the particle-in-cell simulations. Operating at a higher RF frequency did not significantly reduce the micro pulselength.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • Intrinsic Capabilities for Digital Switching of Silicene Nanoribbons With
           Edge Defects
    • Authors: Mirko Poljak;
      Pages: 354 - 359
      Abstract: Statistical atomistic quantum transport simulations are used to study the prospects of digital switching in silicene nanoribbons (SiNRs) with edge defects. For various nanoribbon widths and defect levels, we study the averaged parameters (such as bandgap and conductance in the ON- and OFF-state) and their defect-induced variability. We report that moderately defective SiNRs exhibit up to 30% larger bandgaps than their ideal counterparts, bringing it to about 0.5 eV, and the ON–OFF conductance ratios in the range from ~103 to ~106. In terms of resilience to edge defects, we demonstrate that SiNRs are less immune to defects than phosphorene nanoribbons, while they are considerably more resistant than graphene nanoribbons.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • 0.7-GHz Solution-Processed Indium Oxide Rectifying Diodes
    • Authors: Miao Li;Mari Honkanen;Xianjie Liu;Chakra Rokaya;Andreas Schramm;Mats Fahlman;Paul R. Berger;Donald Lupo;
      Pages: 360 - 364
      Abstract: Solution-based deposition, with its simplicity and possibility for upscaling through printing, is a promising process for low-cost electronics. Metal oxide semiconductor devices, especially indium oxide with its excellent electrical properties, offer high performance compared to amorphous Si-based rivals, and with a form factor conducive to flexible and wearable electronics. Here, rectifying diodes based on an amorphous spin-coated indium oxide are fabricated for high-speed applications. We report a solution-processed diode approaching the UHF range, based on indium oxide, with aluminum and gold as the electrodes. The device was spin-coated from a precursor material and configured into a half-wave rectifier. The ${J}$ – ${V}$ and frequency behavior of the diodes were studied, and the material composition of the diode was investigated by X-ray photoemission spectroscopy (XPS). The 3-dB point was found to be over 700 MHz. The results are promising for the development of autonomously powered wireless Internet-of-Things systems based on scalable, low-cost processes.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • Cross-Domain Optimization of Ferroelectric Parameters for Negative
           Capacitance Transistors—Part I: Constant Supply Voltage
    • Authors: Sai Pentapati;Rakesh Perumal;Sourabh Khandelwal;Michael Hoffmann;Sung Kyu Lim;Asif I. Khan;
      Pages: 365 - 370
      Abstract: In this two-part article, we propose a framework for selecting ferroelectric oxide material for the design of a negative capacitance field-effect transistor (NCFET). The investigation is based on an exhaustive search of two important ferroelectric material parameters: remnant polarization and coercive field in the context of their negative capacitance properties. The effects of these parameters are first studied at the NCFET device level and systematically extended up to the full-chip level. Based on this search, we arrive at the notion of optimality of ferroelectric parameters for a given “isoperformance full-chip benchmark”: The power dissipation in a specific circuit/system is maximally reduced by using optimized NCFETs while meeting the target performance. In Part I, we develop the framework for identifying optimal ferroelectric parameters at a given ${V}_{textsf {DD}}$ . This sets the stage for Part II, where we investigate the optimal ferroelectric parameters as ${V}_{textsf {DD}}$ is scaled.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • Optimal Ferroelectric Parameters for Negative Capacitance Field-Effect
           Transistors Based on Full-Chip Implementations—Part II: Scaling of the
           Supply Voltage
    • Authors: Sai Pentapati;Rakesh Perumal;Sourabh Khandelwal;Asif I. Khan;Sung Kyu Lim;
      Pages: 371 - 376
      Abstract: Negative capacitance field-effect transistors (NCFETs) with optimal ferroelectric parameters provide phenomenal power reduction as discussed in Part I. In this part, we explore the impact of operating voltage on power consumption at the device, gate, and full-chip levels. We first observe that high operating voltages applied to NCFET devices lead to an abrupt increase in both the drain current and the gate capacitance. Furthermore, negative capacitance is lost when the voltage is set too high. On the other hand, the gate capacitance increase still exists, although with smaller magnitude, even at low operating voltages. This helps reduce device delay and eventually full-chip delay. Furthermore, delay improvement at the full-chip level can be traded off to gain power reduction at the full-chip level. Finally, our experiments suggest that a sufficiently low supply voltage (= 0.4 V out of [0.2 and 0.8 V] range in our study) is needed to maximize power and performance gain at full-chip level.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • Experimental Details of a Steep-Slope Ferroelectric InGaAs Tunnel-FET With
           High-Quality PZT and Modeling Insights in the Transient Polarization
    • Authors: Anne S. Verhulst;Ali Saeidi;Igor Stolichnov;Alireza Alian;Hiroshi Iwai;Nadine Collaert;Adrian M. Ionescu;
      Pages: 377 - 382
      Abstract: The steep-slope ferroelectric tunnel-FET (SS-FeTFET), consisting of an InGaAs TFET with a sub-60 mV/dec subthreshold swing (SS) at room temperature and an externally connected high-quality single-crystalline PZT capacitor, displays improved SS compared to the standalone TFET. In this article, we describe the measurement procedure and measurement results of this SS-FeTFET in great detail. To quantitatively extract the ferroelectric (FE) polarization during voltage sweeps, device simulations of the TFET are combined with the SS-FeTFET measurement results. Finally, qualitative insight in some peculiarities of the experimental observations is given, such as the apparent coercive voltage that is larger in the SS-FeTFET than in the standalone FE, the shape of the polarization during voltage sweeps, and the small polarization hysteresis loop at voltages close to the apparent coercive voltage.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • Selective Electron or Hole Conduction in Tungsten Diselenide (WSe2)
           Field-Effect Transistors by Sulfur-Assisted Metal-Induced Gap State
           Engineering
    • Authors: Ansh;Jeevesh Kumar;Gaurav Sheoran;Ravikesh Mishra;Srinivasan Raghavan;Mayank Shrivastava;
      Pages: 383 - 388
      Abstract: For semiconductor industry to replace silicon CMOS integrated circuits by 2-D semiconductors or transition metal dichalcogenides (TMDs), TMD-based n-FETs as well as p-FETs having performance better than Si FETs are a must. While a lot of literature demonstrates n-channel characteristics, the major roadblocks in the realization of TMD-based CMOS integrated circuit are the lack of approach to realize p-channel transistors having performance comparable to n-channel transistors, all realized over the same TMD substrate. To address this, we propose a new technique by engineering WSe2/metal interface to realize WSe2-based high-performance p- and n-channel transistors and therefore unveil its potential toward CMOS-integrated technology. The technique involves a dry process, based on the chemistry between the sulfur atom and WSe2 surface, that induces unique metal-induced gap states in the source/drain (S/D) contact area, which causes improved hole (electron) injection when Cr (Ni) as S/D metal was used. This has enabled the controlled realization of high-performance WSe2 FETs with desired polarity (N, P, or ambipolar), which solely depends on the contact metal used and contact engineering (CE)/surface engineering. Fundamental investigations on the effect of the proposed CE on metal–WSe2 interface revealed interesting and counter-intuitive facts, which very well corroborate with experimental observations.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • A Physics-Based Compact Model for Ultrathin Black Phosphorus FETs—Part
           I: Effect of Contacts, Temperature, Ambipolarity, and Traps
    • Authors: Elahe Yarmoghaddam;Nazila Haratipour;Steven J. Koester;Shaloo Rakheja;
      Pages: 389 - 396
      Abstract: We report a physics-based surface-potential compact model to describe current–voltage ( $I$ – $V$ ) relationship in a few-layered ambipolar black phosphorus (BP) transistors. To model the device electrostatics, the 2-D density of states of carriers and Fermi–Dirac statistics are used, while carrier transport is described using the drift-diffusion formalism. The model also comprehends the effects of interface traps and voltage-dependent Schottky-type source/drain contact resistances. Compared with prior BP FET models that are mainly suited for near-equilibrium transport and room-temperature operation, the model developed here is applicable over broad bias and temperature range. Validation of the model against measurement data of BP transistors with gate lengths 300–1000 nm and operating temperature from 200–298 K is demonstrated in a companion article.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • A Physics-Based Compact Model for Ultrathin Black Phosphorus FETs—Part
           II: Model Validation Against Numerical and Experimental Data
    • Authors: Elahe Yarmoghaddam;Nazila Haratipour;Steven J. Koester;Shaloo Rakheja;
      Pages: 397 - 405
      Abstract: In the first part of this article, a physics-based surface-potential compact model to describe current–voltage (I–V) relationship in few-layered ambipolar black phosphorus (BP) transistors is presented. The proposed model captures the essential physics of thin-film BP FETs by accounting for the effects of: 1) in-plane band-structure anisotropy in BP, as well as the asymmetry in electron and hole current conduction characteristics; 2) nonlinear Schottky-type source/drain contact resistances; 3) interface traps; 4) ambipolar current conduction in the device using two separate quasi-Fermi levels for electrons and holes; and 5) the effect of temperature on the model parameters. In this article, the model is validated against measured data of back-gated BP transistors with gate lengths of 1000 and 300 nm with the BP thickness of 7.3 and 8.1 nm and for the temperature range of 200–298 K. We also validate the model against numerical TCAD data of BP transistors with channel lengths of 300 and 600 nm and BP thickness of 6 nm. The model is also applied to unipolar 2-D FETs with channel materials, such as MoS2 and WSe2. Compared with prior BP FET models that are mainly suited for near-equilibrium transport and room-temperature operation, the model developed here shows excellent agreement with experimental and numerical data over broad bias and temperature range.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • The Demonstration of 3-D Bi2.0Te2.7Se0.3/Bi0.4Te3.0Sb1.6 Thermoelectric
           Devices by Ionized Sputter System
    • Authors: M.-H. Liao;K.-C. Huang;W.-J. Su;S.-C. Chen;M.-H. Lee;
      Pages: 406 - 408
      Abstract: In this brief, we propose and demonstrate the Bi2.0Te2.7Se0.3/Bi0.4Te3.0Sb1.6 thermoelectric (TE) device with the 3-D structure through the manufacturing process by the ionized sputter system. With the same top-point-of-view area, the proposed 3-D TE device in this brief has approximately twice the number of n-/p-junctions than that in our previously demonstrated 2-D TE device. In order to extract the Seebeck coefficient (S) and the electrical conductivity ( $sigma $ ) to evaluate the total efficiency in our TE device, we also build up the accurate measurement systems. It can be found that the S value is improved ~25% successfully in our proposed 3-D TE device with the same TE material thickness ( ${t}$ ) of 100 nm. On the other hand, the power factor is also found to be enhanced to ~50% accordingly. In summary, the figure of merit (ZT)—i.e., the ability of a TE device to efficiently produce electricity—is increased to ~50% and achieves a value of 0.9, which is the highly competitive number at the low operating temperature ( ${T}$ ) of 130 °C in our proposed 3-D TE devices in this brief.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • Pixel Design Driven Performance Improvement in 4T CMOS Image Sensors: Dark
           Current Reduction and Full-Well Enhancement
    • Authors: Alessandro Michel Brunetti;Mattia Musolino;Sebastiano Strangio;Bhaskar Choubey;
      Pages: 409 - 412
      Abstract: Dark current (DC) limits the optical performance of CMOS image sensors. The main sources of the DC in a modern submicrometer process are the defects induced by the shallow trench isolation fabrication process steps. In this brief, we present a pixel layout technique to reduce the impact of these defects by removing the trench-oxide between the two adjacent edges of neighboring photodiodes (PDs). This isolation scheme relies only on the p-well layer and provides the further advantage of requiring less area. Hence, a larger PD can be designed, leading to an increased pixel fill factor. Experimental results show that this approach reduces the DC by 21% and increases the linear full well capacity by approximately 9%.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • Call for papers for a Special Issue of IEEE Journal of the Electron
           Devices Society on Compact Modeling of Semiconductor Devices
    • Pages: 413 - 415
      Abstract: Describes the above-named upcoming special issue or section. May include topics to be covered or calls for papers.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
  • Introducing IEEE Collabratec
    • Pages: 416 - 416
      Abstract: Advertisement, IEEE. IEEE Collabratec is a new, integrated online community where IEEE members, researchers, authors, and technology professionals with similar fields of interest can network and collaborate, as well as create and manage content. Featuring a suite of powerful online networking and collaboration tools, IEEE Collabratec allows you to connect according to geographic location, technical interests, or career pursuits. You can also create and share a professional identity that showcases key accomplishments and participate in groups focused around mutual interests, actively learning from and contributing to knowledgeable communities. All in one place! Learn about IEEE Collabratec at ieeecollabratec.org.
      PubDate: Jan. 2020
      Issue No: Vol. 67, No. 1 (2020)
       
 
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