Abstract: Presents a listing of the editorial board, board of governors, current staff, committee members, and/or society editors for this issue of the publication. PubDate:
Dec. 2018
Issue No:Vol. 10, No. 4 (2018)
Abstract: These instructions give guidelines for preparing papers for this publication. Presents information for authors publishing in this journal. PubDate:
Dec. 2018
Issue No:Vol. 10, No. 4 (2018)
Authors:
Baozi Chen;Lei Wang;Qingbo Wu;Yusong Tan;Peng Zou;
Pages: 107 - 110 Abstract: Deep learning system composed with multiple levels of layers is increasingly presented in diverse areas nowadays. To achieve good performance, multicore CPUs and accelerators are widely used in real system. Previous study shows that GPU can significantly speed up computation in deep neural networks, while the performance does not scale very well on multicore CPUs. In this letter, we run Caffe on various hardware platforms using different computation setups to train LeNet-5 on MNIST dataset and measure individual time durations of forward and backward passes for each layer. We find that the speedups perform diversely and the scalability of multicore CPU varies when processing different stages of the network. Based on the observation, we show it is worth applying different policies for each layer separately to achieve the overall optimized performance. In addition, our benchmarking results can be used for references to develop dedicated acceleration methods for individual layer of the network. PubDate:
Dec. 2018
Issue No:Vol. 10, No. 4 (2018)
Authors:
Sumana Ghosh;Soumyajit Dey;Pallab Dasgupta;
Pages: 111 - 114 Abstract: We propose pattern-based execution of control loops as a preferable alternative to traditional fully periodic execution for implementing a set of embedded control systems where the sensors, actuators, and control nodes are connected via a shared wireless network. We use a theoretically sound model for skipping loop executions without compromising stability as the basis for developing an SAT-based approach for synthesizing such schedulable loop execution patterns over multihop (wireless) control networks. We demonstrate superior control performance as compared to controllers designed under the fully periodic solutions. PubDate:
Dec. 2018
Issue No:Vol. 10, No. 4 (2018)
Authors:
Prabal Basu;Chidhambaranathan Rajamanikkam;Aatreyi Bal;Pramesh Pandey;Trevor Carter;Koushik Chakraborty;Sanghamitra Roy;
Pages: 115 - 118 Abstract: In this letter, we explore the emerging security threats of near-threshold computing (NTC). Researchers have shown that the delay sensitivity of a circuit to supply voltage variation tremendously increases, as the circuit's operating conditions shift from traditional super-threshold values to NTC values. As a result, NTC systems become extremely vulnerable to timing fault attacks, jeopardizing trustworthy computing. Inspired by the operation of a polymorphic virus, we propose a novel threat model for NTC, referred to as a focally induced fault attack (FIFA). FIFA employs a machine learning framework to ascertain the circuit vulnerabilities and generates targeted software modules to cause a breach of end-user privacy. Our experimental results, obtained from a rigorous machine learning approach, indicate the efficacy of FIFA, in a low-power mobile platform. PubDate:
Dec. 2018
Issue No:Vol. 10, No. 4 (2018)
Authors:
Hiroki Hihara;Akira Iwasaki;Masanori Hashimoto;Hiroyuki Ochi;Yukio Mitsuyama;Hidetoshi Onodera;Hiroyuki Kanbara;Kazutoshi Wakabayashi;Tadahiko Sugibayashi;Takashi Takenaka;Hiromitsu Hada;Munehiro Tada;Makoto Miyamura;Toshitsugu Sakamoto;
Pages: 119 - 122 Abstract: This letter describes a newly established design framework with the layered architecture of processing elements (PEs) exploiting high-level synthesis and its evaluation results. The design framework was developed for intelligent sensor nodes of Internet of Things applications that collaborate with cloud systems, in which small footprint and low power consumption were major concerns. The design framework consists of four layered structure of PE architecture with the extended database management function of a high-level synthesis tool. We investigated the dependencies of resource consumption on the granularity of coarse grained function definitions using the extended database management function of CyberWorkBench. The evaluation results showed that small footprint was achieved especially with dynamically reconfigurable technique. PubDate:
Dec. 2018
Issue No:Vol. 10, No. 4 (2018)
Hybrid journal (It can contain Open Access articles)
