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  Subjects -> ELECTRONICS (Total: 187 journals)
Showing 1 - 200 of 277 Journals sorted alphabetically
Acta Electronica Malaysia     Open Access  
Advances in Electrical and Electronic Engineering     Open Access   (Followers: 7)
Advances in Electronics     Open Access   (Followers: 90)
Advances in Magnetic and Optical Resonance     Full-text available via subscription   (Followers: 8)
Advances in Power Electronics     Open Access   (Followers: 38)
Advancing Microelectronics     Hybrid Journal  
Aerospace and Electronic Systems, IEEE Transactions on     Hybrid Journal   (Followers: 334)
American Journal of Electrical and Electronic Engineering     Open Access   (Followers: 26)
Annals of Telecommunications     Hybrid Journal   (Followers: 9)
APSIPA Transactions on Signal and Information Processing     Open Access   (Followers: 9)
Archives of Electrical Engineering     Open Access   (Followers: 14)
Autonomous Mental Development, IEEE Transactions on     Hybrid Journal   (Followers: 8)
Bell Labs Technical Journal     Hybrid Journal   (Followers: 30)
Bioelectronics in Medicine     Hybrid Journal  
Biomedical Engineering, IEEE Reviews in     Full-text available via subscription   (Followers: 20)
Biomedical Engineering, IEEE Transactions on     Hybrid Journal   (Followers: 38)
Biomedical Instrumentation & Technology     Hybrid Journal   (Followers: 6)
Broadcasting, IEEE Transactions on     Hybrid Journal   (Followers: 13)
BULLETIN of National Technical University of Ukraine. Series RADIOTECHNIQUE. RADIOAPPARATUS BUILDING     Open Access   (Followers: 1)
Bulletin of the Polish Academy of Sciences : Technical Sciences     Open Access   (Followers: 1)
Canadian Journal of Remote Sensing     Full-text available via subscription   (Followers: 47)
China Communications     Full-text available via subscription   (Followers: 9)
Chinese Journal of Electronics     Hybrid Journal  
Circuits and Systems     Open Access   (Followers: 15)
Consumer Electronics Times     Open Access   (Followers: 5)
Control Systems     Hybrid Journal   (Followers: 293)
ECTI Transactions on Computer and Information Technology (ECTI-CIT)     Open Access  
ECTI Transactions on Electrical Engineering, Electronics, and Communications     Open Access  
Edu Elektrika Journal     Open Access   (Followers: 1)
Electrica     Open Access  
Electronic Design     Partially Free   (Followers: 117)
Electronic Markets     Hybrid Journal   (Followers: 7)
Electronic Materials Letters     Hybrid Journal   (Followers: 4)
Electronics     Open Access   (Followers: 97)
Electronics and Communications in Japan     Hybrid Journal   (Followers: 10)
Electronics For You     Partially Free   (Followers: 100)
Electronics Letters     Hybrid Journal   (Followers: 26)
Elkha : Jurnal Teknik Elektro     Open Access  
Embedded Systems Letters, IEEE     Hybrid Journal   (Followers: 55)
Energy Harvesting and Systems     Hybrid Journal   (Followers: 4)
Energy Storage Materials     Full-text available via subscription   (Followers: 3)
EPJ Quantum Technology     Open Access   (Followers: 1)
EURASIP Journal on Embedded Systems     Open Access   (Followers: 11)
Facta Universitatis, Series : Electronics and Energetics     Open Access  
Foundations and Trends® in Communications and Information Theory     Full-text available via subscription   (Followers: 6)
Foundations and Trends® in Signal Processing     Full-text available via subscription   (Followers: 10)
Frequenz     Hybrid Journal   (Followers: 1)
Frontiers of Optoelectronics     Hybrid Journal   (Followers: 1)
Geoscience and Remote Sensing, IEEE Transactions on     Hybrid Journal   (Followers: 205)
Haptics, IEEE Transactions on     Hybrid Journal   (Followers: 4)
IACR Transactions on Symmetric Cryptology     Open Access  
IEEE Antennas and Propagation Magazine     Hybrid Journal   (Followers: 99)
IEEE Antennas and Wireless Propagation Letters     Hybrid Journal   (Followers: 80)
IEEE Journal of Emerging and Selected Topics in Power Electronics     Hybrid Journal   (Followers: 49)
IEEE Journal of the Electron Devices Society     Open Access   (Followers: 9)
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits     Hybrid Journal   (Followers: 1)
IEEE Power Electronics Magazine     Full-text available via subscription   (Followers: 72)
IEEE Transactions on Antennas and Propagation     Full-text available via subscription   (Followers: 71)
IEEE Transactions on Automatic Control     Hybrid Journal   (Followers: 58)
IEEE Transactions on Circuits and Systems for Video Technology     Hybrid Journal   (Followers: 26)
IEEE Transactions on Consumer Electronics     Hybrid Journal   (Followers: 42)
IEEE Transactions on Electron Devices     Hybrid Journal   (Followers: 19)
IEEE Transactions on Information Theory     Hybrid Journal   (Followers: 26)
IEEE Transactions on Power Electronics     Hybrid Journal   (Followers: 78)
IEEE Transactions on Signal and Information Processing over Networks     Full-text available via subscription   (Followers: 12)
IEICE - Transactions on Electronics     Full-text available via subscription   (Followers: 12)
IEICE - Transactions on Information and Systems     Full-text available via subscription   (Followers: 5)
IET Cyber-Physical Systems : Theory & Applications     Open Access   (Followers: 1)
IET Energy Systems Integration     Open Access  
IET Microwaves, Antennas & Propagation     Hybrid Journal   (Followers: 35)
IET Nanodielectrics     Open Access  
IET Power Electronics     Hybrid Journal   (Followers: 55)
IET Smart Grid     Open Access  
IET Wireless Sensor Systems     Hybrid Journal   (Followers: 18)
IETE Journal of Education     Open Access   (Followers: 4)
IETE Journal of Research     Open Access   (Followers: 11)
IETE Technical Review     Open Access   (Followers: 13)
IJEIS (Indonesian Journal of Electronics and Instrumentation Systems)     Open Access   (Followers: 3)
Industrial Electronics, IEEE Transactions on     Hybrid Journal   (Followers: 70)
Industrial Technology Research Journal Phranakhon Rajabhat University     Open Access  
Industry Applications, IEEE Transactions on     Hybrid Journal   (Followers: 35)
Informatik-Spektrum     Hybrid Journal   (Followers: 2)
Instabilities in Silicon Devices     Full-text available via subscription   (Followers: 1)
Intelligent Transportation Systems Magazine, IEEE     Full-text available via subscription   (Followers: 13)
International Journal of Advanced Research in Computer Science and Electronics Engineering     Open Access   (Followers: 18)
International Journal of Advances in Telecommunications, Electrotechnics, Signals and Systems     Open Access   (Followers: 11)
International Journal of Antennas and Propagation     Open Access   (Followers: 11)
International Journal of Applied Electronics in Physics & Robotics     Open Access   (Followers: 4)
International Journal of Computational Vision and Robotics     Hybrid Journal   (Followers: 6)
International Journal of Control     Hybrid Journal   (Followers: 11)
International Journal of Electronics     Hybrid Journal   (Followers: 7)
International Journal of Electronics and Telecommunications     Open Access   (Followers: 13)
International Journal of Granular Computing, Rough Sets and Intelligent Systems     Hybrid Journal   (Followers: 3)
International Journal of High Speed Electronics and Systems     Hybrid Journal  
International Journal of Hybrid Intelligence     Hybrid Journal  
International Journal of Image, Graphics and Signal Processing     Open Access   (Followers: 16)
International Journal of Microwave and Wireless Technologies     Hybrid Journal   (Followers: 10)
International Journal of Nanoscience     Hybrid Journal   (Followers: 1)
International Journal of Numerical Modelling: Electronic Networks, Devices and Fields     Hybrid Journal   (Followers: 4)
International Journal of Power Electronics     Hybrid Journal   (Followers: 25)
International Journal of Review in Electronics & Communication Engineering     Open Access   (Followers: 4)
International Journal of Sensors, Wireless Communications and Control     Hybrid Journal   (Followers: 10)
International Journal of Systems, Control and Communications     Hybrid Journal   (Followers: 4)
International Journal of Wireless and Microwave Technologies     Open Access   (Followers: 6)
International Transaction of Electrical and Computer Engineers System     Open Access   (Followers: 2)
JAREE (Journal on Advanced Research in Electrical Engineering)     Open Access  
Journal of Biosensors & Bioelectronics     Open Access   (Followers: 3)
Journal of Advanced Dielectrics     Open Access   (Followers: 1)
Journal of Artificial Intelligence     Open Access   (Followers: 11)
Journal of Circuits, Systems, and Computers     Hybrid Journal   (Followers: 4)
Journal of Computational Intelligence and Electronic Systems     Full-text available via subscription   (Followers: 1)
Journal of Electrical and Electronics Engineering Research     Open Access   (Followers: 32)
Journal of Electrical Bioimpedance     Open Access  
Journal of Electrical Bioimpedance     Open Access   (Followers: 2)
Journal of Electrical Engineering & Electronic Technology     Hybrid Journal   (Followers: 7)
Journal of Electrical, Electronics and Informatics     Open Access  
Journal of Electromagnetic Analysis and Applications     Open Access   (Followers: 8)
Journal of Electromagnetic Waves and Applications     Hybrid Journal   (Followers: 9)
Journal of Electronic Design Technology     Full-text available via subscription   (Followers: 6)
Journal of Electronics (China)     Hybrid Journal   (Followers: 5)
Journal of Energy Storage     Full-text available via subscription   (Followers: 4)
Journal of Engineered Fibers and Fabrics     Open Access   (Followers: 2)
Journal of Field Robotics     Hybrid Journal   (Followers: 3)
Journal of Guidance, Control, and Dynamics     Hybrid Journal   (Followers: 173)
Journal of Information and Telecommunication     Open Access   (Followers: 1)
Journal of Intelligent Procedures in Electrical Technology     Open Access   (Followers: 3)
Journal of Low Power Electronics     Full-text available via subscription   (Followers: 10)
Journal of Low Power Electronics and Applications     Open Access   (Followers: 10)
Journal of Microelectronics and Electronic Packaging     Hybrid Journal  
Journal of Microwave Power and Electromagnetic Energy     Hybrid Journal   (Followers: 3)
Journal of Microwaves, Optoelectronics and Electromagnetic Applications     Open Access   (Followers: 11)
Journal of Nuclear Cardiology     Hybrid Journal  
Journal of Optoelectronics Engineering     Open Access   (Followers: 4)
Journal of Physics B: Atomic, Molecular and Optical Physics     Hybrid Journal   (Followers: 29)
Journal of Power Electronics & Power Systems     Full-text available via subscription   (Followers: 11)
Journal of Semiconductors     Full-text available via subscription   (Followers: 5)
Journal of Sensors     Open Access   (Followers: 26)
Journal of Signal and Information Processing     Open Access   (Followers: 9)
Jurnal ELTIKOM : Jurnal Teknik Elektro, Teknologi Informasi dan Komputer     Open Access  
Jurnal Rekayasa Elektrika     Open Access  
Jurnal Teknik Elektro     Open Access  
Jurnal Teknologi Elektro     Open Access  
Kinetik : Game Technology, Information System, Computer Network, Computing, Electronics, and Control     Open Access  
Learning Technologies, IEEE Transactions on     Hybrid Journal   (Followers: 12)
Magnetics Letters, IEEE     Hybrid Journal   (Followers: 7)
Majalah Ilmiah Teknologi Elektro : Journal of Electrical Technology     Open Access   (Followers: 2)
Metrology and Measurement Systems     Open Access   (Followers: 6)
Microelectronics and Solid State Electronics     Open Access   (Followers: 27)
Nanotechnology Magazine, IEEE     Full-text available via subscription   (Followers: 41)
Nanotechnology, Science and Applications     Open Access   (Followers: 6)
Nature Electronics     Hybrid Journal   (Followers: 1)
Networks: an International Journal     Hybrid Journal   (Followers: 5)
Open Electrical & Electronic Engineering Journal     Open Access  
Open Journal of Antennas and Propagation     Open Access   (Followers: 9)
Optical Communications and Networking, IEEE/OSA Journal of     Full-text available via subscription   (Followers: 15)
Paladyn. Journal of Behavioral Robotics     Open Access   (Followers: 1)
Power Electronics and Drives     Open Access   (Followers: 2)
Problemy Peredachi Informatsii     Full-text available via subscription  
Progress in Quantum Electronics     Full-text available via subscription   (Followers: 7)
Pulse     Full-text available via subscription   (Followers: 5)
Radiophysics and Quantum Electronics     Hybrid Journal   (Followers: 2)
Recent Advances in Communications and Networking Technology     Hybrid Journal   (Followers: 3)
Recent Advances in Electrical & Electronic Engineering     Hybrid Journal   (Followers: 9)
Research & Reviews : Journal of Embedded System & Applications     Full-text available via subscription   (Followers: 5)
Revue Méditerranéenne des Télécommunications     Open Access  
Security and Communication Networks     Hybrid Journal   (Followers: 2)
Selected Topics in Applied Earth Observations and Remote Sensing, IEEE Journal of     Hybrid Journal   (Followers: 56)
Semiconductors and Semimetals     Full-text available via subscription   (Followers: 1)
Sensing and Imaging : An International Journal     Hybrid Journal   (Followers: 2)
Services Computing, IEEE Transactions on     Hybrid Journal   (Followers: 4)
Software Engineering, IEEE Transactions on     Hybrid Journal   (Followers: 78)
Solid State Electronics Letters     Open Access  
Solid-State Circuits Magazine, IEEE     Hybrid Journal   (Followers: 13)
Solid-State Electronics     Hybrid Journal   (Followers: 9)
Superconductor Science and Technology     Hybrid Journal   (Followers: 3)
Synthesis Lectures on Power Electronics     Full-text available via subscription   (Followers: 3)
Technical Report Electronics and Computer Engineering     Open Access  
TELE     Open Access  
Telematique     Open Access  
TELKOMNIKA (Telecommunication, Computing, Electronics and Control)     Open Access   (Followers: 9)
Universal Journal of Electrical and Electronic Engineering     Open Access   (Followers: 6)
Ural Radio Engineering Journal     Open Access  
Visión Electrónica : algo más que un estado sólido     Open Access   (Followers: 1)
Wireless and Mobile Technologies     Open Access   (Followers: 6)
Wireless Power Transfer     Full-text available via subscription   (Followers: 4)
Women in Engineering Magazine, IEEE     Full-text available via subscription   (Followers: 11)
Електротехніка і Електромеханіка     Open Access  

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Similar Journals
Journal Cover
Solid-State Electronics
Journal Prestige (SJR): 0.492
Citation Impact (citeScore): 2
Number of Followers: 9  
 
  Hybrid Journal Hybrid journal (It can contain Open Access articles)
ISSN (Print) 0038-1101
Published by Elsevier Homepage  [3183 journals]
  • Adjustable response of PZT thin film based piezoelectric micro-actuator
           through DC bias pre-polarization
    • Abstract: Publication date: Available online 4 October 2019Source: Solid-State ElectronicsAuthor(s): Dongdong Gong, Feng Qin, Yichen Wang, Yu Chen, Tingting Yang, Xiangyu Sun PZT piezoelectric thin film based technology is promising in the field of micro-actuators. This paper discusses the effects of pre-polarization on the key properties of PZT thin film, and explores the improvement rules of pre-polarization from the material to device level experiments. At the material level, the pre-polarization treatment increases the piezoelectric strain coefficient by 25%, and improves dielectric properties. Meanwhile, in ferroelectric properties the pre-polarization treatment increases the residual polarization by 50% and coercive field by 25%, respectively. At the device level, pre-polarization treatment greatly increases the output characteristics of the devices, such as maximum output displacement increasing by at least 45% and withstand voltage enhancing by 2 V, which is consistent with the material level enhancement. In addition, the optimal pre-polarization process conditions and the long-term stability of the performance improvement are investigated. The pre-polarization treatment has proved to be meaningful for the improvement of the output capability of the piezoelectric thin film actuators.
       
  • Understanding the metal-oxides induced reduction of the contact resistance
           in organic transistors
    • Abstract: Publication date: Available online 4 October 2019Source: Solid-State ElectronicsAuthor(s): Shabnam Donnhäuser, Masahiro Minagawa, Stefan Blawid, Martin Claus It is well known that inserting metal oxides on top of electrodes in coplanar bottom-gate bottom-contact organic field-effect transistors (OFETs) improves the OFET performance in terms of increased current density, higher effective mobility and reduced contact resistance. This work elucidates the transistor performance gain in case of oxidized metal electrodes using numerical device simulations and experimental data. The study strongly supports the hypothesis that the impact of oxidization can be explained for these experiments by an improvement of the semiconductor morphology in the vicinity of oxidized electrodes in conjunction with an improved mobility in these regions.
       
  • Low Power-High Speed Performance of 8T Static RAM Cell within GaN TFET,
           FinFET, and GNRFET Technologies -- A Review
    • Abstract: Publication date: Available online 1 October 2019Source: Solid-State ElectronicsAuthor(s): Mounica Patnala, Avinash Yadav, John Williams, Anoop Gopinath, Brian Nutter, Trond Ytterdal, Maher Rizkalla Recent ULSI technology development emphasizes both silicon and graphene-based devices and system performance in terms of their low power and high switching speed. With Moore’s law scaling having reached the limits of physics due to ballistic effects, efforts are moving towards nano scale materials and devices such as TFETs and GNRFETs. Still, recent developments with 7nm lithography-based silicon devices have cited exciting results. The successful development of FinFET devices in integrated systems has been a breakthrough for the semiconductor industry. Research efforts were emphasized for new nanoscale materials such as Graphene, GaN, and Carbon nanotubes, as alternative devices for ULSI integrated system design. This paper provides a cumulative review for these three nanoscale devices: FinFET, TFET, and GNRFET. The study focuses on an 8T SRAM cell as geared towards low power and high-speed features that are suitable for high speed computers, wireless communications, and medical devices. The study covers device theory, models, and simulation. The study has showed evidence that the power consumption for both TFET and GNRFET -based systems features superior low power performance of a ratio 1:0.24 as taken for the Static T Cell for 20 nm scale devices. The practical model of the FinFET is verified and used by industry, while the practical model of both TFET and GNRFET are still in the prototype stage.
       
  • Impedance spectroscopy-based electrical equivalent model of a
           thermoelectric module for the figure of merit (ZT)
    • Abstract: Publication date: Available online 30 September 2019Source: Solid-State ElectronicsAuthor(s): Jaewoo Lee, Jeong-Hun Kim, Jong-Pil Im, Sol-Yee Lim, Eun-Bi Jeon, Seung Eon Moon Impedance spectroscopy is able to simultaneously extract three key parameters, namely, the Seebeck coefficient, electrical conductivity, and thermal conductivity, leading to determination of the figure of merit (ZT). As the measurement method is simple, it can be used conveniently at room temperature. However, when measuring at high temperatures, there are restrictions on the IS method. Electrical parasitic parameters between the measuring equipment and the temperature chamber may reduce the reliability of the characterization. Since the electrical part connecting the temperature-variable chamber to the measuring equipment can have tens to hundreds of milliohms, it should be considered as lumped parameters in order to evaluate the intrinsic component of the thermoelectric module. In this study, the electrical and thermal characteristics of the Bi2Te3 thermoelectric module were evaluated in the range from room temperature to 150 ℃ using an impedance spectroscopy-based electrical equivalent model (ISEEM). The ISEEM includes an impedance component consisting of the thermoelectric module itself and the parasitic electrical impedance constituting the measuring apparatus, where the electrical impedance of the measuring equipment can be evaluated by the de-embedding method. As a result, it is possible to accurately extract the intrinsic characteristics of the Bi2Te3 thermoelectric module through ISEEM. The intrinsic parameters of a commercial thermoelectric module of 40 mm by 40 mm were obtained within an error rate of 5 % regardless of the peripheral measuring device. Consequently, the module had a ZT maximum value of 0.73 at 22 °C and a performance of 0.49 at 150 °C. These results demonstrate that electrical and thermal characterization can be performed easily, and at the same time, the reliability of the characterization can be improved.
       
  • Input-modulating Adaptive Neuron Circuit Employing Asymmetric
           Floating-gate MOSFET with Two Independent Control Gates
    • Abstract: Publication date: Available online 26 September 2019Source: Solid-State ElectronicsAuthor(s): Taehyung Kim, Kyungchul Park, Taejin Jang, Myung-Hyun Baek, Young Suh Song, Byung-Gook Park In this paper, we present an input-modulating adaptive neuron circuit employing a floating-gate MOSFET (FG-MOSFET) with two asymmetrically shaped control gates. The proposed FG-MOSFET is utilized as key element for implementing neural adaptation in integrate-and-fire (I&F) neuron circuit. To confirm current modulating capability of proposed device, an adjustable-gain current mirror employing the device is simulated as well. Adaptive neuron circuit presented in this paper successfully exhibits spike-triggered adaptation with ratio between maximum and minimum firing rate ranging from 7.97 to 18.4. Compared to conventional researches, adaptive neuron circuit proposed in this paper allows more versatile operation and easier fabrication due to utilization of out FG-MOSFET.
       
  • Theoretical study of ferroelectric-gated nanoelectromechanical diode
           nonvolatile memory cell
    • Abstract: Publication date: Available online 19 September 2019Source: Solid-State ElectronicsAuthor(s): Kihun Choe, Jaesoo Park, Changhwan Shin Based on the polarization property and negative-capacitance (NC) effect of ferroelectric capacitors, nanoelectromechanical (NEM) diode nonvolatile memory cells (NC-NEM diode NVMs) are proposed for use in random-access memory arrays. It is observed that, by optimizing the structural parameters of the NEM memories, the NC-NEM diode NVMs can achieve more scaled program/erase voltages and better switching delays, when compared to the existing NEM diode memories. Moreover, the NC-NEM diode NVM has a one-directional current path, which is desirable in random-access memory arrays to block the sneak leakage.
       
  • Digital readout optimization of the random resistive states in magnetic
           tunnel junction
    • Abstract: Publication date: Available online 19 September 2019Source: Solid-State ElectronicsAuthor(s): Thomas Egler, Hans Dittmann, Artur Useinov True random number generators (TRNGs) provide a wide area of applications and can be fabricated on the basis of magnetic tunnel junctions (MTJs). This work represents the modeling of TRNG readout optimization, where the induced digital random bit is detected within only a single computational period. The period contains two sub-cycles: write and joined read & reset cycles. The system has a valuable potential to become stochastically independent after calibrating at the desired working point against the factors, which cause to the signal deviations: temperature-induced, material degradation or other problems.
       
  • Improved dielectric properties of BeO thin films grown by plasma enhanced
           atomic layer deposition
    • Abstract: Publication date: Available online 18 September 2019Source: Solid-State ElectronicsAuthor(s): Yoonseo Jang, Seung Min Lee, Do Hwan Jung, Jung Hwan Yum, Eric S. Larsen, Christopher W. Bielawski, Jungwoo Oh Beryllium oxide (BeO) thin films were grown on a p-type Si substrate by plasma enhanced atomic layer deposition (PEALD) using diethylberyllium as a precursor and O2 plasma. The PEALD BeO exhibited self-saturation and linear growth rates. The dielectric properties of PEALD were compared with those of thermal atomic layer deposition (ThALD). X-ray photoelectron spectroscopy was performed to determine the bandgap energy of PEALD BeO (8.0 eV) and ThALD BeO (7.9 eV). Capacitance–voltage curves revealed that PEALD BeO had low hysteresis and frequency dispersion compared to ThALD BeO. In addition, PEALD showed a dielectric constant of 7.15 (at 1 MHz) and low leakage current (7.25×10-9 A/cm2 at -1 MV/cm). These results indicate that the highly activated radicals from oxygen plasma prompt the chemical reaction at the substrate, thus reducing nucleation delay and interface trap density.
       
  • Tuning of ionization potential in amorphous Cd–In–O thin films
    • Abstract: Publication date: Available online 18 September 2019Source: Solid-State ElectronicsAuthor(s): Minseok Kim, Hiroshi Yanagi Ionization potential is an important parameter for the design of semiconductor devices. Since amorphous semiconductors do not have long-range ordering and lattice constants, it is not necessary to consider lattice defects at interfaces. If the ionization potential can be controlled with such an amorphous semiconductor, the flexibility of the semiconductor device designs will expanded. This enables the fabrication of semiconductor devices such as light-emitting diodes, laser diodes, and solar cells. In this study, we fabricated n-type amorphous Cd–In–O films (a-CIO) on silica glass substrates using radio frequency magnetron sputtering at room temperature. The band gaps of these films increased from 2.6 to 3.0 eV with a decrease in the Cd concentration (Cd/(Cd + In)). Ip (energy difference between the vacuum level (Evac) and the valence band maximum) and electron affinity (the difference between the Evac and the conduction band minimum) were measured using a combination of ultraviolet photoelectron spectroscopy and optical spectroscopy techniques. Ips were controlled by the Cd concentration in films without a shift in electron affinities. The results suggest that the a-CIO films are suitable for the design of semiconductor devices such as solar cells, where tuning the Ip is important.
       
  • Indirect Avalanche Event Detection of Single Photon Avalanche Diode
           Implemented in CMOS FDSOI Technology
    • Abstract: Publication date: Available online 14 September 2019Source: Solid-State ElectronicsAuthor(s): Tulio Chaves de Albuquerque, Dylan Issartel, Raphaël Clerc, Patrick Pittet, Rémy Cellier, Dominique Golanski, Sébastien Jouan, Andreia Cathelin, Francis Calmon In this letter, a novel indirect avalanche event detection is proposed and demonstrated for Single Photon Avalanche Diodes (SPADs) implemented in CMOS 28 nm Fully Depleted Silicon-On-Insulator (FDSOI) technology. This approach is based on the capacitive coupling between the P-well, i.e. SPAD anode, and the transistor channel, separated by the ultra-thin buried oxide. The associated body-biasing effect is used to dynamically modulate the output of a simple voltage divider synchronously with the SPAD activity. A test-chip has been designed, fabricated and characterized to validate the proposed approach. This novel architecture opens the way for innovative SPAD processing circuitry implemented in 3D native CMOS FDSOI.
       
  • Design Guideline of Tunnel Field-Effect Transistors (TFETs) Considering
           Negative Differential Transconductance (NDT)
    • Abstract: Publication date: Available online 11 September 2019Source: Solid-State ElectronicsAuthor(s): Jang Woo Lee, Woo Young Choi A gate-normal tunnel field-effect transistor (TFET) showing negative differential transconductance (NDT) and its design guideline are proposed. The introduction of the source depletion to the gate-normal TFETs leads to negative differential transconductance. It is also confirmed that the NDT of the proposed gate-normal TFET is successfully enhanced by modulating gate-induced source depletion effects.
       
  • Analytic Model of Spalling Technique for Thickness-Controlled Separation
           of Single-Crystalline Semiconductor Layers
    • Abstract: Publication date: Available online 10 September 2019Source: Solid-State ElectronicsAuthor(s): Honghwi Park, Changhee Lim, Chang-Ju Lee, Muhan Choi, Sunghwan Jung, Hongsik Park Thickness-controlled separation of a thin layer of single-crystalline semiconductors from its bulk substrate is being developed for co-integration of compound semiconductors with silicon-based integrated-circuit (IC) chips and fabrication of high-performance flexible devices. Recently, a controlled spalling technique that can mechanically separate single-crystalline semiconductor layers has been actively demonstrated because of the process simplicity and the less limitation in materials. Here, we developed an analytic model that can precisely estimate the spalling depth. In this model, the spalling depth was calculated from the thermodynamic equilibrium condition in which total strain energy accumlated in a separated layer is balanced with the crystal binding energy. We empirically investigated the dependence of the spalling depth on the stressor layer thickness and stress, and we compared the empirical results with the suggested analytic model. We also verified that the crack initiation angle of the spalling process is determined by the binding energy contrast in the main crystal orientations in the semiconductor.
       
  • Improved Organic Solar Cell by Incorporating Silver Nanoparticles Embedded
           Polyaniline as Buffer Layer
    • Abstract: Publication date: Available online 10 September 2019Source: Solid-State ElectronicsAuthor(s): S.A. Moiz, A.N.M. Ahmadi, Kh.S. Karimov The role of silver nanoparticles (AgNP) in polyaniline (PANI) as buffer layer for ITO/AgNP-PANI/PANI/Al solar cell was investigated. It is observed that AgNP-PANI buffer layer significantly improves the electrical parameters such as diode-ideality factor, series-resistance, energy-barrier height, and shunt-resistance as a growing function of AgNP concentration. On-the-other hand oppose to the dark current-voltage response, 0.5% concentration of AgNP in buffer layer shows the most optimum photovoltaic response and cause to increase the power conversion efficiency (PCE) nearly 5 times compared to same solar cell without buffer layer. Such improvements in electrical parameters can be interpreted as the reduction in interfacial trap states as well as enhancement in interfacial dipole-moment by AgNP embedded buffer layer for given photovoltaic device. While, the observed optimum photovoltaic behavior at 0.5% AgNP concentration is may be due to the trade-offs between gains and losses for optical absorption enhancement, self-absorption heating and interface recombination losses respectively. It is also observed that the AgNP embedded PANI buffer layer approach is an effective solution to lower the photovoltaic degradation and hence improves the stability of the photovoltaic devices.
       
  • A Physical and Versatile Aging Compact Model for Hot Carrier Degradation
           in SiGe HBTs under Dynamic Operating Conditions
    • Abstract: Publication date: Available online 6 September 2019Source: Solid-State ElectronicsAuthor(s): C. Mukherjee, F. Marc, M. Couret, G.G. Fischer, M. Jaoul, D. Céli, K. Aufinger, T. Zimmer, C. Maneux This paper presents a new physics-based compact model implementation for interface state creation due to hot-carrier degradation in advanced SiGe HBTs. This model accounts for dynamic stress bias conditions through a combination of the solution of reaction-diffusion theory and Fick’s law of diffusion. The model reflects transistor degradation in terms of base recombination current parameters of HiCuM compact model and its accuracy has been validated against results from long-term DC and dynamic aging tests performed close to the safe-operating-areas of various HBT technologies.
       
  • Capacitance-Voltage Technique for Characterization of Lateral Trap
           Locations along the Channel in Low-Temperature Poly-Silicon Thin Film
           Transistors
    • Abstract: Publication date: Available online 5 September 2019Source: Solid-State ElectronicsAuthor(s): Han Bin Yoo, Junyeap Kim, Jintae Yu, Hyo-Jin Kim, Sung-Jin Choi, Dae Hwan Kim, Dong Myong Kim This study introduces a characterization technique for trap locations (Xt) with considerable trap density along the channel in field effect transistors (FETs). The technique is based on the experimental gate-to-source or gate-to-drain capacitance-voltage (CGS-VGS or CGD-VGD) characteristics of FETs. As the gate bias (VG) increases, the effective channel length (Leff) extends by the increased conductivity of the channel from the source or the drain. Due to trapped charges at the trap sites with a high density of traps along the channel, abrupt change in the C-V characteristics is observed. For the transition gate bias (VG,t) with abrupt change in the C-V characteristics, the dominant trap location (Xt) can be converted through the channel conduction factor (α(VG) to be the effective channel length Leff(VG)=α(VG)∙Lch). We expect that the proposed C-V technique to be useful in non-destructive electrical characterization of lateral trap locations (interface states, bulk traps, and/or grain boundary traps caused by the bias stress and/or fabrication process) along the channel in FETs. We successfully applied the proposed technique to the p-channel poly-Si thin-film transistors (TFTs) for characterization of the grain boundary locations along the channel. As an example for the proposed technique, we applied the technique to a p-channel poly-Si TFT and obtained a dominant trap at XGB1=3.13 [μm] from the source and another at XGB2=3.70 [μm] from the drain.
       
  • Improving the Signal Resolution of Semiconductor Gas Sensors to
           High-Concentration Gases
    • Abstract: Publication date: Available online 4 September 2019Source: Solid-State ElectronicsAuthor(s): Xinyuan Zhou, Liping Yang, Yuzhi Bian, Ying Wang, Ning Han, Yunfa Chen Detecting high-concentration gases is challenging by metal oxide semiconductor (MOX) gas sensors, because the voltage signal would become saturated. In order to solve this problem, the zooming p+n field-effect transistors (FETs) circuit has been designed, combining an n-type enhancement-mode FET (EMFET) and a p-type depletion-mode FET (DMFET). This designed zooming p+n FETs can endow MOX gas sensors with the high signal resolution of ∼3.0 V/decade to the 100–2 000 ppm (part per million) acetone gas, triple that of MOX gas sensors without FETs (∼0.8 V/decade). Meanwhile, this zooming technology is also suitable for detecting other gases at high-concentration, such as 1%–20% LEL (lower explosion limit) methane. The principle of zooming p+n FETs is that with increasing the gas concentration, the suppressing role of the EMFET is firstly induced leading to a reduced signal resolution to the low-concentration target gas; then its suppressing effect becomes saturated and the DMFET starts to switch from ON state to OFF state in the high-concentration target gas, resulting in an amplifying effect herein and thus an enhanced signal resolution. This circuit is promising for the high-concentration gas detection as well as for the multi-functional gas detector design.
       
  • Effects of Recess Depths on Performance of AlGaN/GaN Power MIS-HEMTs on
           the Si Substrates and Threshold Voltage Model of Different Recess Depths
           for the Using HfO2 Gate Insulator
    • Abstract: Publication date: Available online 3 September 2019Source: Solid-State ElectronicsAuthor(s): Yaopeng Zhao, Chong Wang, Xuefeng Zheng, Xiaohua Ma, Yunlong He, Kai Liu, Ang Li, Yue Peng, Chunfu Zhang, Yue Hao Three types of E-mode AlGaN/GaN MIS-HEMTs with different barrier depths and conventional HEMT were fabricated on the Si substrates. HfO2 gate insulator with a thickness of 30 nm was grown by plasma enhanced atomic layer deposited (PEALD). Characteristics of the four devices with different recess depths are analyzed. The MIS-HEMT with barrier layer thickness of 3 nm features good comprehensive performance. The threshold voltage (Vth) is 1.8V, the drain current density is 480 mA/mm and the figure of merit (FOM) is 363 MW/cm2. When the barrier thickness is 0 nm, the Vth is up to 3.7 V. A calculation model of threshold voltage for recessed MIS-HEMTs is proposed. When the barrier layer thickness is 6 nm, the calculated value of Vth was 0.3 V which is in good match with the experimental value of 0.4V. The proposed model provides guidelines for the AlGaN/GaN MIS-HEMTs designs.
       
  • Improved electrical performance of MOCVD-grown GaN p-i-n diodes with
           high-low junction p-layers
    • Abstract: Publication date: Available online 3 September 2019Source: Solid-State ElectronicsAuthor(s): Jennifer Howell-Clark, Zhibo Guo, Christian Wetzel, T. Paul Chow, Piao Guanxi, Yoshiki Yano, Toshiya Tabuchi, Koh Matsumoto We report that using a high/low p-type junction anode structure results in improved hole injection over a uniformly-doped p-anode layer in GaN pin junction diodes. Quasi-vertical diodes with a 20 nm thick, magnesium concentration of 2 x 1020 cm-3 layer on top of a 480 nm thick layer with a magnesium concentration of 1018 cm-3 show greatly increased forward current density - more than 100x higher - than those with a 500 nm thick uniformly 3 x 1019 cm-3 Mg-doped p-layer. Forward knee voltage and ideality factor are reduced by a factor of more than two, and reverse leakage current density is also reduced. Additionally, the specific differential series resistance is reduced significantly. With photoluminescence measurements, we found that these improvements are largely due to improved p-GaN material quality of the high/low junction sample with lower average Mg concentration.
       
  • Novel logic device for CMOS standard I/O cell with tolerance to total
           ionizing dose effects
    • Abstract: Publication date: Available online 31 August 2019Source: Solid-State ElectronicsAuthor(s): Minwoong Lee, Seongik Cho, Namho Lee, Jongyeol Kim This paper deals with a radiation hardening technology for the logic in a commercial CMOS bulk process and the possibility to develop a radiation-hardened (RH) logic standard cell to design RH-integrated circuits (ICs) for a total ionizing dose (TID) environment. We designed a RH logic structure that can be used in a standard I/O cell form by expanding/modifying the RH I-gate n-MOSFET, which was complemented with the IC design complexity of conventional RH n-MOSFETs with a layout modification technique. The radiation-tolerance characteristics of the RH inverter, NAND and NOR were predicted and verified using the radiation effects 3D modeling and simulation (M&S) technique. The RH logic chip was fabricated in SKhynix/Magnachip 0.18 um CMOS process. The test evaluation of the TID effects on the chip was conducted using Cobalt 60 Gamma-ray of 10 kGy(Si)/h for 2 hours. As a result, up to total dose of 20 kGy(Si), a radiation damage of the regular logic and a radiation tolerance characteristics of the proposed logic were confirmed. These results will contribute greatly to the design of ICs for nuclear power plants as well as for military and space applications.Graphical abstractGraphical abstract for this article
       
  • Performance Analysis of Parallel Array of Nanowires and a Nanosheet in SG,
           DG and GAA FETs
    • Abstract: Publication date: Available online 27 August 2019Source: Solid-State ElectronicsAuthor(s): Ghader Darbandy, Sven Mothes, Michael Schröter, Alexander Kloes, Martin Claus Multiple arrays of Si nanowires are required for high performance applications with high current drive requirements. Densely packed arrays are significantly affected by electrostatic screening effects deteriorating the DC and AC performance of the individual nanowire (NW). This study compares the impact of screening effects in single gate, double gate and gate all-around nanowire FETs with nanosheet FETs based on experimental data and calibrated TCAD simulation results. Moreover, evolving the NW array into nanosheet transistors turned out to yield superior performance and thus might be a candidate for future high performance electronics. We identified NW pitches of less than four times the NW diameter to be critical for the performance of an individual NW in the array with a NW performance degradation of up to 50%. However, the performance gain by having more NWs within the same area in a densely packed array overcompensates the performance drop of the individuals NWs in the array.
       
  • A unified method to extract the effective mobility in InGaAs
           metal-insulator-semiconductor field-effect-transistors using
           scattering-parameters
    • Abstract: Publication date: Available online 27 August 2019Source: Solid-State ElectronicsAuthor(s): Tae-Beom Rho, Hyeon-Bhin Jo, Tae-Woo Kim, Dae-Hyun Kim In this letter, we propose a unified method to extract the effective mobility (μeff) of In0.52Al0.48As/In0.7Ga0.3As/In0.52Al0.48As single-quantum-well (SQW) metal-insulator-semiconductor field-effect-transistors (MISFETs). The proposed method relies only on the measured high-frequency scattering-parameters (S-parameters) of the MISFETs in the linear regime. Two key metrics of MOS devices, intrinsic output conductance (go_i) and intrinsic gate capacitance (Cg_i), were extracted directly from the measured S-parameters using two-port network parameter theories, allowing us to compute the effective mobility of the MOS devices. Since the method only requires the small-signal S-parameter measurement data, it would be applicable to any kind of FETs and could be fruitful for studying the dependence of the effective mobility on lateral electric field intensity.
       
  • Modelling and analysis of gate leakage current and its wafer level
           variability in advanced FD-SOI MOSFETs
    • Abstract: Publication date: Available online 26 August 2019Source: Solid-State ElectronicsAuthor(s): Krishna Pradeep, Thierry Poiroux, Patrick Scheer, André Juge, Gérard Ghibaudo The gate leakage current in advanced FD-SOI devices are investigated using systematic measurements on multiple geometry devices from 14 nm node. A simple model with an equivalent trapezoidal barrier based on WKB approximation is introduced and verified on the different measurements. The wafer level variability of the leakage current is explored using statistical modelling and the simple model for gate leakage current. The pure physical sources of variation are identified and the scaling trends of the standard deviations of the sources are analysed. The methodology and models have been validated also on 28 nm node devices.
       
  • Impact of Connection Areas on the Electrical Behaviour of FET Contact
           Trenches with Increasing Aspect Ratio
    • Abstract: Publication date: Available online 22 August 2019Source: Solid-State ElectronicsAuthor(s): Diana Hößler Due to the persistent reduction of semiconductor device dimensions, the design has a major influence on the performance characteristics of novel vertical field effect transistor (FET) structures. Thus, one objective of this paper is to design the local connection areas to meet electrical requirements on a minimal area while still providing a large surface area. The considered test structure has electrical connections at the contact bottom and at the sidewall. The electrical properties of two contact trenches, which may realize source and drain areas, their metallization as well as intermediate doped areas are characterized and evaluated based on models and measurements. The proposed method of determining the resistance of both the interface and the diffusion area allows for detecting and preventing significant impurities. In order to realize the required small structure dimensions and their functionality, different diffusion area widths from 0.3 µm to 0.8 µm and different trench depths up to 2.5 µm are investigated. It is shown that the contact sidewalls significantly influence the resistance above the trench depth. On the other hand, it is proved that the contact trench bottom of the considered structure has an influence of 3 Ω on the total resistance of the diffusion region. The results obtained by simulation, Scanning Spreading Resistance Microscopy, and by the model calculation match closely, which thus offer promising approaches for the characterization of FET structures.
       
  • Buried SiGe as a Performance Booster in n-channel FDSOI MOSFETs
    • Abstract: Publication date: Available online 20 August 2019Source: Solid-State ElectronicsAuthor(s): Paul Clifton, Andreas Goebel, Robert Mulfinger, Amy Child, Sherry Straub, Ryan Sporer, Rick Carter, Jon Kluth, Jamie Schaeffer, Bich-Yen Nguyen, Guillaume Chabanne, Nicolas Daval, Walter Schwarzenbach, Manish Hemkar, Schubert Chu, Steve Moffatt We report for the first time the implementation of SiGe buried stressors in the context of research and development of an advanced foundry FDSOI process and the observation of improved transconductance and current drive performance of n-channel FDSOI MOSFETs. Epitaxial SiGe stressors grown by CVD at Applied Materials were incorporated under the buried oxide of 300 mm FDSOI wafers by Soitec using lower temperature SOI bonding, splitting and thinning processes and the wafers were subsequently processed through an FDSOI development line at GLOBALFOUNDRIES. The use of FDSOI with buried stressor under the BOX eliminates the risk of extended defects in the epitaxial SiGe layer penetrating up into the SOI channel and also provides an opportunity to obtain a high level of strain in any semiconductor on insulator. A 70 nm thick SiGe buried stressor with 20% Ge is shown to provide a 10% improvement in Idsat at a fixed Ioff for n-FETs with 20 nm gate length and transconductance, gm is correspondingly improved by 15%.
       
  • An improved empirical nonlinear model for InP-based HEMTs
    • Abstract: Publication date: Available online 11 May 2019Source: Solid-State ElectronicsAuthor(s): Zhong Yinghui, Wang Wenbin, Yang Jie, Sun Shuxiang, Chang Mingming, Duan Zhiyong, Jin Zhi, Ding Peng In this paper, an improved nonlinear model is proposed for self-developed on wafer InAlAs/InGaAs InP-based high election mobility transistors (HEMTs) over a wide operating bias range based on EEHEMT model, including non-linear channel current model and gate charge model. Actually, the knee voltage (Vsat) increases linearly with gate-source voltage (VGS) and finally approaches to saturation with the finite Si-doping density. Thereby, a hyperbolic tangent function (tanh) is used to describe the changing relationship, rather than idealized into a constant value with gate bias. Besides, a piecewise function is constructed to depict the variation of gate capacitance with bias voltage. Specifically, a third-order formula is utilized to accurately and simply characterize the downswing trend of gate capacitance with channel carrier density, which behaves as an effective extension of gate charge model at relatively large gate-source bias. Therefore, the improved model has shown a better accuracy between simulated and measured data with smaller error factor in output current, S-parameters, stability factor and frequency characteristics. The accurate and suitable empirical large-signal model for InP-based HEMTs would be of great significance on design of high-frequency nonlinear circuits.
       
 
 
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