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  Subjects -> COMPUTER SCIENCE (Total: 1969 journals)
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    - COMPUTER SCIENCE (1147 journals)
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COMPUTER SCIENCE (1147 journals)                  1 2 3 4 5 6 | Last

Showing 1 - 200 of 872 Journals sorted alphabetically
3D Printing and Additive Manufacturing     Full-text available via subscription   (Followers: 11)
Abakós     Open Access   (Followers: 3)
Academy of Information and Management Sciences Journal     Full-text available via subscription   (Followers: 67)
ACM Computing Surveys     Hybrid Journal   (Followers: 23)
ACM Journal on Computing and Cultural Heritage     Hybrid Journal   (Followers: 8)
ACM Journal on Emerging Technologies in Computing Systems     Hybrid Journal   (Followers: 13)
ACM Transactions on Accessible Computing (TACCESS)     Hybrid Journal   (Followers: 4)
ACM Transactions on Algorithms (TALG)     Hybrid Journal   (Followers: 16)
ACM Transactions on Applied Perception (TAP)     Hybrid Journal   (Followers: 6)
ACM Transactions on Architecture and Code Optimization (TACO)     Hybrid Journal   (Followers: 9)
ACM Transactions on Autonomous and Adaptive Systems (TAAS)     Hybrid Journal   (Followers: 7)
ACM Transactions on Computation Theory (TOCT)     Hybrid Journal   (Followers: 11)
ACM Transactions on Computational Logic (TOCL)     Hybrid Journal   (Followers: 4)
ACM Transactions on Computer Systems (TOCS)     Hybrid Journal   (Followers: 18)
ACM Transactions on Computer-Human Interaction     Hybrid Journal   (Followers: 12)
ACM Transactions on Computing Education (TOCE)     Hybrid Journal   (Followers: 3)
ACM Transactions on Design Automation of Electronic Systems (TODAES)     Hybrid Journal   (Followers: 1)
ACM Transactions on Economics and Computation     Hybrid Journal  
ACM Transactions on Embedded Computing Systems (TECS)     Hybrid Journal   (Followers: 4)
ACM Transactions on Information Systems (TOIS)     Hybrid Journal   (Followers: 19)
ACM Transactions on Intelligent Systems and Technology (TIST)     Hybrid Journal   (Followers: 9)
ACM Transactions on Interactive Intelligent Systems (TiiS)     Hybrid Journal   (Followers: 4)
ACM Transactions on Multimedia Computing, Communications, and Applications (TOMCCAP)     Hybrid Journal   (Followers: 10)
ACM Transactions on Reconfigurable Technology and Systems (TRETS)     Hybrid Journal   (Followers: 7)
ACM Transactions on Sensor Networks (TOSN)     Hybrid Journal   (Followers: 8)
ACM Transactions on Speech and Language Processing (TSLP)     Hybrid Journal   (Followers: 10)
ACM Transactions on Storage     Hybrid Journal  
ACS Applied Materials & Interfaces     Full-text available via subscription   (Followers: 21)
Acta Automatica Sinica     Full-text available via subscription   (Followers: 3)
Acta Universitatis Cibiniensis. Technical Series     Open Access  
Ad Hoc Networks     Hybrid Journal   (Followers: 11)
Adaptive Behavior     Hybrid Journal   (Followers: 10)
Advanced Engineering Materials     Hybrid Journal   (Followers: 24)
Advanced Science Letters     Full-text available via subscription   (Followers: 5)
Advances in Adaptive Data Analysis     Hybrid Journal   (Followers: 8)
Advances in Artificial Intelligence     Open Access   (Followers: 14)
Advances in Artificial Neural Systems     Open Access   (Followers: 4)
Advances in Calculus of Variations     Hybrid Journal   (Followers: 2)
Advances in Catalysis     Full-text available via subscription   (Followers: 5)
Advances in Computational Mathematics     Hybrid Journal   (Followers: 15)
Advances in Computer Science : an International Journal     Open Access   (Followers: 13)
Advances in Computing     Open Access   (Followers: 3)
Advances in Data Analysis and Classification     Hybrid Journal   (Followers: 53)
Advances in Engineering Software     Hybrid Journal   (Followers: 25)
Advances in Geosciences (ADGEO)     Open Access   (Followers: 9)
Advances in Human Factors/Ergonomics     Full-text available via subscription   (Followers: 23)
Advances in Human-Computer Interaction     Open Access   (Followers: 19)
Advances in Materials Sciences     Open Access   (Followers: 16)
Advances in Operations Research     Open Access   (Followers: 11)
Advances in Parallel Computing     Full-text available via subscription   (Followers: 7)
Advances in Porous Media     Full-text available via subscription   (Followers: 4)
Advances in Remote Sensing     Open Access   (Followers: 35)
Advances in Science and Research (ASR)     Open Access   (Followers: 6)
Advances in Technology Innovation     Open Access  
AEU - International Journal of Electronics and Communications     Hybrid Journal   (Followers: 8)
African Journal of Information and Communication     Open Access   (Followers: 6)
African Journal of Mathematics and Computer Science Research     Open Access   (Followers: 4)
Air, Soil & Water Research     Open Access   (Followers: 7)
AIS Transactions on Human-Computer Interaction     Open Access   (Followers: 6)
Algebras and Representation Theory     Hybrid Journal   (Followers: 1)
Algorithms     Open Access   (Followers: 9)
American Journal of Computational and Applied Mathematics     Open Access   (Followers: 3)
American Journal of Computational Mathematics     Open Access   (Followers: 4)
American Journal of Information Systems     Open Access   (Followers: 6)
American Journal of Sensor Technology     Open Access   (Followers: 2)
Anais da Academia Brasileira de Ciências     Open Access   (Followers: 2)
Analog Integrated Circuits and Signal Processing     Hybrid Journal   (Followers: 5)
Analysis in Theory and Applications     Hybrid Journal  
Animation Practice, Process & Production     Hybrid Journal   (Followers: 5)
Annals of Combinatorics     Hybrid Journal   (Followers: 3)
Annals of Data Science     Hybrid Journal   (Followers: 8)
Annals of Mathematics and Artificial Intelligence     Hybrid Journal   (Followers: 6)
Annals of Pure and Applied Logic     Open Access   (Followers: 2)
Annals of Software Engineering     Hybrid Journal   (Followers: 12)
Annual Reviews in Control     Hybrid Journal   (Followers: 6)
Anuario Americanista Europeo     Open Access  
Applicable Algebra in Engineering, Communication and Computing     Hybrid Journal   (Followers: 2)
Applied and Computational Harmonic Analysis     Full-text available via subscription   (Followers: 2)
Applied Artificial Intelligence: An International Journal     Hybrid Journal   (Followers: 13)
Applied Categorical Structures     Hybrid Journal   (Followers: 2)
Applied Clinical Informatics     Hybrid Journal   (Followers: 1)
Applied Computational Intelligence and Soft Computing     Open Access   (Followers: 12)
Applied Computer Systems     Open Access   (Followers: 1)
Applied Informatics     Open Access  
Applied Mathematics and Computation     Hybrid Journal   (Followers: 31)
Applied Medical Informatics     Open Access   (Followers: 9)
Applied Numerical Mathematics     Hybrid Journal   (Followers: 5)
Applied Soft Computing     Hybrid Journal   (Followers: 16)
Applied Spatial Analysis and Policy     Hybrid Journal   (Followers: 4)
Architectural Theory Review     Hybrid Journal   (Followers: 3)
Archive of Applied Mechanics     Hybrid Journal   (Followers: 4)
Archive of Numerical Software     Open Access  
Archives of Computational Methods in Engineering     Hybrid Journal   (Followers: 4)
Artifact     Hybrid Journal   (Followers: 2)
Artificial Life     Hybrid Journal   (Followers: 5)
Asia Pacific Journal on Computational Engineering     Open Access  
Asia-Pacific Journal of Information Technology and Multimedia     Open Access   (Followers: 1)
Asian Journal of Computer Science and Information Technology     Open Access  
Asian Journal of Control     Hybrid Journal  
Assembly Automation     Hybrid Journal   (Followers: 2)
at - Automatisierungstechnik     Hybrid Journal   (Followers: 1)
Australian Educational Computing     Open Access  
Automatic Control and Computer Sciences     Hybrid Journal   (Followers: 3)
Automatic Documentation and Mathematical Linguistics     Hybrid Journal   (Followers: 5)
Automatica     Hybrid Journal   (Followers: 8)
Automation in Construction     Hybrid Journal   (Followers: 6)
Autonomous Mental Development, IEEE Transactions on     Hybrid Journal   (Followers: 7)
Basin Research     Hybrid Journal   (Followers: 3)
Behaviour & Information Technology     Hybrid Journal   (Followers: 52)
Bioinformatics     Hybrid Journal   (Followers: 231)
Biomedical Engineering     Hybrid Journal   (Followers: 16)
Biomedical Engineering and Computational Biology     Open Access   (Followers: 13)
Biomedical Engineering, IEEE Reviews in     Full-text available via subscription   (Followers: 16)
Biomedical Engineering, IEEE Transactions on     Hybrid Journal   (Followers: 31)
Briefings in Bioinformatics     Hybrid Journal   (Followers: 45)
British Journal of Educational Technology     Hybrid Journal   (Followers: 118)
Broadcasting, IEEE Transactions on     Hybrid Journal   (Followers: 10)
c't Magazin fuer Computertechnik     Full-text available via subscription   (Followers: 1)
CALCOLO     Hybrid Journal  
Calphad     Hybrid Journal  
Canadian Journal of Electrical and Computer Engineering     Full-text available via subscription   (Followers: 12)
Catalysis in Industry     Hybrid Journal   (Followers: 1)
CEAS Space Journal     Hybrid Journal  
Cell Communication and Signaling     Open Access   (Followers: 1)
Central European Journal of Computer Science     Hybrid Journal   (Followers: 5)
Chaos, Solitons & Fractals     Hybrid Journal   (Followers: 3)
Chemometrics and Intelligent Laboratory Systems     Hybrid Journal   (Followers: 15)
ChemSusChem     Hybrid Journal   (Followers: 7)
China Communications     Full-text available via subscription   (Followers: 7)
Chinese Journal of Catalysis     Full-text available via subscription   (Followers: 2)
CIN Computers Informatics Nursing     Full-text available via subscription   (Followers: 12)
Circuits and Systems     Open Access   (Followers: 13)
Clean Air Journal     Full-text available via subscription   (Followers: 2)
CLEI Electronic Journal     Open Access  
Clin-Alert     Hybrid Journal   (Followers: 1)
Cluster Computing     Hybrid Journal   (Followers: 1)
Cognitive Computation     Hybrid Journal   (Followers: 4)
COMBINATORICA     Hybrid Journal  
Combustion Theory and Modelling     Hybrid Journal   (Followers: 13)
Communication Methods and Measures     Hybrid Journal   (Followers: 11)
Communication Theory     Hybrid Journal   (Followers: 18)
Communications Engineer     Hybrid Journal   (Followers: 1)
Communications in Algebra     Hybrid Journal   (Followers: 3)
Communications in Partial Differential Equations     Hybrid Journal   (Followers: 3)
Communications of the ACM     Full-text available via subscription   (Followers: 47)
Communications of the Association for Information Systems     Open Access   (Followers: 18)
COMPEL: The International Journal for Computation and Mathematics in Electrical and Electronic Engineering     Hybrid Journal   (Followers: 3)
Complex & Intelligent Systems     Open Access  
Complex Adaptive Systems Modeling     Open Access  
Complex Analysis and Operator Theory     Hybrid Journal   (Followers: 2)
Complexity     Hybrid Journal   (Followers: 6)
Complexus     Full-text available via subscription  
Composite Materials Series     Full-text available via subscription   (Followers: 9)
Computación y Sistemas     Open Access  
Computation     Open Access  
Computational and Applied Mathematics     Hybrid Journal   (Followers: 2)
Computational and Mathematical Methods in Medicine     Open Access   (Followers: 2)
Computational and Mathematical Organization Theory     Hybrid Journal   (Followers: 2)
Computational and Structural Biotechnology Journal     Open Access   (Followers: 2)
Computational and Theoretical Chemistry     Hybrid Journal   (Followers: 9)
Computational Astrophysics and Cosmology     Open Access  
Computational Biology and Chemistry     Hybrid Journal   (Followers: 12)
Computational Chemistry     Open Access   (Followers: 2)
Computational Cognitive Science     Open Access   (Followers: 1)
Computational Complexity     Hybrid Journal   (Followers: 4)
Computational Condensed Matter     Open Access  
Computational Ecology and Software     Open Access   (Followers: 8)
Computational Economics     Hybrid Journal   (Followers: 9)
Computational Geosciences     Hybrid Journal   (Followers: 12)
Computational Linguistics     Open Access   (Followers: 23)
Computational Management Science     Hybrid Journal  
Computational Mathematics and Modeling     Hybrid Journal   (Followers: 8)
Computational Mechanics     Hybrid Journal   (Followers: 4)
Computational Methods and Function Theory     Hybrid Journal  
Computational Molecular Bioscience     Open Access   (Followers: 2)
Computational Optimization and Applications     Hybrid Journal   (Followers: 7)
Computational Particle Mechanics     Hybrid Journal   (Followers: 1)
Computational Research     Open Access   (Followers: 1)
Computational Science and Discovery     Full-text available via subscription   (Followers: 2)
Computational Science and Techniques     Open Access  
Computational Statistics     Hybrid Journal   (Followers: 13)
Computational Statistics & Data Analysis     Hybrid Journal   (Followers: 27)
Computer     Full-text available via subscription   (Followers: 78)
Computer Aided Surgery     Hybrid Journal   (Followers: 3)
Computer Applications in Engineering Education     Hybrid Journal   (Followers: 6)
Computer Communications     Hybrid Journal   (Followers: 10)
Computer Engineering and Applications Journal     Open Access   (Followers: 5)
Computer Journal     Hybrid Journal   (Followers: 8)
Computer Methods in Applied Mechanics and Engineering     Hybrid Journal   (Followers: 22)
Computer Methods in Biomechanics and Biomedical Engineering     Hybrid Journal   (Followers: 10)
Computer Methods in the Geosciences     Full-text available via subscription   (Followers: 1)
Computer Music Journal     Hybrid Journal   (Followers: 13)
Computer Physics Communications     Hybrid Journal   (Followers: 6)
Computer Science - Research and Development     Hybrid Journal   (Followers: 7)
Computer Science and Engineering     Open Access   (Followers: 17)
Computer Science and Information Technology     Open Access   (Followers: 10)
Computer Science Education     Hybrid Journal   (Followers: 12)
Computer Science Journal     Open Access   (Followers: 20)
Computer Science Master Research     Open Access   (Followers: 9)
Computer Science Review     Hybrid Journal   (Followers: 10)

        1 2 3 4 5 6 | Last

Journal Cover Analog Integrated Circuits and Signal Processing
  [SJR: 0.21]   [H-I: 37]   [5 followers]  Follow
    
   Hybrid Journal Hybrid journal (It can contain Open Access articles)
   ISSN (Print) 1573-1979 - ISSN (Online) 0925-1030
   Published by Springer-Verlag Homepage  [2329 journals]
  • Design and implementation of a 94 GHz CMOS down-conversion mixer with
           integrated miniature planar baluns for image radar sensors
    • Authors: Yo-Sheng Lin; Kai-Siang Lan; Chien-Chin Wang; Guo-Hao Li
      Pages: 353 - 365
      Abstract: A 94 GHz down-conversion mixer for image radar sensors using standard 90 nm CMOS technology is reported. The down-conversion mixer comprises a double-balanced Gilbert cell with peaking inductors between RF transconductance stage and LO switching transistors for conversion gain (CG) enhancement and noise figure suppression, a miniature planar balun for converting the single RF input signals to differential signals, another miniature planar balun for converting the single LO input signals to differential signals, and an IF amplifier. The mixer consumes 22.5 mW and achieves excellent RF-port input reflection coefficient of −10 to −35.9 dB for frequencies of 87.6–104.4 GHz, and LO-port input reflection coefficient of −10 to −31.9 dB for frequencies of 88.2–110 GHz. In addition, the mixer achieves CG of 4.9–7.9 dB for frequencies of 81.8–105.8 GHz (the corresponding 3-dB CG bandwidth is 24 GHz) and LO–RF isolation of 37.7–47.5 dB for frequencies of 80–110 GHz, one of the best CG and LO–RF isolation results ever reported for a down-conversion mixer with operation frequency around 94 GHz. Furthermore, the mixer achieves an excellent input third-order intercept point of −3 dBm at 94 GHz. These results demonstrate the proposed down-conversion mixer architecture is promising for 94 GHz image radar sensors.
      PubDate: 2017-06-01
      DOI: 10.1007/s10470-017-0966-7
      Issue No: Vol. 91, No. 3 (2017)
       
  • D-band neutralized amplifier design based on accurate millimeter-wave
           de-embedding method
    • Authors: Xiangyu Meng; Baoyong Chi; Zhihua Wang
      Pages: 367 - 376
      Abstract: A D-band neutralized amplifier design methodology based on accurate millimeter-wave de-embedding method is proposed. A neutralized amplifier stage using magnetic coupled configuration is introduced and its small signal equivalent circuit is analyzed in details. The neutralized network cancels the effects of the transistor gate-drain capacitor Cgd and boosts the maximum available gain of the amplifier stage to its maximum achievable gain. To achieve the expectable measured results, a millimeter-wave de-embedding method based on the transmission line model is developed. The transmission matrixes of the test structure are analyzed and the simulation results are used to prove the advantage of the de-embedding method in D-band. Implemented in 65 nm CMOS, 6 amplifier stages with different parameters are embedded into the proposed test structure. The measured results after the de-embedding calibration show a good agreement with the simulated results of the corresponding amplifier stages. Based on the proposed design methodology, one complete D-band amplifier has been implemented and achieves a gain of 13.78 dB at 157 GHz, with only 23.28 mW DC power consumption from a 1.2 V power supply.
      PubDate: 2017-06-01
      DOI: 10.1007/s10470-017-0961-z
      Issue No: Vol. 91, No. 3 (2017)
       
  • Divide-by-2 injection-locked frequency divider implemented with two shunt
           4th-order LC resonators
    • Authors: Sheng-Lyang Jang; Chou-Ming Chang; Miin-Horng Juang
      Pages: 377 - 383
      Abstract: A triple-band divide-by-2 LC injection-locked frequency divider (ILFD) was implemented in the TSMC 0.18 μm 1P6M CMOS process, and it uses a cross-coupled nMOS pair and two shunt 4th order LC resonators to form a 6th order resonator with three resonant frequencies. Measured data has shown that the ILFD has three locking ranges at fixed bias condition or by varactor bias switching.
      PubDate: 2017-06-01
      DOI: 10.1007/s10470-017-0953-z
      Issue No: Vol. 91, No. 3 (2017)
       
  • Time-interleaved pulse-shrinking time-to-digital converter with reduced
           conversion time
    • Authors: Young Jun Park; Fei Yuan
      Pages: 385 - 398
      Abstract: A silicon-efficient time-interleaved pulse-shrinking time-to-digital converter (TDC) is proposed. The proposed TDC consists of a 16-stage coarse pulse-shrinking TDC with constant per-stage shrinkage 4.8 ns and a pair of 16-stage fine pulse-shrinking TDCs operated in a time-interleaved manner with constant per-stage shrinkage 296 ps. A simple residual time extraction method is proposed to extract the residual pulse of the coarse TDC simultaneously with digitization carried out by the TDC so that the digitization can be carried out by both the coarse and fine TDCs simultaneously to minimize conversion time. The characteristics of the proposed TDC including silicon consumption, power consumption, conversion time, jitter, and mismatch-induced timing errors are investigated. The proposed TDC was implemented in an IBM 130 nm 1.2 V CMOS technology. Simulation results show that the TDC offers 0.296–76.8 ns dynamic range, 850 ps conversion time, 0.285 LSB differential nonlinearity, and 0.78 LSB integral nonlinearity while consuming 7 mW.
      PubDate: 2017-06-01
      DOI: 10.1007/s10470-017-0949-8
      Issue No: Vol. 91, No. 3 (2017)
       
  • Improved double noise coupling ΔΣ analog-to-digital converter
    • Authors: Youngho Jung; Gabor C. Temes
      Pages: 399 - 402
      Abstract: In Jung et al. (Electron Lett 48(10):557–558, 1), a double noise coupling scheme was proposed for ΔΣ analog-to-digital converters (ADCs) to achieve wideband and high accuracy performance combined with low power consumption. In this paper, an improved version of double noise coupling ΔΣ ADC is presented. The improved architecture reduces the power consumption significantly, by reducing the output swing of the second integrator in the modulator. Also, the improved double noise coupling ΔΣ ADC relaxes the feedback timing of the modulator using a triple sampling technique (Kanazawa et al. in IEEE Custom Integrated Circuit Conference, 2). Thus, there is no need to have high-speed comparator and DEM circuitry even for high-speed applications. By using both techniques, the performance of the double noise coupling ΔΣ ADC can be improved significantly.
      PubDate: 2017-06-01
      DOI: 10.1007/s10470-017-0955-x
      Issue No: Vol. 91, No. 3 (2017)
       
  • Design of integrated neural stimulating and recording frontend for bladder
           control prosthesis
    • Authors: Wanjun Tao; Fei Li; Chenhao Wang; Guiming Tu; Zhigong Wang; Xiaoying Lü
      Pages: 403 - 416
      Abstract: Functional electrical stimulation has been widely used for the restoration of bladder functions after spinal cord injury or other neurological disorders. However, most of the neuroprostheses for bladder control are still imperfect due to lack of the feedback information about the state of the controlled bladder. The purpose of this study is to develop an implantable system which allows us to stimulate the nerves and record the nerve signals related to the condition of the bladder. The proposed stimulator consists of three parts: a digital-to-analog converter (DAC), a current driver, and a switch network. Using the same current source with a switch network eliminates the need for separate current sources for anodic and cathodic sections and reduce the need for interconnect lines of control signals which is an area-saved and power-efficient configuration. A symmetrical regulated cascode current driver is used to implement a high voltage compliance and a high output impedance which improves its ability with load. The amplitude, frequency and the pulse width of the stimulating current are adjusted by encoding the DAC and switch sequences, respectively. In addition, we also present two-stage fully differential capacitively-coupled amplifiers for neural recording. The neural amplifier’s parameters are carefully chosen according to the characteristics of neural signal; meanwhile, we analyzed theoretically the main noise sources, especially the pseudo-resistor in the feedback path which gives little attention by previous studies. The integrated neural stimulating and recording frontend for bladder control prosthesis has been designed and simulated, using a TSMC’s 0.18-μm CMOS process. The proposed stimulator can provide a symmetrical cathodic-first biphasic current pulse with interphasic gap, a low headroom voltage of 0.168 V corresponding to 2.48 mA full-scale current, an adjustable pulse width of 100–500 μs and frequency of 1–40 Hz. The recording amplifier with a low input-referred noise of 3.62 μV, an NEF of 3.88 and a low power dissipation of 7.2 μW has a gain of 61.6 dB and a frequency bandwidth from 300 Hz to 5.3 kHz. Both circuit analysis and simulations are presented to examine the performance of the proposed designs.
      PubDate: 2017-06-01
      DOI: 10.1007/s10470-017-0962-y
      Issue No: Vol. 91, No. 3 (2017)
       
  • Design and analysis of energy recyclable bidirectional converter with
           digital controller for multichannel microstimulators
    • Authors: Paul Jung-Ho Lee; Man-Kay Law; Amine Bermak
      Pages: 417 - 431
      Abstract: The power supply modulated microstimulator system can drive an expandable electrode array with reduced heat generation across the current drivers and high stimulation efficiency. Here, we present a comprehensive analytical modelling of the system to investigate internal and external energy flow during biphasic stimulation pulses spanning over varying loading configurations (e.g. number of electrodes, and stimulation current amplitude) that were not covered by existing works on the power supply modulated microstimulators. This paper fills the research gap by presenting the systematic tools for attaining insights of a stimulator system featuring a bidirectional DC–DC converter with an algorithmic digital controller. The models employed here are based on traditional analytical methods such as transfer functions and state-space dynamic models incorporating various circuit elements incurring power loss. With the models, the behaviour and power efficiency under a wide range of parameters associated with stimulator are attained. Numerical assessment reveals that the digital controller can track the output supply voltage at the phase transition boundaries just in tens of switching cycles. The system was also studied on a verification platform, where the internal signals of the digital controller were carefully examined. Measurement results show that the system behavior well matched to the simulation results, demonstrating the effectiveness of the analytical system model for obtaining key insights for generic large-scale micro-stimulator designs.
      PubDate: 2017-06-01
      DOI: 10.1007/s10470-017-0960-0
      Issue No: Vol. 91, No. 3 (2017)
       
  • A 0.6 V and 0.395 pJ/bit nonius TDC for a passive RFID pressure
           sensor tag
    • Authors: Ainara Jimenez; Andoni Beriain; Juan Francisco Sevillano; Ivan Rebollo; Roc Berenguer
      Pages: 433 - 444
      Abstract: This work presents a nonius time to digital converter (TDC) adapted to a passive RF identification (RFID) pressure sensor tag. The proposed converter exploits the characteristics of time-based sensor interfaces and allows reducing voltage supply and power consumption while maintaining resolution and conversion efficiency. The nonius TDC has been designed and fabricated using the TSMC 90 nm standard CMOS technology. The main blocks of the converter are described and both the resolution adjustment and measurement processes are explained in detail. Measurement results show 10.49 bits of effective resolution for an input time range from 28.19 to 42.93 μs. With a sampling rate of 19 KS/s the converter has a conversion efficiency of 0.395 pJ/bit with a voltage supply of only 0.6 V. This characteristics in the proposed nonius TDC enables an increased reading range of the passive RFID pressure sensor tag.
      PubDate: 2017-06-01
      DOI: 10.1007/s10470-017-0954-y
      Issue No: Vol. 91, No. 3 (2017)
       
  • A new switched current circuit fault diagnosis approach based on
           pseudorandom test and preprocess by using entropy and Haar wavelet
           transform
    • Authors: Ying Long; Yuejun Xiong; Yigang He; Zhen Zhang
      Pages: 445 - 461
      Abstract: This paper presents a new switched current (SI) circuit fault diagnosis approach based on pseudorandom test and preprocess by using entropy and Haar wavelet transform. The proposed method has the capability to detect and identify faulty transistors in SI circuit by analyzing its time response. The use of pseudorandom sequences as a stimulate signal to SI circuit reduces the cost of testing and the overhead of the test generation circuit, and using entropy and Haar wavelet transform to preprocess the time response for feature extraction drastically improves the fault diagnosis efficiency. For both actual experiment and analysis of switched current filters in Z transform (ASIZ) simulation, a low-pass, a band-pass SI filter and a clock feed-through cancellation circuit have been used as test examples to verify the effectiveness of the proposed method. The result shows that the accuracy of fault recognition achieved is about 100% by analyzing low-frequency approximations entropy and high-frequency details entropy. Therefore, it indicates that the presented method is superior than other methods.
      PubDate: 2017-06-01
      DOI: 10.1007/s10470-017-0950-2
      Issue No: Vol. 91, No. 3 (2017)
       
  • A high performance CNFET-based operational transconductance amplifier and
           its applications
    • Authors: Mingcan Cen; Shuxiang Song; Chaobo Cai
      Pages: 463 - 472
      Abstract: High performance electronic systems face several challenges in driving innovative integrated circuits when the internal transistors are scaled down below 45 nm. Carbon nanotube field effect transistors (CNFETs) are considered as excellent candidates for building energy-efficient electronic systems in the near future, due to their unique characteristics such as ballistic transport, scalability, and better channel electrostatics. In this paper, a new high performance operational transconductance amplifier (OTA) based on 32 nm CNFET devices is presented. The proposed OTA maintains a highly linear wide continuous tuning range and a wide frequency response range, enabled by splitting the linear voltage-to-current conversion and tuning two different blocks. As an application, a universal second-order transconductance-capacitor (G m  − C) filter realized using the OTA is introduced. Simulation results show that the CNFET-based OTA offers very a low current consumption of 2.35 μA from a ± 0.9 V power supply, achieves a bandwidth of 9.5 MHz, and has an input dynamic range of ± 0.2 V.
      PubDate: 2017-06-01
      DOI: 10.1007/s10470-017-0951-1
      Issue No: Vol. 91, No. 3 (2017)
       
  • A highly linear wideband 0.3-to-2.7 GHz variable-gain amplifier
    • Authors: Vahid Asgari; Leonid Belostotski
      Pages: 473 - 478
      Abstract: A design of a differential variable-gain amplifier (VGA) with high IP3 (third-order intercept point) is discussed. To improve IP3, the third-order intermodulation products, which are generated by both an intrinsic third-order nonlinearity and a second-order interaction of a transistor, are minimized by using a nonlinear conductance. Unlike prior methods, the proposed method enables the achievement of both constant and broadband IP3 for various VGA gain settings. A design example with virtual but realistic BSIM4 transistor models is discussed to verify the analysis. The resultant amplifier example was designed and simulated in a 28-nm FDSOI CMOS technology. The amplifier achieved more than 15 dBm input-referred IP3 across a 2.4-GHz bandwidth from 0.3-to-2.7 GHz with a variable gain of 0-to-8.5 dB while consuming 3.3 mA from a 1.5-V supply.
      PubDate: 2017-06-01
      DOI: 10.1007/s10470-017-0948-9
      Issue No: Vol. 91, No. 3 (2017)
       
  • New two-CFOA-based floating immittance simulators
    • Authors: Muhammad Taher Abuelma’atti; Sagar Kumar Dhar; Zainulabideen Jamal Khalifa
      Pages: 479 - 489
      Abstract: This paper presents new topologies for emulating floating immittance functions using three to five passive elements and only two current-feedback operational-amplifiers (CFOAs). The feasibility of using only two CFOAs and two passive components is explored. The proposed topologies can emulate lossy positive and negative inductances and capacitance-, inductance-, resistance-multipliers, and frequency dependent negative and positive conductances. The functionality of the proposed circuits was experimentally verified using the commercially available AD844 CFOA. The experimental results are in excellent agreement with theoretical calculations.
      PubDate: 2017-06-01
      DOI: 10.1007/s10470-017-0956-9
      Issue No: Vol. 91, No. 3 (2017)
       
  • Ultra-low-power capacitor-splitting switching algorithm with minus energy
           for SAR ADCs
    • Authors: Hao Wang; Lungui Zhong; Shaofeng Zheng
      Pages: 491 - 495
      Abstract: In this letter, an ultra-low-power capacitor-splitting switching algorithm for successive approximation register analog-to-digital converters is proposed. To achieve low power, the first three bit cycles consume no power from the reference by introducing minus energy during the third bit cycle and proper switching algorithm. To further reduce the switching energy, only single-side capacitors are switched from the forth bit cycle. Besides, to add one bit, the dummy capacitor is realized by four unit capacitors and switched to generate the least significant bit. Compared to the Sanyal and Sun switching technique, the proposed capacitor switching method achieves 94.19% energy saving and 47.66% capacitor area reduction.
      PubDate: 2017-06-01
      DOI: 10.1007/s10470-017-0957-8
      Issue No: Vol. 91, No. 3 (2017)
       
  • LC-VCOs using spiral inductors with single- and dual-layer patterned
           floating shields: a comparative study
    • Authors: Chee Cheow Lim; Harikrishnan Ramiah; Jun Yin; Pui-In Mak; Rui P. Martins
      Pages: 497 - 502
      Abstract: This letter studies and compares class-B VCOs using spiral inductors with the proposed dual-layer patterned floating shield (DL-PFS) and conventional single-layer patterned floating shield (SL-PFS). The proposed DL-PFS technique utilizes two lowest metal layers to effectively reduce the capacitive induced current to the substrate in an on-chip spiral inductor, thereby boosts its Q-factor by 40% when compared with the conventional SL-PFS approach. We fabricated, as a proof of concept, the class-B LC-VCOs using the DL-PFS and SL-PFS in 0.13 µm CMOS. Operating at 10 GHz, the VCO with the DL-PFS inductor measures a 3.6 dB phase noise (PN) improvement at the same power consumption of 2.12 mW. Specifically, the VCO with DL-PFS inductor is tunable from 9.3-to-10.1 GHz and measured PN at 10 GHz is −132.5 dBc/Hz at 10 MHz offset while consuming 2.12 mW at the lowest 0.6 V supply. The achieved figure-of-merit (187.4 dBc/Hz@1 MHz offset) compares favorably with the recent state-of-the-art.
      PubDate: 2017-06-01
      DOI: 10.1007/s10470-017-0958-7
      Issue No: Vol. 91, No. 3 (2017)
       
  • High-speed single-channel SAR ADC with a novel control logic in 65 nm
           CMOS
    • Authors: Tao Wang; Zhangming Zhu; Liang Zhang; Yintang Yang
      Pages: 503 - 511
      Abstract: This paper presents an 8-bit 320 MS/s single-channel successive approximation register (SAR) analog-to-digital converter (ADC) with low power consumption. Through a procedure of splitting all the most significant bit (MSB) capacitors except the least significant bit (LSB) capacitor into two equal sub-capacitors and reusing the terminal capacitor, the average switching energy and total capacitance can be reduced by about 87 and 50% respectively compared to the conventional procedure. Meanwhile, high-speed operation can be achieved by using a novel SAR control logic featuring efficient hardware cost and small critical path delay. In addition, this paper analyzes how to obtain the value of the unit capacitance which exhibits trade-offs between conversion rate, power consumption and linearity performance. The SAR ADC is simulated in 65 nm CMOS technology. It can achieve 48.63 dB SNDR, 63.61 dB SFDR at a supply voltage of 1.2 V and sampling frequency of 320 MS/s for near-Nyquist input, consuming 2.59 mW of power and with a FoM of 37 fJ/conversion-step.
      PubDate: 2017-06-01
      DOI: 10.1007/s10470-017-0964-9
      Issue No: Vol. 91, No. 3 (2017)
       
  • Minimum energy point tracking based on adaptive voltage scaling circuit
    • Authors: Dongjun Wang; Ping Luo; Yi Bao; Shaowei Zhen; Yajuan He
      Abstract: In order to realize the low-voltage and low-power dissipation designing of digital circuits, minimum energy point tracking (MEPT) based on adaptive voltage scaling (AVS) circuit is proposed in this paper. With process, voltage and temperature and frequency variance, the supply voltage of digital circuits is decreased dramatically by AVS, and equals to minimum voltage point (MVP), and advantageously in reducing dynamic energy consumption. Based on the MVP, in order to effectively decrease energy consumption of digital circuits, minimum energy point (MEP) of digital circuits is searched via comparing energy dissipation under different supply voltage by MEPT. Therefore, the supply voltage and energy consumption of digital circuits are decreased dramatically by the proposed novel circuit. The proposed circuit has been implemented and fabricated in a standard 0.18 μm CMOS process. The experimental results show that, when operating frequency of load keeps 1.319 MHz, the MVP and MEP of load are 425 and 450 mV, respectively. For operation frequency 5.334 MHz, the MEP changes from 625 to 550 mV with the degree of activity of load difference. Comparing with the traditional fixed voltage circuits, the maximum saving 91% of dynamic energy is realized by the proposed circuit.
      PubDate: 2017-05-13
      DOI: 10.1007/s10470-017-0986-3
       
  • 99.8% energy saving and 97.4% area reduction switching scheme for SAR ADCs
    • Authors: Donglin Zhu; Ruixue Ding; Zhangming Zhu
      Abstract: A high energy and area efficiency switching scheme for successive approximation register (SAR) analog-to-digital converter (ADC) is presented. The proposed procedure achieved 99.8% saving in switching energy and 97.4% reduction in total capacitance when applied to a 10-bit SAR ADC, compared to the conventional switching scheme. The switching energy has been calculated by taking into account both the power consumed in the switching processes and the reset energy.
      PubDate: 2017-05-12
      DOI: 10.1007/s10470-017-0987-2
       
  • A 90–96 GHz CMOS down-conversion mixer with high conversion gain and
           excellent LO–RF isolation
    • Authors: Yo-Sheng Lin; Ming-Huang Kao; Hou-Ru Pan; Kai-Siang Lan
      Abstract: A 90–96 GHz down-conversion mixer for 94 GHz image radar sensors using standard 90 nm CMOS technology is reported. RF negative resistance compensation technique, i.e. NMOS LC-oscillator-based RF transconductance (GM) stage load, is used to increase the output impedance and suppress the feedback capacitance Cgd of RF GM stage. Hence, conversion gain (CG), noise figure (NF) and LO–RF isolation of the mixer can be enhanced. The mixer consumes 15 mW and achieves excellent RF-port input reflection coefficient of −10 to −36.4 dB for frequencies of 85–105 GHz. The corresponding -10 dB input matching bandwidth is 20 GHz. In addition, for frequencies of 90–96 GHz, the mixer achieves CG of 6.3–9 dB (the corresponding 3-dB CG bandwidth is greater than 6 GHz) and LO–RF isolation of 40–45.1 dB, one of the best CG and LO–RF isolation results ever reported for a down-conversion mixer with operation frequency around 94 GHz. Furthermore, the mixer achieves an excellent input third-order intercept point of 1 dBm at 94 GHz. These results demonstrate the proposed down-conversion mixer architecture is very promising for 94 GHz image radar sensors.
      PubDate: 2017-05-12
      DOI: 10.1007/s10470-017-0988-1
       
  • A low-power low-jitter DLL with a differential closed-loop duty cycle
           corrector
    • Authors: Majid Jalalifar; Gyung-Su Byun
      Abstract: A low-power low-jitter delay locked loop (DLL) with a first order differential closed-loop duty cycle corrector (DCC) is presented in this paper. The proposed DCC has a differential closed-loop structure that corrects the input clock duty cycle from 10 to 90%. To have a wide range DLL, a low-power voltage control delay line using wide bandwidth and large tuning range delay cells is employed. The proposed DLL has been fabricated in a 0.13 μm CMOS process technology with an active Si area of 0.11 mm2. The measured results show the DLL exhibits a lock range of 0.1–1.2 GHz while the peak-to peak jitter and rms jitter are 7.3 and 1.2 ps at 1.2 GHz, respectively. The total power dissipated by the DLL is 4.8 mW with 1.2 V supply voltage at 1.2 GHz.
      PubDate: 2017-05-05
      DOI: 10.1007/s10470-017-0984-5
       
  • A self-duty-cycled 7.2–8.5 GHz IR-UWB receiver for low power and low
           data rate applications
    • Authors: Nicolas Dehaese; Inès Ben Amor; Ndiogou Tall; Jean Gaubert; Rémy Vauché; Sylvain Bourdel
      Abstract: A self-duty-cycled non-coherent impulse radio-ultra wideband receiver targeted at low-power and low-data-rate applications is presented. The receiver is implemented in a 130 nm CMOS technology and works in the 7.2–8.5 GHz UWB band, which covers the IEEE 802.15.4a and 802.15.6 mandatories high-band channels. The receiver architecture is based on a non-coherent RF front-end (high gain LNA and pulse detector) followed by a synchronizer block (clock and data recovery or CDR function and window generation block), which enables to shut down the power-hungry LNA between pulses to strongly reduce the receiver power consumption. The main functions of the receiver, i.e. the RF front-end and the CDR block, were measured stand-alone. A maximum gain of 40 dB at 7.2 GHz is measured for the LNA. The RF front-end achieves a very low turn-on time (<1 ns) and an average sensitivity of −92 dBm for a 10−3 BER at a 1 Mbps data rate. A root-mean-square (RMS) jitter of 7.9 ns is measured for the CDR for a power consumption of 54 µW. Simulation results of the fully integrated self-duty-cycled 7.2–8.5 GHz IR-UWB receiver (that includes the measured main functions) confirm the expected performances. The synchronizer block consumes only 125 µW and the power consumption of the whole receiver is 1.8 mW for a 3% power duty-cycle (on-window of 30 ns).
      PubDate: 2017-05-05
      DOI: 10.1007/s10470-017-0985-4
       
 
 
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