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  Subjects -> COMPUTER SCIENCE (Total: 1996 journals)
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COMPUTER SCIENCE (1162 journals)                  1 2 3 4 5 6 | Last

Showing 1 - 200 of 872 Journals sorted alphabetically
3D Printing and Additive Manufacturing     Full-text available via subscription   (Followers: 13)
Abakós     Open Access   (Followers: 4)
ACM Computing Surveys     Hybrid Journal   (Followers: 23)
ACM Journal on Computing and Cultural Heritage     Hybrid Journal   (Followers: 9)
ACM Journal on Emerging Technologies in Computing Systems     Hybrid Journal   (Followers: 13)
ACM Transactions on Accessible Computing (TACCESS)     Hybrid Journal   (Followers: 3)
ACM Transactions on Algorithms (TALG)     Hybrid Journal   (Followers: 16)
ACM Transactions on Applied Perception (TAP)     Hybrid Journal   (Followers: 6)
ACM Transactions on Architecture and Code Optimization (TACO)     Hybrid Journal   (Followers: 9)
ACM Transactions on Autonomous and Adaptive Systems (TAAS)     Hybrid Journal   (Followers: 7)
ACM Transactions on Computation Theory (TOCT)     Hybrid Journal   (Followers: 12)
ACM Transactions on Computational Logic (TOCL)     Hybrid Journal   (Followers: 4)
ACM Transactions on Computer Systems (TOCS)     Hybrid Journal   (Followers: 18)
ACM Transactions on Computer-Human Interaction     Hybrid Journal   (Followers: 14)
ACM Transactions on Computing Education (TOCE)     Hybrid Journal   (Followers: 5)
ACM Transactions on Design Automation of Electronic Systems (TODAES)     Hybrid Journal   (Followers: 1)
ACM Transactions on Economics and Computation     Hybrid Journal  
ACM Transactions on Embedded Computing Systems (TECS)     Hybrid Journal   (Followers: 4)
ACM Transactions on Information Systems (TOIS)     Hybrid Journal   (Followers: 21)
ACM Transactions on Intelligent Systems and Technology (TIST)     Hybrid Journal   (Followers: 8)
ACM Transactions on Interactive Intelligent Systems (TiiS)     Hybrid Journal   (Followers: 3)
ACM Transactions on Multimedia Computing, Communications, and Applications (TOMCCAP)     Hybrid Journal   (Followers: 10)
ACM Transactions on Reconfigurable Technology and Systems (TRETS)     Hybrid Journal   (Followers: 7)
ACM Transactions on Sensor Networks (TOSN)     Hybrid Journal   (Followers: 9)
ACM Transactions on Speech and Language Processing (TSLP)     Hybrid Journal   (Followers: 11)
ACM Transactions on Storage     Hybrid Journal  
ACS Applied Materials & Interfaces     Full-text available via subscription   (Followers: 25)
Acta Automatica Sinica     Full-text available via subscription   (Followers: 3)
Acta Universitatis Cibiniensis. Technical Series     Open Access  
Ad Hoc Networks     Hybrid Journal   (Followers: 11)
Adaptive Behavior     Hybrid Journal   (Followers: 11)
Advanced Engineering Materials     Hybrid Journal   (Followers: 26)
Advanced Science Letters     Full-text available via subscription   (Followers: 9)
Advances in Adaptive Data Analysis     Hybrid Journal   (Followers: 8)
Advances in Artificial Intelligence     Open Access   (Followers: 16)
Advances in Calculus of Variations     Hybrid Journal   (Followers: 2)
Advances in Catalysis     Full-text available via subscription   (Followers: 5)
Advances in Computational Mathematics     Hybrid Journal   (Followers: 15)
Advances in Computer Science : an International Journal     Open Access   (Followers: 14)
Advances in Computing     Open Access   (Followers: 2)
Advances in Data Analysis and Classification     Hybrid Journal   (Followers: 51)
Advances in Engineering Software     Hybrid Journal   (Followers: 26)
Advances in Geosciences (ADGEO)     Open Access   (Followers: 10)
Advances in Human Factors/Ergonomics     Full-text available via subscription   (Followers: 26)
Advances in Human-Computer Interaction     Open Access   (Followers: 20)
Advances in Materials Sciences     Open Access   (Followers: 16)
Advances in Operations Research     Open Access   (Followers: 11)
Advances in Parallel Computing     Full-text available via subscription   (Followers: 7)
Advances in Porous Media     Full-text available via subscription   (Followers: 4)
Advances in Remote Sensing     Open Access   (Followers: 39)
Advances in Science and Research (ASR)     Open Access   (Followers: 6)
Advances in Technology Innovation     Open Access   (Followers: 3)
AEU - International Journal of Electronics and Communications     Hybrid Journal   (Followers: 8)
African Journal of Information and Communication     Open Access   (Followers: 8)
African Journal of Mathematics and Computer Science Research     Open Access   (Followers: 4)
Air, Soil & Water Research     Open Access   (Followers: 9)
AIS Transactions on Human-Computer Interaction     Open Access   (Followers: 6)
Algebras and Representation Theory     Hybrid Journal   (Followers: 1)
Algorithms     Open Access   (Followers: 11)
American Journal of Computational and Applied Mathematics     Open Access   (Followers: 4)
American Journal of Computational Mathematics     Open Access   (Followers: 4)
American Journal of Information Systems     Open Access   (Followers: 5)
American Journal of Sensor Technology     Open Access   (Followers: 4)
Anais da Academia Brasileira de Ciências     Open Access   (Followers: 2)
Analog Integrated Circuits and Signal Processing     Hybrid Journal   (Followers: 7)
Analysis in Theory and Applications     Hybrid Journal   (Followers: 1)
Animation Practice, Process & Production     Hybrid Journal   (Followers: 5)
Annals of Combinatorics     Hybrid Journal   (Followers: 3)
Annals of Data Science     Hybrid Journal   (Followers: 11)
Annals of Mathematics and Artificial Intelligence     Hybrid Journal   (Followers: 7)
Annals of Pure and Applied Logic     Open Access   (Followers: 2)
Annals of Software Engineering     Hybrid Journal   (Followers: 13)
Annual Reviews in Control     Hybrid Journal   (Followers: 6)
Anuario Americanista Europeo     Open Access  
Applicable Algebra in Engineering, Communication and Computing     Hybrid Journal   (Followers: 2)
Applied and Computational Harmonic Analysis     Full-text available via subscription   (Followers: 1)
Applied Artificial Intelligence: An International Journal     Hybrid Journal   (Followers: 13)
Applied Categorical Structures     Hybrid Journal   (Followers: 2)
Applied Clinical Informatics     Hybrid Journal   (Followers: 2)
Applied Computational Intelligence and Soft Computing     Open Access   (Followers: 12)
Applied Computer Systems     Open Access   (Followers: 1)
Applied Informatics     Open Access  
Applied Mathematics and Computation     Hybrid Journal   (Followers: 33)
Applied Medical Informatics     Open Access   (Followers: 11)
Applied Numerical Mathematics     Hybrid Journal   (Followers: 5)
Applied Soft Computing     Hybrid Journal   (Followers: 16)
Applied Spatial Analysis and Policy     Hybrid Journal   (Followers: 4)
Architectural Theory Review     Hybrid Journal   (Followers: 3)
Archive of Applied Mechanics     Hybrid Journal   (Followers: 5)
Archive of Numerical Software     Open Access  
Archives and Museum Informatics     Hybrid Journal   (Followers: 134)
Archives of Computational Methods in Engineering     Hybrid Journal   (Followers: 4)
Artifact     Hybrid Journal   (Followers: 2)
Artificial Life     Hybrid Journal   (Followers: 7)
Asia Pacific Journal on Computational Engineering     Open Access  
Asia-Pacific Journal of Information Technology and Multimedia     Open Access   (Followers: 1)
Asian Journal of Computer Science and Information Technology     Open Access  
Asian Journal of Control     Hybrid Journal  
Assembly Automation     Hybrid Journal   (Followers: 2)
at - Automatisierungstechnik     Hybrid Journal   (Followers: 1)
Australian Educational Computing     Open Access   (Followers: 1)
Automatic Control and Computer Sciences     Hybrid Journal   (Followers: 4)
Automatic Documentation and Mathematical Linguistics     Hybrid Journal   (Followers: 5)
Automatica     Hybrid Journal   (Followers: 11)
Automation in Construction     Hybrid Journal   (Followers: 6)
Autonomous Mental Development, IEEE Transactions on     Hybrid Journal   (Followers: 8)
Basin Research     Hybrid Journal   (Followers: 5)
Behaviour & Information Technology     Hybrid Journal   (Followers: 52)
Biodiversity Information Science and Standards     Open Access  
Bioinformatics     Hybrid Journal   (Followers: 272)
Biomedical Engineering     Hybrid Journal   (Followers: 15)
Biomedical Engineering and Computational Biology     Open Access   (Followers: 14)
Biomedical Engineering, IEEE Reviews in     Full-text available via subscription   (Followers: 17)
Biomedical Engineering, IEEE Transactions on     Hybrid Journal   (Followers: 33)
Briefings in Bioinformatics     Hybrid Journal   (Followers: 45)
British Journal of Educational Technology     Hybrid Journal   (Followers: 128)
Broadcasting, IEEE Transactions on     Hybrid Journal   (Followers: 10)
c't Magazin fuer Computertechnik     Full-text available via subscription   (Followers: 2)
CALCOLO     Hybrid Journal  
Calphad     Hybrid Journal  
Canadian Journal of Electrical and Computer Engineering     Full-text available via subscription   (Followers: 14)
Capturing Intelligence     Full-text available via subscription  
Catalysis in Industry     Hybrid Journal   (Followers: 1)
CEAS Space Journal     Hybrid Journal   (Followers: 1)
Cell Communication and Signaling     Open Access   (Followers: 1)
Central European Journal of Computer Science     Hybrid Journal   (Followers: 5)
CERN IdeaSquare Journal of Experimental Innovation     Open Access  
Chaos, Solitons & Fractals     Hybrid Journal   (Followers: 3)
Chemometrics and Intelligent Laboratory Systems     Hybrid Journal   (Followers: 14)
ChemSusChem     Hybrid Journal   (Followers: 7)
China Communications     Full-text available via subscription   (Followers: 7)
Chinese Journal of Catalysis     Full-text available via subscription   (Followers: 2)
CIN Computers Informatics Nursing     Full-text available via subscription   (Followers: 12)
Circuits and Systems     Open Access   (Followers: 16)
Clean Air Journal     Full-text available via subscription   (Followers: 2)
CLEI Electronic Journal     Open Access  
Clin-Alert     Hybrid Journal   (Followers: 1)
Cluster Computing     Hybrid Journal   (Followers: 1)
Cognitive Computation     Hybrid Journal   (Followers: 4)
COMBINATORICA     Hybrid Journal  
Combustion Theory and Modelling     Hybrid Journal   (Followers: 13)
Communication Methods and Measures     Hybrid Journal   (Followers: 12)
Communication Theory     Hybrid Journal   (Followers: 20)
Communications Engineer     Hybrid Journal   (Followers: 1)
Communications in Algebra     Hybrid Journal   (Followers: 3)
Communications in Partial Differential Equations     Hybrid Journal   (Followers: 3)
Communications of the ACM     Full-text available via subscription   (Followers: 54)
Communications of the Association for Information Systems     Open Access   (Followers: 18)
COMPEL: The International Journal for Computation and Mathematics in Electrical and Electronic Engineering     Hybrid Journal   (Followers: 3)
Complex & Intelligent Systems     Open Access  
Complex Adaptive Systems Modeling     Open Access  
Complex Analysis and Operator Theory     Hybrid Journal   (Followers: 2)
Complexity     Hybrid Journal   (Followers: 6)
Complexus     Full-text available via subscription  
Composite Materials Series     Full-text available via subscription   (Followers: 9)
Computación y Sistemas     Open Access  
Computation     Open Access  
Computational and Applied Mathematics     Hybrid Journal   (Followers: 2)
Computational and Mathematical Methods in Medicine     Open Access   (Followers: 2)
Computational and Mathematical Organization Theory     Hybrid Journal   (Followers: 2)
Computational and Structural Biotechnology Journal     Open Access   (Followers: 2)
Computational and Theoretical Chemistry     Hybrid Journal   (Followers: 9)
Computational Astrophysics and Cosmology     Open Access   (Followers: 1)
Computational Biology and Chemistry     Hybrid Journal   (Followers: 11)
Computational Chemistry     Open Access   (Followers: 2)
Computational Cognitive Science     Open Access   (Followers: 2)
Computational Complexity     Hybrid Journal   (Followers: 4)
Computational Condensed Matter     Open Access  
Computational Ecology and Software     Open Access   (Followers: 9)
Computational Economics     Hybrid Journal   (Followers: 9)
Computational Geosciences     Hybrid Journal   (Followers: 15)
Computational Linguistics     Open Access   (Followers: 23)
Computational Management Science     Hybrid Journal  
Computational Mathematics and Modeling     Hybrid Journal   (Followers: 8)
Computational Mechanics     Hybrid Journal   (Followers: 4)
Computational Methods and Function Theory     Hybrid Journal  
Computational Molecular Bioscience     Open Access   (Followers: 2)
Computational Optimization and Applications     Hybrid Journal   (Followers: 7)
Computational Particle Mechanics     Hybrid Journal   (Followers: 1)
Computational Research     Open Access   (Followers: 1)
Computational Science and Discovery     Full-text available via subscription   (Followers: 2)
Computational Science and Techniques     Open Access  
Computational Statistics     Hybrid Journal   (Followers: 13)
Computational Statistics & Data Analysis     Hybrid Journal   (Followers: 30)
Computer     Full-text available via subscription   (Followers: 87)
Computer Aided Surgery     Hybrid Journal   (Followers: 3)
Computer Applications in Engineering Education     Hybrid Journal   (Followers: 7)
Computer Communications     Hybrid Journal   (Followers: 10)
Computer Engineering and Applications Journal     Open Access   (Followers: 5)
Computer Journal     Hybrid Journal   (Followers: 8)
Computer Methods in Applied Mechanics and Engineering     Hybrid Journal   (Followers: 21)
Computer Methods in Biomechanics and Biomedical Engineering     Hybrid Journal   (Followers: 10)
Computer Methods in the Geosciences     Full-text available via subscription   (Followers: 1)
Computer Music Journal     Hybrid Journal   (Followers: 16)
Computer Physics Communications     Hybrid Journal   (Followers: 6)
Computer Science - Research and Development     Hybrid Journal   (Followers: 7)
Computer Science and Engineering     Open Access   (Followers: 17)
Computer Science and Information Technology     Open Access   (Followers: 12)
Computer Science Education     Hybrid Journal   (Followers: 13)
Computer Science Journal     Open Access   (Followers: 20)

        1 2 3 4 5 6 | Last

Journal Cover Analog Integrated Circuits and Signal Processing
  [SJR: 0.21]   [H-I: 37]   [7 followers]  Follow
   Hybrid Journal Hybrid journal (It can contain Open Access articles)
   ISSN (Print) 1573-1979 - ISSN (Online) 0925-1030
   Published by Springer-Verlag Homepage  [2354 journals]
  • Transmitter leakage cancellation technique for CMOS SAW-less radio
    • Authors: Maryamsadat Shokrekhodaei; Aminghasem Safarian; Mojtaba Atarodi
      Pages: 383 - 394
      Abstract: A novel method of transmitter (TX) leakage cancellation is presented to improve the dynamic range of the receiver for wideband code division multiple access applications. The large TX leakage is attenuated within the low noise amplifier (LNA) output using a feed-forward path without any LNA noise figure degradation. A prototype has been designed and laid out in 0.18 μm CMOS technology. It achieves a maximum TX rejection of 18.5 dB with only 5.2 mA current consumption from 1.8 V supply voltage. LNA P-1dBCP (1 dB gain compression point) against TX leakage improves by more than 10 dB. Post layout simulations verify these results. Proposed structure dispels the requirement of off-chip surface acoustic wave filter.
      PubDate: 2017-12-01
      DOI: 10.1007/s10470-017-1054-8
      Issue No: Vol. 93, No. 3 (2017)
  • Impulse response analysis of carrier-modulated multiband RF-interconnect
    • Authors: Yanghyo Kim; Wei-Han Cho; Yuan Du; Jason Cong; Tatsuo Itoh; Mau-Chung Frank Chang
      Pages: 395 - 413
      Abstract: Impulse response of energy-efficient multiband RF-interconnect (MRFI) is analyzed to quantify its information capacity for transmitting digital data via various types of physical wires. Our analyses in frequency domain (also transferrable to time domain if needed) indicate that a baseband-equivalent impulse response can be established for MRFI under coherently communicated systems. We can further express such response in an explicit form for MRFI with low-pass transmission nature. It also reveals its distinct capability in signal equalization as a result of its RF-carrier down-conversion process. Furthermore, the analysis offers a guidance of how to construct baseband-equivalent impulse response when transmission lines contain non-ideal effects such as frequency notches and in-band ripples.
      PubDate: 2017-12-01
      DOI: 10.1007/s10470-017-1058-4
      Issue No: Vol. 93, No. 3 (2017)
  • A subthreshold low-power CMOS LC-VCO with high immunity to PVT variations
    • Authors: Imen Ghorbel; Fayrouz Haddad; Wenceslas Rahajandraibe; Mourad Loulou
      Pages: 415 - 426
      Abstract: Internet of things is a topic of rising interest and intensive research, where power consumption is one of its most relevant challenges. This article presents a new radiofrequency subthreshold ultra low power LC voltage controlled oscillator (VCO). A graphical inductor optimization approach has been proposed and used to design the LC VCO leading to high performances in terms of power consumption, chip area and phase noise. It uses the adaptive body biasing technique to ensure high immunity to process, voltage and temperature variations. Realized in a 130 nm CMOS technology, the VCO occupies a total area of 0.234 mm2. The measured frequency varies between 2.34 and 2.43 GHz. The post-layout simulation results show a phase noise of −116.1 dBc/Hz @1 MHz offset frequency, while the measured phase noise is −107.36 @1 MHz due to noisy measuring environment. The presented VCO provides a measured power consumption of only 168 μW from 0.6 V supply voltage, making it suitable for ultra low power applications.
      PubDate: 2017-12-01
      DOI: 10.1007/s10470-017-1047-7
      Issue No: Vol. 93, No. 3 (2017)
  • Making use of semiconductor manufacturing process variations: FinFET-based
           physical unclonable functions for efficient security integration in the
    • Authors: Venkata P. Yanambaka; Saraju P. Mohanty; Elias Kougianos
      Pages: 429 - 441
      Abstract: In a typical design environment, semiconductor manufacturing variations are considered as challenges for nanoelectronic circuit design engineers. This has led to multi-front research on process variations analysis and its mitigations. As a paradigm shift of that trend the present article explores the use of semiconductor manufacturing variations for enhancing security of systems using FinFET technology as an example. FinFETs were introduced to replace high- \(\kappa \) transistors in nanoelectronic applications. From microprocessors to graphic processing units, FinFETs are being used commercially today. Along with the technological advancements in computing and networking, the number of cyber attacks has also increased. Simultaneously, numerous implementations of the Internet of Things are already present. In this environment, one small security flaw is enough to place the entire network in danger. Encrypting communications in such an environment is vital. Physical unclonable functions (PUFs) can be used to encrypt device to device communications and are the main focus of this paper. PUFs are hardware primitives which rely on semiconductor manufacturing variations to generate characteristics which are used for this purpose. Two different designs of a ring oscillator PUF are introduced, one with low power consumption trading off device performance and one high-performance trading off device power consumption. There is an 11% decrease in power consumption with the low power model along with a simple design and fabrication. Performance of the device can be increased with almost no increase in power consumption.
      PubDate: 2017-12-01
      DOI: 10.1007/s10470-017-1053-9
      Issue No: Vol. 93, No. 3 (2017)
  • A fast training method for memristor crossbar based multi-layer neural
    • Authors: Raqibul Hasan; Tarek M. Taha; Chris Yakopcic
      Pages: 443 - 454
      Abstract: Memristor crossbar arrays carry out multiply–add operations in parallel in the analog domain which is the dominant operation in a neural network application. On-chip training of memristor neural network systems have the significant advantage of being able to get around device variability and faults. This paper presents a novel technique for on-chip training of multi-layer neural networks implemented using a single crossbar per layer and two memristors per synapse. Using two memristors per synapse provides double the synaptic weight precision when compared to a design that uses only one memristor per synapse. Proposed system utilizes a novel variant of the back-propagation (BP) algorithm to reduce both circuit area and training time. During training, all the memristors in a crossbar are updated in four steps in parallel. We evaluated the training of the proposed system with some nonlinearly separable datasets through detailed SPICE simulations which take crossbar wire resistance and sneak-paths into consideration. The proposed training algorithm trained the nonlinearly separable functions with a slight loss in accuracy compared to training with the traditional BP algorithm.
      PubDate: 2017-12-01
      DOI: 10.1007/s10470-017-1051-y
      Issue No: Vol. 93, No. 3 (2017)
  • Performance and simulation accuracy evaluation of analog circuits with
           enclosed layout transistors
    • Authors: Guilherme S. Cardoso; Tiago R. Balen
      Pages: 455 - 466
      Abstract: This paper presents an investigation on two important issues related to the application of enclosed layout transistor (ELT) to the design of analog building blocks: the performance impacts, related to the geometrical asymmetry and capacitances of drain and source terminals and the possible errors of commercial design tools when performing the layout versus schematic and layout extraction tasks. A common-source (CS) amplifier is considered as case study, to which the ELT layout technique is applied. SPICE simulations are performed, considering different methodologies to estimate the effective aspect ratio (W/L) of the ELT devices. The extracted equivalent W/L using a commercial design tool is compared with well-known mathematical models presented in the literature. Simulations were carried out considering three different channel lengths for the CS amplifier. The possibility of setting the transistor drain as inner or outer terminal of the ELT was also investigated. According to obtained results, considering a 0.18 µm technology, there may be significant performance differences, both in DC and AC behavior of the amplifier, and significant divergences of the extracted W/L, when compared to the analyzed models. Additionally, in order to improve the achievable aspect ratio range of square ELTs, we propose to use parallel and series associations of enclosed devices. Depending on the desired W/L, it is also possible to save silicon area with such associations.
      PubDate: 2017-12-01
      DOI: 10.1007/s10470-017-1050-z
      Issue No: Vol. 93, No. 3 (2017)
  • Analysis of effect of feedback current variation in CT Delta-Sigma
           modulators with Gm-C integrators
    • Authors: Hua Tang
      Pages: 467 - 476
      Abstract: In design of Continuous-time Delta-Sigma modulators, the feedback DAC (Digital-to-Analog Converter) is typically implemented with a switched current circuit. It is desired that these DAC current circuits provide constant current across clock cycles for each modulator output level. However, when Delta-Sigma modulators are implemented with Gm-C integrators, the DAC feedback current circuits are directly connected to the integrator outputs that may have high-swing voltages and this results in varying DAC feedback current. In this paper, we analyze the effect of feedback current variation caused by high-swing integrator output voltages in Delta-Sigma modulators built with Gm-C integrators. It is shown that feedback current variation may significantly degrade the performance of Delta-Sigma modulators mainly due to the non-linearity of current variation dependence on the integrator output voltage, while mismatch of current variation has minor effect.
      PubDate: 2017-12-01
      DOI: 10.1007/s10470-017-1049-5
      Issue No: Vol. 93, No. 3 (2017)
  • Parametric fault detection of analog circuits based on Bhattacharyya
    • Authors: Supriyo Srimani; Manas Kumar Parai; Kasturi Ghosh; Hafizur Rahaman
      Pages: 477 - 488
      Abstract: This paper presents a fault detection algorithm to detect parametric fault in linear and weakly non-linear analog circuits by Bhattacharyya measure, a statistical metric. Linear feedback shift register (LFSR) generated pseudo-random bit sequences are fed to digital-to-analog converter (DAC) to obtain random analog input stimuli for the circuit under test (CUT). Bhattacharyya coefficient is measured from the probability density function (PDF) of the output. The non-Gaussian auto-regressive model is used to estimate the PDF. Component tolerance is mapped into statistical space by Monte Carlo simulation. The proposed methodology is validated through three benchmark circuits: continuous-time low pass state variable filter circuit, fourth order low pass Chebyshev filter circuit and cascade amplifier. All the circuits are simulated with CADENCE Virtuoso using UMC-180nm technology. Defect screening is also measured with linear regression analysis. Detectability of the proposed method for parametric fault is reasonably large in comparison to functional test method.
      PubDate: 2017-12-01
      DOI: 10.1007/s10470-017-1052-x
      Issue No: Vol. 93, No. 3 (2017)
  • Design and analysis of high Transconductance Current Follower
           Transconductance Amplifier (CFTA) and its applications
    • Authors: Shweta Kumari; Maneesha Gupta
      Pages: 489 - 506
      Abstract: A high transconductance Current Follower Transconductance Amplifier (CFTA) is proposed in this paper. The proposed CFTA consists of current follower and transconductance stage with NMOS cross-coupling to enhance the transconductance. The NMOS cross coupling stage forms negative transconductance which results in higher transconductance and wider tuning range without affecting its output swing and bandwidth performance. The proposed CFTA operates at ±0.6 V supply voltage, provides 8.5 mS transconductance and dissipates 1.7 mW power. To verify the high performance of proposed CFTA, a current mode quadrature oscillator and biquad filter have been designed and simulated. Cadence virtuoso schematic composer has been used to verify the performance of proposed CFTA and its applications with TSMC 0.18 µm technology parameters.
      PubDate: 2017-12-01
      DOI: 10.1007/s10470-017-1036-x
      Issue No: Vol. 93, No. 3 (2017)
  • Design and analysis of a high speed double-tail comparator with isomorphic
           latch-preamplifier pairs and tail bootstrapping
    • Authors: S. Rahmani; M. B. Ghaznavi-Ghoushchi
      Pages: 507 - 521
      Abstract: Analog comparators are the basic circuit elements in analog to digital converters. In this paper, we present a high speed double-tail comparator with isomorphic latch-preamplifier pairs and tail bootstrapping. We used NAND gates because of its higher speed than the NOR gate, as SR-NAND-latch in second stage. The first stage is composed of two parts, preamplifier and voltage boosting block. Preamplifier utilized in a structure similar to latch, and voltages boosting increases the effective supply voltage in clock transition times, results in reduced delay. This results in a desirable speed at lower supply with reduced power consumption. The presented comparator is designed and simulated in both of 0.18-μm and 65-nm CMOS technologies. Simulation results in 0.18-μm show delay of proposed comparator reduced about 35% than conventional comparator. The proposed comparator operates correctly by 2.8 GHz at 1.1 V supply voltage with only 1.3 mW power. The simulation results in 65-nm CMOS technology show that delay and power consumption of isomorphic latch-preamplifier have significant reduction than the results in 180-nm. The proposed comparator is well-suited for mix-signal applications and SAR-ADC.
      PubDate: 2017-12-01
      DOI: 10.1007/s10470-017-1048-6
      Issue No: Vol. 93, No. 3 (2017)
  • Ultra low power beta multiplier-based current reference circuit
    • Authors: Shailesh Singh Chouhan; Kari Halonen
      Pages: 523 - 529
      Abstract: This work presents a current reference circuit fabricated in a standard 0.18 μm CMOS technology. The reference current is obtained by applying thermal compensation voltage in the conventional self-biased or beta multiplier-based current reference circuit. Eight prototypes of the proposed architecture were measured which have resulted into the mean reference current of 26.1 nA with the temperature coefficient of 202.1 ppm/°C. These measurements were performed in the temperature range of − 40 to + 85 °C. The circuit is capable of working over the supply voltage range of 1–2 V with the measured mean line sensitivity of 2.18%/V. The maximum measured power dissipation of the circuit is 104 nW at 2 V.
      PubDate: 2017-12-01
      DOI: 10.1007/s10470-017-1057-5
      Issue No: Vol. 93, No. 3 (2017)
  • Design of low leakage process tolerant SRAM cell
    • Authors: D. Anitha; K. Manjunathachari; P. Sathish Kumar; G. Prasad
      Pages: 531 - 538
      Abstract: In this paper, a novel 8 Transistor Static Random Access Memory (SRAM) cell is proposed to reduce the static power introduced by sub threshold and gate leakages, thus reducing the total power dissipation. The power dissipation of the proposed cell in standby mode has reduced considerably, compared to the conventional 6 Transistor SRAM cell and NC SRAM cell. A better stability is achieved in this cell under different process corners. The proposed technique reduces the standby power to 6.22 nW, which is almost negligible compared to that of a 6T SRAM cell (4.23 uW). Hence, the proposed cell is more suitable for standby mode operation. The total power of the proposed cell is reduced by 25.6% and the read-stability is increased by 40% compared to the conventional 6T SRAM cell. Cadence (Virtuoso) tools are used for simulation with gpdk 45-nm process technology.
      PubDate: 2017-12-01
      DOI: 10.1007/s10470-017-1061-9
      Issue No: Vol. 93, No. 3 (2017)
  • High-dynamic-range programmable gain amplifier with linear-in-dB and DAC
           gain control
    • Authors: Xu Cheng; Liang Zhang; Xianjin Deng
      Abstract: This paper presents a high dynamic range programmable gain amplifier (PGA) with linear-in-dB and digital to analog converter (DAC) gain control using a BiCMOS process. The proposed PGA is composed of a folded Gilbert variable gain amplifier cell, a DC offset cancellation circuitry, two inductorless fixed gain amplifiers with bandwidth extension, a symmetrical exponential voltage generator, a novel buffer amplifier with active inductive peaking for testing purposes and a 10 bit R-2R DAC. The linear-in-dB and DAC gain control scheme facilitate the analog baseband gain tuning accuracy and stability, which also provides an efficient way for digital baseband automatic gain control. The PGA chip is fabricated using 0.13 μm SiGe BiCMOS technology. With a power consumption of 80 mA@1.2 V supply voltage, the fabricated circuit exhibits a tunable gain range of − 30–27 dB (DAC linear gain step guaranteed), a 3 dB bandwidth of around 3.5 GHz and a gain resolution of better than 0.07 dB.
      PubDate: 2017-11-24
      DOI: 10.1007/s10470-017-1086-0
  • A capacitive multi-threshold threshold gate design to reach a
           high-performance PVT-tolerant 4:2 compressor by carbon nanotube FETs
    • Authors: Mojtaba Maleknejad; Reza Faghih Mirzaee; Keivan Navi; Hamid Reza Naji
      Abstract: This paper presents two new 4:2 compressors based on capacitive multi-threshold threshold logic (MTTG), and Carbon Nanotube Field Effect Transistors (CNFETs). The entire capacitor network is divided into two groups in one of the proposed designs. As a result, the number of voltage levels is reduced and the entire structure becomes less sensitive to Process, Voltage, and Temperature variations in comparison with other similar capacitive Threshold Logic (TL) circuits. All designs are simulated by Synopsys HSPICE and 32 nm CNFET technology in different situations and conditions. Simulation results demonstrate the superiority of the second proposed design. It operates 55.9% faster and consumes about 7.2% less power than the second best TL structure (CSTFA). It also operates 16.2% faster and consumes 13.6% less energy in comparison with a traditional design (BLG). Moreover, estimations show that the first proposed design occupies the least area among the capacitive TL circuits.
      PubDate: 2017-11-24
      DOI: 10.1007/s10470-017-1077-1
  • A compact low-power algorithmic A/D converter implemented on a large scale
           FPAA chip
    • Authors: Tzu-Yun Wang; Sheng-Yu Peng; Jennifer Hasler
      Abstract: This paper presents an impact and low power algorithmic ADC which is implemented on a large scale field programmable analog array chip. The proposed circuit is merely composed of the elements within a single computational analog block (CAB) to minimize the area and parasitic effects. The feedback residue is amplified by a simple operational transconductance amplifier with a gain of \(-\,2\) . Therefore, a new algorithm for the conversion process is proposed for this negative gain structure. Furthermore, owing to the floating-gate technique adopted in this work, the parameters and routes of the ADC achieve exceptional reconfigurability. The offset, reset, reference, threshold voltages, and gain all can be adjusted for optimizing the ADC performance. The measured results of the DNL is + 2/− 1 LSB and the INL is + 1.8/− 1.4 LSB, respectively. Under an 8-bit resolution and a 62.5 Hz sampling frequency condition, the measured effective number of bit is 7.6 bits. The total current consumption of the OTAs and FGOTAs is \(1.6\,\upmu\) A under a 2.5 V supply voltage. Each CAB which includes all components, switches, and routings occupies an area of \(400 \times 500\,{\mathrm{mm}}^2\) .
      PubDate: 2017-11-23
      DOI: 10.1007/s10470-017-1084-2
  • Single OTRA based two quadrant analog voltage divider
    • Authors: Bal Chand Nagar; Sajal K. Paul
      Abstract: In this paper an analog voltage divider employing a single operational transresistance amplifier as active element is proposed. Its extension as square-rooter and inverse function has also been discussed. The circuit is found to function as a two quadrant divider. The realization of the circuit as a resistorless configuration is also given which eases monolithic integration and consumes less space. The performance of the proposed circuit is verified through PSPICE (Cadence EDA Tools) simulations using 0.25 µm CMOS technology parameters provided by MOSIS (AGILENT). The various simulation results confirm the feasibility of the proposed circuits.
      PubDate: 2017-11-22
      DOI: 10.1007/s10470-017-1085-1
  • A fully integrated switched-capacitor DC–DC converter with hybrid
           output regulation
    • Authors: Kyunghoon Chung; Seong-Kwan Hong; Oh-Kyong Kwon
      Abstract: In this paper, we propose a fully integrated switched-capacitor (SC) DC–DC converter with hybrid output regulation that allows a predictable switching noise spectrum. The proposed hybrid output regulation method is based on the digital capacitance modulation for fine regulation and the automatic frequency scaling for coarse regulation. The automatic frequency scaler and on-chip current sensor are implemented to adjust the switching frequency at one of the frequencies generated by a binary frequency divider with change in load current. Thus, the switching noise spectrum of the proposed SC DC–DC converter can be predicted over the entire load range. In addition, the bottom-plate losses due to the parasitic capacitances of the flying capacitors and the gate-drive losses due to the gate capacitances of switches are reduced at light load condition since the switching frequency is automatically adjusted. The proposed SC DC–DC converter was implemented in a 0.13 µm CMOS process with 1.5 V devices, and its measurement results show that the peak efficiency and the efficiency at light load condition are 69.2% and higher than 45%, respectively, while maintaining a predictable switching noise spectrum.
      PubDate: 2017-11-22
      DOI: 10.1007/s10470-017-1080-6
  • A 7.9 μA multi-step phase-domain ADC for GFSK demodulators
    • Authors: Shaoquan Gao; Hanjun Jiang; Zhaoyang Weng; Yanshu Guo; Jingjing Dong; Fule Li; Zhihua Wang
      Abstract: The phase-domain analog-to-digital converter (Ph-ADC) is proved to be more power efficient than traditional amplitude ADCs in wireless receivers . A low power multi-step Ph-ADC for zero intermediate frequency (IF) GFSK receivers as defined in Bluetooth low energy protocol is proposed in this paper. With dedicatedly designed binary code scheme and multi-step operation, the Ph-ADC requires only 52 current elements and one comparator, in contrast to the design in literature using 260 current elements and 8 comparators. Non-idealities due to transconductance errors and offset errors are theoretically analyzed, followed by a design strategy to minimize trip point errors. Simulation results show that the digital intensive Ph-ADC consumes only 7.9 μA current from a 1.8 V supply when implemented in a 180 nm CMOS process. Monte-Carlo simulations show that the maximum trip point error is only 2.3°, which is less than 1/8 least significant bit. When the Ph-ADC is used in a GFSK demodulator, the required IF Eb/N0 is 13.5 dB to achieve a bit error rates of 0.1%.
      PubDate: 2017-11-22
      DOI: 10.1007/s10470-017-1081-5
  • An efficient method of Pareto-optimal front generation for analog circuits
    • Authors: Sudip Kundu; Pradip Mandal
      Abstract: In this paper, an efficient deterministic methodology for generating Pareto-optimal front (PoF) of analog circuits is proposed. The proposed methodology utilizes modified epsilon constraint method along with geometric programming based circuit sizer to determine the Pareto-optimal points (PoPs) of the analog circuits. The generated PoPs are then modeled to generate the PoFs. The efficiency of the proposed methodology and the accuracy of the generated PoF has been verified with respect to that of the commonly used stochastic approach. It is found that to generate PoF having similar spread, the proposed methodology takes only 20 min whereas the stochastic approach takes 60 h. It also has been observed that the accuracy of the generated PoF using the proposed methodology improved by more than 10% with respect to that of the stochastic approach. The proposed methodology has been implemented to generate the PoF of a two-stage Op-Amp, fully differential folded cascode Op-Amp, fully differential single-stage and two-stage Op-Amps. The generated PoFs have been utilized for (1) feasibility checking for a user given specification of an Op-Amp, (2) performance prediction and (3) topology selection of the analog circuit. As per authors’ knowledge, this is the first paper which deals with all the aspects, i.e., generation, modeling and application of the PoF of the analog circuits.
      PubDate: 2017-11-21
      DOI: 10.1007/s10470-017-1073-5
  • Correction to: A subthreshold low-power CMOS LC-VCO with high immunity to
           PVT variations
    • Authors: Imen Ghorbel; Fayrouz Haddad; Wenceslas Rahajandraibe; Mourad Loulou
      Abstract: The original publication of the article contains an error in the author Dr. Loulou’s biography. The correct version of the biography is given below.
      PubDate: 2017-10-25
      DOI: 10.1007/s10470-017-1068-2
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Heriot-Watt University
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