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  Subjects -> ENGINEERING (Total: 2246 journals)
    - CHEMICAL ENGINEERING (187 journals)
    - CIVIL ENGINEERING (178 journals)
    - ELECTRICAL ENGINEERING (100 journals)
    - ENGINEERING (1206 journals)
    - HYDRAULIC ENGINEERING (53 journals)
    - INDUSTRIAL ENGINEERING (61 journals)
    - MECHANICAL ENGINEERING (87 journals)

ENGINEERING (1206 journals)            First | 1 2 3 4 5 6 7 | Last

Showing 1001 - 1200 of 1205 Journals sorted alphabetically
Production     Open Access  
Production and Operations Management     Hybrid Journal   (Followers: 9)
Production Engineering     Hybrid Journal   (Followers: 3)
Production Planning & Control: The Management of Operations     Hybrid Journal   (Followers: 7)
Progress in Agricultural Engineering Sciences     Full-text available via subscription  
Progress in Computational Fluid Dynamics, An International Journal     Hybrid Journal   (Followers: 6)
Progress in Energy and Combustion Science     Full-text available via subscription   (Followers: 8)
Progress in Nanotechnology and Nanomaterials     Open Access   (Followers: 4)
Progress in Photovoltaics: Research & Applications     Hybrid Journal   (Followers: 7)
Progress in Polymer Science     Full-text available via subscription   (Followers: 32)
Propellants, Explosives, Pyrotechnics     Hybrid Journal   (Followers: 218)
Propulsion and Power Research     Open Access   (Followers: 13)
Purinergic Signalling     Hybrid Journal  
Quaderns d’Història de l’Enginyeria     Open Access  
Quality and Reliability Engineering International     Hybrid Journal   (Followers: 11)
Quality Engineering     Hybrid Journal   (Followers: 7)
Radiochimica Acta     Hybrid Journal   (Followers: 4)
Rapid Prototyping Journal     Hybrid Journal   (Followers: 3)
Rare Metals     Hybrid Journal  
Reactive and Functional Polymers     Hybrid Journal   (Followers: 5)
Recent Patents on Engineering     Full-text available via subscription   (Followers: 2)
Recent Patents on Nanotechnology     Full-text available via subscription   (Followers: 2)
Recherche Transports Sécurité     Hybrid Journal   (Followers: 1)
Redes de Ingeniería     Open Access  
Regional Maritime University Journal     Full-text available via subscription   (Followers: 1)
Regular and Chaotic Dynamics     Hybrid Journal  
Rem : Revista Escola de Minas     Open Access   (Followers: 1)
Remote Sensing     Open Access   (Followers: 14)
Remote Sensing Letters     Hybrid Journal   (Followers: 12)
Requirements Engineering     Hybrid Journal   (Followers: 3)
Research Ideas and Outcomes     Open Access  
Research in Engineering Design     Hybrid Journal   (Followers: 10)
Research Journal of Nanoscience and Nanotechnology     Open Access   (Followers: 2)
Research Works of Air Force Institute of Technology     Open Access   (Followers: 1)
Resonance     Hybrid Journal   (Followers: 16)
Review of Symbolic Logic     Full-text available via subscription   (Followers: 1)
Reviews in Advanced Sciences and Engineering     Partially Free   (Followers: 1)
Revista AIDIS de Ingeniería y Ciencias Ambientales. Investigación, desarrollo y práctica     Open Access  
Revista Brasileira de Engenharia Agrícola e Ambiental     Open Access   (Followers: 1)
Revista Ciencias e Ingeniería al Día     Open Access  
Revista Científica e-Locução     Open Access  
Revista CINTEX     Open Access  
Revista Cubana de Ingeniería     Open Access  
Revista de Engenharia da Universidade Católica de Petrópolis     Open Access  
Revista de Ingeniería     Open Access  
Revista de Ingenieria Sismica     Open Access  
Revista de Investigación, Desarrollo e Innovación     Open Access  
Revista EIA     Open Access   (Followers: 1)
Revista Facultad de Ingeniería     Open Access   (Followers: 1)
Revista Facultad de Ingenieria - Universidad de Tarapaca     Open Access  
Revista Facultad de Ingeniería Universidad de Antioquia     Open Access   (Followers: 1)
Revista Informador Técnico     Open Access   (Followers: 1)
Revista Ingenieria de Construcción     Open Access  
Revista Logos Ciencia & Tecnología     Open Access  
Revue de Métallurgie     Full-text available via subscription  
Russian Engineering Research     Hybrid Journal  
Russian Journal of Non-Ferrous Metals     Hybrid Journal   (Followers: 25)
Russian Microelectronics     Hybrid Journal  
Sadhana     Open Access   (Followers: 4)
Safety Science     Hybrid Journal   (Followers: 16)
Scholedge International Journal of Multidisciplinary & Allied Studies     Open Access   (Followers: 2)
Science & Technique     Open Access  
Science and Engineering Ethics     Hybrid Journal   (Followers: 6)
Science and Technology     Open Access   (Followers: 2)
Science China Technological Sciences     Hybrid Journal  
Science in Context     Hybrid Journal   (Followers: 1)
Science Journal of Volgograd State University. Technology and innovations     Open Access  
Science Progress     Full-text available via subscription   (Followers: 3)
Scientia cum Industria     Open Access  
Scientific Journal of Control Engineering     Open Access   (Followers: 1)
Scientific Journal of Pure and Applied Sciences     Open Access  
Scientific Journal of Review     Open Access  
Sealing Technology     Full-text available via subscription   (Followers: 1)
Securitas Vialis     Hybrid Journal  
Security and Communication Networks     Hybrid Journal   (Followers: 2)
Selected Topics in Applied Earth Observations and Remote Sensing, IEEE Journal of     Hybrid Journal   (Followers: 17)
Semiconductors     Hybrid Journal  
Semiconductors and Semimetals     Full-text available via subscription  
Sensing and Imaging : An International Journal     Hybrid Journal   (Followers: 1)
Sensor Letters     Full-text available via subscription   (Followers: 1)
Sensors     Open Access   (Followers: 9)
Separation and Purification Technology     Hybrid Journal   (Followers: 10)
Services Computing, IEEE Transactions on     Hybrid Journal   (Followers: 4)
Shock and Vibration     Hybrid Journal   (Followers: 6)
SIAM Journal on Applied Dynamical Systems     Full-text available via subscription   (Followers: 2)
SIAM Journal on Mathematical Analysis     Full-text available via subscription   (Followers: 3)
SIAM Journal on Matrix Analysis and Applications     Full-text available via subscription   (Followers: 1)
SIAM Journal on Numerical Analysis     Full-text available via subscription   (Followers: 4)
SIAM Journal on Optimization     Full-text available via subscription   (Followers: 6)
SIAM Review     Full-text available via subscription   (Followers: 5)
SILICON     Hybrid Journal  
Sistemas & Telemática     Open Access   (Followers: 1)
Sleep and Biological Rhythms     Hybrid Journal   (Followers: 3)
Small     Hybrid Journal   (Followers: 8)
Smart Grid     Open Access  
Soft Computing     Hybrid Journal   (Followers: 6)
Software Engineering, IEEE Transactions on     Hybrid Journal   (Followers: 33)
Soil Dynamics and Earthquake Engineering     Hybrid Journal   (Followers: 8)
Soldagem & Inspeção     Open Access  
Solid-State Circuits Magazine, IEEE     Hybrid Journal   (Followers: 7)
SourceOCDE Developpement urbain, rural et regional     Full-text available via subscription  
SourceOCDE Energie     Full-text available via subscription  
SourceOECD Energy     Full-text available via subscription  
SourceOECD Science and Technology Statistics - SourceOCDE Base de donnees des sciences et de la technologie     Full-text available via subscription  
SourceOECD Transport     Full-text available via subscription   (Followers: 3)
SourceOECD Urban, Rural and Regional Development     Full-text available via subscription   (Followers: 1)
South African Computer Journal     Full-text available via subscription  
South African Journal of Agricultural Extension     Open Access   (Followers: 3)
South African Journal of Science     Open Access   (Followers: 3)
Sports Engineering     Hybrid Journal   (Followers: 2)
Stahlbau     Hybrid Journal   (Followers: 4)
Steel in Translation     Hybrid Journal  
Steel Research International     Hybrid Journal   (Followers: 28)
Stochastic Analysis and Applications     Hybrid Journal  
Stochastic Processes and their Applications     Hybrid Journal   (Followers: 4)
Stochastics and Dynamics     Hybrid Journal  
Strain     Hybrid Journal   (Followers: 1)
Strategic Planning for Energy and the Environment     Hybrid Journal   (Followers: 3)
Studies in Engineering and Technology     Open Access  
Studies in Interface Science     Full-text available via subscription   (Followers: 1)
Studies in Logic and Practical Reasoning     Full-text available via subscription  
Studies in Surface Science and Catalysis     Full-text available via subscription   (Followers: 1)
Superconductor Science and Technology     Hybrid Journal  
Surface Engineering     Hybrid Journal   (Followers: 3)
Surface Review and Letters     Hybrid Journal   (Followers: 1)
Surface Science Reports     Full-text available via subscription   (Followers: 14)
Survey Review     Hybrid Journal   (Followers: 6)
Surveying and Land Information Science     Full-text available via subscription   (Followers: 2)
Sustainability Science     Hybrid Journal   (Followers: 5)
Sustainability Science and Engineering     Full-text available via subscription   (Followers: 4)
Sustainable Management of Sediment Resources     Full-text available via subscription  
Swiss Journal of Geosciences     Hybrid Journal  
Symmetry     Open Access  
Synthesis Lectures on Algorithms and Software in Engineering     Full-text available via subscription  
Synthesis Lectures on Antennas     Full-text available via subscription   (Followers: 4)
Synthesis Lectures on Biomedical Engineering     Full-text available via subscription  
Synthesis Lectures on Computational Electromagnetics     Full-text available via subscription   (Followers: 3)
Synthesis Lectures on Energy and the Environment: Technology, Science, and Society     Full-text available via subscription   (Followers: 2)
Synthesis Lectures on Engineering     Full-text available via subscription  
Synthesis Lectures on Global Engineering     Full-text available via subscription  
Synthesis Lectures on Professionalism and Career Advancement for Scientists and Engineers     Full-text available via subscription  
Synthetic Metals     Hybrid Journal   (Followers: 4)
Systems Engineering     Hybrid Journal   (Followers: 6)
Systems Engineering Procedia     Open Access  
Systems Research Forum     Hybrid Journal  
Systems Science & Control Engineering     Open Access   (Followers: 3)
Techno.Com     Open Access  
Technological Engineering     Open Access  
Technologies     Open Access   (Followers: 1)
TECHNOLOGY     Hybrid Journal  
Technology and Innovation     Full-text available via subscription   (Followers: 3)
Technology in Society     Hybrid Journal   (Followers: 4)
Technometrics     Full-text available via subscription   (Followers: 6)
Tecnologia, Ciencia, Educacion     Open Access   (Followers: 1)
Tecnura     Open Access  
Telecommunications Policy     Hybrid Journal   (Followers: 8)
Terahertz Science and Technology, IEEE Transactions on     Hybrid Journal   (Followers: 1)
Textile Science and Technology     Full-text available via subscription   (Followers: 3)
The Journal of Computational Multiphase Flows     Full-text available via subscription  
The Journal of Supercomputing     Hybrid Journal   (Followers: 1)
The Scientific World Journal     Open Access  
Theoretical and Computational Fluid Dynamics     Hybrid Journal   (Followers: 9)
Theoretical Issues in Ergonomics Science     Hybrid Journal   (Followers: 2)
Thermal Engineering     Hybrid Journal   (Followers: 3)
Tikrit Journal of Engineering Science     Open Access  
tm - Technisches Messen     Hybrid Journal   (Followers: 1)
Topics in Catalysis     Hybrid Journal   (Followers: 1)
Traffic Injury Prevention     Hybrid Journal   (Followers: 41)
TRANSACTIONS of the VŠB - Technical University of Ostrava, Safety Engineering Series     Open Access   (Followers: 1)
Transactions of Tianjin University     Full-text available via subscription  
Transport and Telecommunication Journal     Open Access   (Followers: 3)
Transport World Africa     Full-text available via subscription   (Followers: 3)
Transportation Research Record : Journal of the Transportation Research Board     Full-text available via subscription   (Followers: 33)
Transportmetrica A : Transport Science     Hybrid Journal   (Followers: 5)
Trends in Applied Sciences Research     Open Access   (Followers: 1)
Tribology in Industry     Open Access   (Followers: 1)
Tribology International     Hybrid Journal   (Followers: 41)
Tribology Letters     Hybrid Journal   (Followers: 5)
Tribology Transactions     Hybrid Journal   (Followers: 33)
Tribotest     Hybrid Journal  
Tropical Science     Hybrid Journal   (Followers: 1)
Turkish Journal of Engineering and Environmental Sciences     Open Access   (Followers: 1)
Ultramicroscopy     Hybrid Journal   (Followers: 2)
Uludağ University Journal of The Faculty of Engineering     Open Access  
Universal Journal of Applied Science     Open Access  
Universal Journal of Engineering Science     Open Access   (Followers: 1)
Utilities Policy     Hybrid Journal   (Followers: 2)
Vacuum     Hybrid Journal   (Followers: 12)
Virtual and Physical Prototyping     Hybrid Journal   (Followers: 3)
Visualization in Engineering     Open Access  
Walailak Journal of Science and Technology     Open Access  
Waste and Biomass Valorization     Hybrid Journal  
Waste Management Series     Full-text available via subscription   (Followers: 2)
Waves in Random and Complex Media     Hybrid Journal  
Wear     Hybrid Journal   (Followers: 29)
Welding in the World     Hybrid Journal   (Followers: 2)
West African Journal of Industrial and Academic Research     Open Access   (Followers: 1)
Women in Engineering Magazine, IEEE     Full-text available via subscription   (Followers: 8)
World Journal of Engineering     Full-text available via subscription   (Followers: 3)
World Journal of Engineering and Technology     Open Access  

  First | 1 2 3 4 5 6 7 | Last

Journal Cover Journal of Electronic Testing
  [SJR: 0.241]   [H-I: 24]   [2 followers]  Follow
   Hybrid Journal Hybrid journal (It can contain Open Access articles)
   ISSN (Print) 1573-0727 - ISSN (Online) 0923-8174
   Published by Springer-Verlag Homepage  [2281 journals]
  • An SEU-Resilient SRAM Bitcell in 65-nm CMOS Technology
    • Abstract: Abstract This paper presents an SEU-resilient 12 T SRAM bitcell. Simulation results demonstrate that it has higher critical charge than the traditional 6 T cell. Alpha and proton testing results validate that it has a lower soft error rate compared to the reference designs for all data patterns and supply voltage levels. The improvement in SEU tolerance is achieved at the expense of 2X area penalty.
      PubDate: 2016-04-29
  • High Performance Significance Approximation Error Tolerance Adder for
           Image Processing Applications
    • Abstract: Abstract Addition is one of the fundamental arithmetic operations which are used extensively in many VLSI systems such as microprocessors and application specific DSP architectures. In this paper, the Significance Approximation Error Tolerant Carry Select Adder (SAET-CSLA) is constructed, which is efficient in terms of accuracy, power and area. While considering the elementary structure of an image processing applications, it is a combination of the multipliers and delays, which in turn are the combination of the adders. This research paper describes the Algorithmic strength reduction technique which leads to a reduction in hardware complexity by exploiting the significances. This transformation is basically implemented for the reduction in the power consumption and area efficient of Very Large Scale Integration (VLSI) design or iteration period in a programmable Digital Signal Processing (DSP) implementation. The significance approximation error tolerant adder is designed using full adder and approximate full adder cells with reduced complexity at the gate level. The performance of 16 bit conventional Carry Select Adder (CSLA), 16 bit Error Tolerant carry select Adder (ET-CSLA) and proposed Significance Approximation Error Tolerant Carry Select Adder (SAET-CSLA) are compared. For all the 216 input combinations, comparison is made between existing and proposed CSLA adders and the error tolerance analysis is carried out for accuracy improvement. Application of image processing is carried out using proposed SAET-CSLA.
      PubDate: 2016-04-29
  • Optimization of Boundary Scan Tests Using FPGA-Based Efficient Scan
    • Abstract: Abstract This paper presents a method for optimization of board-level scan test with the help of reconfigurable scan-chains (RSCs) implemented in a programmable logic of FPGA. Despite that the RSC concept is a well-known solution for scan-based test time reduction, the usage of RSC may lead to un-acceptable hardware overhead. In our work, we are targeting a completely new approach of exploiting on-board FPGA resources that being unconfigured are typically available during the manufacturing test phase for carrying out tests using temporarily implemented virtual RSC structures. As the allocated FPGA logic is re-claimed for functional use after the test is finished, the presented method delivers all the advantages of RSCs at no extra hardware cost. Experimental results show that the proposed virtual RSCs can fit into all available commercial FPGAs providing a significant test time reduction in comparison with state-of-the-art Boundary Scan test tecnique.
      PubDate: 2016-04-28
  • Real-Time Adaptive Test Algorithm Including Test Escape Estimation Method
    • Abstract: Abstract This work aims to reduce the test time per chip, but affect the quality of the products only as little as possible compared to the conventional semiconductor test. For that purpose, a simulation software has been developed that performs adaptive test simulations based on real data and test results of conventional production testing. Products has been analyzed and both the potential for test time savings and the resulting loss of quality are determined. Finally, it is shown that by the intelligent omission of tests, compared to conventional testing procedures, test time reduction of up to 50 % can be achieved. In contrast, there are only few defective components that are not detected by the adaptive test procedure and which reduced the quality of products. In best case, the fraction of test escapes was under 40 ppm. To handle the potential risk of test escapes this paper also introduces a statistical estimation method.
      PubDate: 2016-04-25
  • A New Capacitance-to-Frequency Converter for On-Chip Capacitance
           Measurement and Calibration in CMOS Technology
    • Abstract: Abstract In this paper, a new capacitance-to-frequency converter using a charge-based capacitance measurement (CBCM) circuit is proposed for on-chip capacitance measurement and calibration. As compared to conventional capacitor measurement circuits, the proposed technique is able to represent the capacitance in term of the frequency so that the variations can be easily handled in measurement or calibration circuits. Due to its simplicity, the proposed technique is able to achieve high accuracy and flexibility with small silicon area. Designed using standard 180 nm CMOS technology, the core circuit occupies less than 50 μm × 50 μm while consuming less than 60 μW at an input frequency of 10 MHz. Post-layout simulation shows that the circuit exhibits less than 3 % measurement errors for fF to pF capacitances while the functionality has been significantly improved.
      PubDate: 2016-04-23
  • A Fast Statistical Soft Error Rate Estimation Method for Nano-scale
           Combinational Circuits
    • Abstract: Abstract Nano-scale digital integrated circuits are getting increasingly vulnerable to soft errors due to aggressive technology scaling. On the other hand, the impacts of process variations on characteristics of the circuits in nano era make statistical approaches as an unavoidable option for soft error rate estimation procedure. In this paper, we present a novel statistical Soft Error Rate estimation framework. The vulnerability of the circuits to soft errors is analyzed using a newly defined concept called Statistical Vulnerability Window (SVW). SVW is an inference of the necessary conditions for a Single Event Transient (SET) to cause observable errors in the given circuit. The SER is calculated using a probabilistic formulation based on the parameters of SVWs. Experimental results show that the proposed method provides considerable speedup (about 5 orders of magnitude) with less than 5 % accuracy loss when compared to Monte-Carlo SPICE simulations. In addition, the proposed framework, keeps its efficiency when considering a full spectrum charge collections (more than 36X speedups compared to the most recently published similar work).
      PubDate: 2016-04-16
  • Automatic Feature Selection of Hardware Layout: A Step toward Robust
           Hardware Trojan Detection
    • Abstract: Abstract Recently, the problem of hardware Trojan detection has gained a tangible significance in academia and industry. That problem, by its nature, is complex, time consuming and error prone due to design and fabrication outsourcing of hardware circuits to external untrusted foundries. Researchers have proposed different approaches, either destructive or non-destructive, to overcome that problem. The destructive approach depends on reverse engineering via decapsulation, delayering and layout identification. This paper presents a first trial of a new approach that can afford an automatic and robust solution for the step of layout identification. The proposed technique takes the underlying digital circuit as input, and automatically determines its basic features using Haar feature extractor. Based on that features, a decision tree is trained to act as a weak classifier, which is later boosted, by making use of AdaBoost learning algorithm, to produce a strong classifier in a chain of cascaded classifiers. Accordingly, a classification model is built up to provide an automatic hardware Trojan location and detection tool. To evaluate the proposed model, ISCAS89 benchmark dataset was used for training and testing. The hardware dataset has been altered deliberately to show different Trojan examples –namely, Trojan insertion, Trojan deletion and Trojan parametric- inside hardware circuits. By investigating the underlying experimental results, the capabilities of the proposed model are evaluated, and the evaluation shows that the approach can detect different hardware Trojan types in different circuit layouts, with high accuracy rate. The proposed approach is not only automatic, but also robust and promising.
      PubDate: 2016-04-07
  • Dynamic Power Integrity Control of ATE for Eliminating Overkills and
           Underkills in Device Testing
    • Abstract: Abstract This paper proposes a power integrity control technique for dynamically controlling power supply voltage fluctuations for a device under test (DUT), and demonstrates its effectiveness for eliminating the overkills/underkills due to the difference of power supply impedance between an automatic test equipment (ATE) and a practical operating environment of the DUT. The proposed method injects compensation currents into the power supply nodes on the ATE system in a feed-forward manner such that the ATE power supply waveform matches with the one on the customer’s operating environment of the DUT. A method for calculating the compensation current is also described. Experimental results show that the proposed method can emulate the power supply voltage waveform under a customer’s operating condition and eliminate 95 % of overkills/underkills in the maximum operating frequency testing with 105 real silicon devices. Limitations and applications of the proposed method are also discussed.
      PubDate: 2016-04-02
  • A CMOS Ripple Detector for Voltage Regulator Testing
    • Abstract: Abstract This paper presents an RMS based ripple sensor for testing of fully integrated voltage regulators. A DC signal which is proportional to the input ripple amplitude is generated. Final digital pass/fail signal is obtained with a clocked comparator. The sensor can detect a peak-to-peak ripple voltage of up to 50 millivolts on the 1.2 V supply rail and has 220 MHz bandwidth. The sensor is designed using IBM 90 nm CMOS technology and its functionality is verified in Cadence Virtuoso simulation environment.
      PubDate: 2016-04-01
  • Editorial
    • PubDate: 2016-03-22
  • Exemplar-based Failure Triage for Regression Design Debugging
    • Abstract: Abstract Modern regression verification often exposes myriads of failures at the pre-silicon stage. Typically, these failures need to be properly grouped into bins, which then have to be distributed to engineers for detailed analysis. The above process is coined as failure triage, and is nowadays increasing in complexity, as the size of both design logic and verification environment continues to grow. However, it remains a predominantly manual process that can prolong the debug cycle and jeopardize time-sensitive design milestones. In this paper, we propose an exemplar-based data-mining formulation of failure triage that efficiently automates both failure grouping and bin distribution. The proposed framework maps failures as data points, applies an affinity-propagation (AP) clustering algorithm, and operates in both metric and non-metric spaces, offering complete flexibility and significant user control over the process. Experimental results show that the proposed approach groups related failures together with 87 % accuracy on the average, and improves bin distribution accuracy by 21 % over existing methods.
      PubDate: 2016-03-19
  • New Boolean Equation for Orthogonalizing of Disjunctive Normal Form based
           on the Method of Orthogonalizing Difference-Building
    • Abstract: Abstract In this paper a new Boolean equation for the orthogonalization of Boolean functions respectively of Ternary-Vector-Lists of disjunctive normal form is presented. It provides the mathematical solution of orthogonalization for the first time. The new equation is based on the new method of orthogonalizing difference-building ⊖. In contrast to other methods the new method has a faster computation time. Another advantage is the smaller number of product terms respectively of Ternary-Vectors in the orthogonalized result in contrast to other methods. Furthermore, the new equation can be used as a part in the calculation procedure of getting suitable test patterns for combinatorial circuits for verifying feasible logical faults.
      PubDate: 2016-03-17
  • Exploration of Noise Impact on Integrated Bulk Current Sensors
    • Abstract: Abstract Current CMOS (Complementary Metal Oxide Semiconductor) technologies show an increasing susceptibility to a rising amount of failure sources. This includes also radiation induced soft errors, which requires countermeasures on several design levels. Hereby, BBICS (Bulk Built-In Current Sensors) represent a promising approach on circuit level. However, it is expected that these circuits, like similar sensors measuring substrate effects, are strongly susceptible to substrate noise. The intention of this work is an in-depth noise analysis of representative bulk sensors based on extracted layout data. Thereby, several aspects are considered, like sensor activation thresholds, impact of the distance to the noise source, and noise generation by test circuits. Results indicate that already noise RMS level of 5 to 9 % of the supply voltage can lead to false detections, which are values in the same order of magnitude of noise generated by test circuits.
      PubDate: 2016-03-16
  • An Exact approach for Complete Test Set Generation of
           Toffoli-Fredkin-Peres based Reversible Circuits
    • Abstract: Abstract Reversible logic has gained interest of researchers worldwide for its ultra-low power and high speed computing abilities in the future quantum information processing. Testing of these circuits is important for ensuring high reliability of their operation. In this work, we propose an ATPG algorithm for reversible circuits using an exact approach to generate CTS (Complete Test Set) which can detect single stuck-at faults, multiple stuck-at faults, repeated gate fault, partial and complete missing gate faults which are very useful logical fault models for reversible logic to model any physical defect. Proposed algorithm can be used to test a reversible circuit designed with k-CNOT, Peres and Fredkin gates. Through extensive experiments, we have validated our proposed algorithm for several benchmark circuits and other circuits with family of reversible gates. This algorithm produces a minimal and complete test set while reducing test generation time as compared to existing state-of-the-art algorithms. A testing tool is developed satisfying the purpose of generating all possible CTS’s indicating the simulation time, number of levels and gates in the circuit. This paper also contributes to the detection and removal of redundant faults for optimal test set generation.
      PubDate: 2016-03-16
  • Applications of Mixed-Signal Technology in Digital Testing
    • Abstract: Abstract For reducing the test application time and required tester pins per device, we propose the use of multi-valued logic (MVL) signals, which increases data rate between the device under test (DUT) and automatic test equipment (ATE). An MVL signal sends multiple bits of information per clock cycle on a physical channel. Conversion of signals between binary and MVL is accomplished by digital to analog and analog to digital converters available in the mixed-signal technology. To support MVL test application and avoid reliability issues, we add necessary modifications on ATE and DUT sides. Theoretical calculation and a prototype experiment demonstrate significant data rate increase. We integrate the proposed MVL technique into test methodologies involving reduced pin-count test (RPCT) for multi-core system-on-chip (SoC) and test compression. An actual automatic test equipment (ATE) based test of a DUT shows notable reduction in test application time with MVL test application.
      PubDate: 2016-03-11
  • Test Technology Newsletter
    • PubDate: 2016-03-02
  • A Hybrid Fault-Tolerant Architecture for Highly Reliable Processing Cores
    • Abstract: Abstract Increasing vulnerability of transistors and interconnects due to scaling is continuously challenging the reliability of future microprocessors. Lifetime reliability is gaining attention over performance as a design factor even for lower-end commodity applications. In this work we present a low-power hybrid fault tolerant architecture for reliability improvement of pipelined microprocessors by protecting their combinational logic parts. The architecture can handle a broad spectrum of faults with little impact on performance by combining different types of redundancies. Moreover, it addresses the problem of error propagation in nonlinear pipelines and error detection in pipeline stages with memory interfaces. Our case-study implementation of a fault tolerant MIPS microprocessor highlights four main advantages of the proposed solution. It offers (i) 11.6 % power saving, (ii) improved transient error detection capability, (iii) lifetime reliability improvement, and (iv) more effective fault accumulation effect handling, in comparison with TMR architectures. We also present a gate-level fault-injection framework that offers high fidelity to model physical defects and transient faults.
      PubDate: 2016-03-01
  • A 10-Transistor 65 nm SRAM Cell Tolerant to Single-Event Upsets
    • Abstract: Abstract A novel SRAM cell tolerant to single-event upsets (SEUs) is presented in this paper. By adding four more transistors inside, the proposed circuit can obtain higher critical charge at each internal node compared to the conventional 6-transistor (6T) cell. Arrays of 2k-bit capacitance of these two designs were implemented in a 65 nm CMOS bulk technology for comparison purpose. Radiation experiments showed that, at the nominal 1.0 V supply voltage, the proposed cell achieves 47.1 % and 49.3 % reduction in alpha and proton soft error rates (SER) with an area overhead of 37 %.
      PubDate: 2016-02-27
  • Design and Temperature Reliability Testing for A 0.6–2.14GHz
           Broadband Power Amplifier
    • Abstract: Abstract This article presents a broadband power amplifier (PA) with a compact structure and investigates its temperature reliability. Design and temperature reliability test procedures are elaborated. The PA delivers good broadband characteristics (0.6–2.14GHz) with the maximum PAE of 46.4 % and saturated output power of more than 35.1dBm at the whole operating frequency band. A series of experiments including those on DC characteristic, S-parameter and large signal characteristic have been conducted to investigate the temperature effects for the broadband performance and reliability of the designed PA.
      PubDate: 2016-02-05
  • Built-In Self-Test Design for the 3D-Stacked Wide-I/O DRAM
    • Abstract: Abstract Mobile Wide-I/O DRAMs are used in smartphones, tablets, handheld gaming consoles and other mobile devices. The main benefit of the Wide-I/O DRAM over its predecessors (such as LPDDRx DRAMs) is that it offers more bandwidth at lower power. In this paper, we propose a Wide-I/O DRAM built-in self-test design, named WIO-BIST including the local BIST (LO-BIST), global BIST (GL-BIST) and test interface structures, to support the fault detection in memory-die channels and TSVs. It should be noted that, a TSV test scheme is presented embedding the test procedure of TSVs into the memory-die channel test processes to significantly save the test time of TSVs. A logic die and 4 memory-dies stacking configuration is used to act as a dedicated circuit to demonstrate the feasibility of the proposed WIO-BIST design. Experimental results and comparisons show that the proposed WIO-BIST design has good performance in test time reduction with tiny extra area overhead penalty.
      PubDate: 2016-02-03
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