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  Subjects -> ENGINEERING (Total: 2096 journals)
    - CHEMICAL ENGINEERING (176 journals)
    - CIVIL ENGINEERING (161 journals)
    - ELECTRICAL ENGINEERING (88 journals)
    - ENGINEERING (1157 journals)
    - ENGINEERING MECHANICS AND MATERIALS (330 journals)
    - HYDRAULIC ENGINEERING (53 journals)
    - INDUSTRIAL ENGINEERING (52 journals)
    - MECHANICAL ENGINEERING (79 journals)

ENGINEERING (1157 journals)            First | 2 3 4 5 6 7 8 9 | Last

International Journal of Heavy Vehicle Systems     Hybrid Journal   (Followers: 6)
International Journal of Hypersonics     Full-text available via subscription   (Followers: 3)
International Journal of Imaging Systems and Technology     Hybrid Journal   (Followers: 2)
International Journal of Impact Engineering     Hybrid Journal   (Followers: 7)
International Journal of Information Acquisition     Hybrid Journal   (Followers: 1)
International Journal of Innovation and Applied Studies     Open Access   (Followers: 2)
International Journal of Innovation Science     Full-text available via subscription   (Followers: 6)
International Journal of Innovative Technology and Research     Open Access  
International Journal of Integrated Engineering     Open Access   (Followers: 1)
International Journal of Intelligent Engineering Informatics     Hybrid Journal  
International Journal of Intelligent Systems and Applications in Engineering     Open Access  
International Journal of Lifecycle Performance Engineering     Hybrid Journal   (Followers: 1)
International Journal of Machine Tools and Manufacture     Hybrid Journal   (Followers: 5)
International Journal of Manufacturing Research     Hybrid Journal   (Followers: 5)
International Journal of Manufacturing Technology and Management     Hybrid Journal   (Followers: 7)
International Journal of Materials and Product Technology     Hybrid Journal   (Followers: 4)
International Journal of Mathematical Education in Science and Technology     Hybrid Journal   (Followers: 7)
International Journal of Mathematics in Operational Research     Hybrid Journal   (Followers: 1)
International Journal of Medical Engineering and Informatics     Hybrid Journal   (Followers: 5)
International Journal of Micro Air Vehicles     Full-text available via subscription   (Followers: 4)
International Journal of Microwave and Wireless Technologies     Hybrid Journal   (Followers: 1)
International Journal of Microwave Science and Technology     Open Access   (Followers: 2)
International Journal of Mobile Network Design and Innovation     Hybrid Journal   (Followers: 3)
International Journal of Multiphase Flow     Hybrid Journal   (Followers: 2)
International Journal of Nanomanufacturing     Hybrid Journal   (Followers: 1)
International Journal of Nanoscience     Hybrid Journal   (Followers: 1)
International Journal of Nanotechnology     Hybrid Journal   (Followers: 5)
International Journal of Nanotechnology and Molecular Computation     Full-text available via subscription   (Followers: 3)
International Journal of Navigation and Observation     Open Access   (Followers: 6)
International Journal of Network Management     Hybrid Journal  
International Journal of Nonlinear Sciences and Numerical Simulation     Full-text available via subscription  
International Journal of Numerical Methods for Heat & Fluid Flow     Hybrid Journal   (Followers: 7)
International Journal of Optics     Open Access   (Followers: 1)
International Journal of Organisational Design and Engineering     Hybrid Journal   (Followers: 9)
International Journal of Pattern Recognition and Artificial Intelligence     Hybrid Journal   (Followers: 6)
International Journal of Pavement Engineering     Hybrid Journal   (Followers: 2)
International Journal of Physical Modelling in Geotechnics     Hybrid Journal   (Followers: 3)
International Journal of Plasticity     Hybrid Journal   (Followers: 6)
International Journal of Plastics Technology     Hybrid Journal  
International Journal of Polymer Analysis and Characterization     Hybrid Journal   (Followers: 5)
International Journal of Polymer Science     Open Access   (Followers: 16)
International Journal of Precision Engineering and Manufacturing     Hybrid Journal   (Followers: 5)
International Journal of Precision Engineering and Manufacturing-Green Technology     Hybrid Journal  
International Journal of Precision Technology     Hybrid Journal  
International Journal of Pressure Vessels and Piping     Hybrid Journal   (Followers: 3)
International Journal of Production Economics     Hybrid Journal   (Followers: 13)
International Journal of Quality and Innovation     Hybrid Journal   (Followers: 4)
International Journal of Quality Assurance in Engineering and Technology Education     Full-text available via subscription   (Followers: 2)
International Journal of Quality Engineering and Technology     Hybrid Journal   (Followers: 2)
International Journal of Quantum Information     Hybrid Journal  
International Journal of Rapid Manufacturing     Hybrid Journal   (Followers: 1)
International Journal of Reliability, Quality and Safety Engineering     Hybrid Journal   (Followers: 7)
International Journal of Renewable Energy Technology     Hybrid Journal   (Followers: 8)
International Journal of Robust and Nonlinear Control     Hybrid Journal   (Followers: 2)
International Journal of Science Engineering and Advance Technology     Open Access  
International Journal of Sediment Research     Full-text available via subscription   (Followers: 1)
International Journal of Self-Propagating High-Temperature Synthesis     Hybrid Journal   (Followers: 2)
International Journal of Signal and Imaging Systems Engineering     Hybrid Journal  
International Journal of Six Sigma and Competitive Advantage     Hybrid Journal  
International Journal of Social Robotics     Hybrid Journal   (Followers: 2)
International Journal of Software Engineering and Knowledge Engineering     Hybrid Journal   (Followers: 1)
International Journal of Space Science and Engineering     Hybrid Journal   (Followers: 2)
International Journal of Speech Technology     Hybrid Journal   (Followers: 4)
International Journal of Spray and Combustion Dynamics     Full-text available via subscription   (Followers: 6)
International Journal of Superconductivity     Open Access  
International Journal of Surface Engineering and Interdisciplinary Materials Science     Full-text available via subscription   (Followers: 1)
International Journal of Surface Science and Engineering     Hybrid Journal   (Followers: 7)
International Journal of Sustainable Engineering     Hybrid Journal   (Followers: 7)
International Journal of Sustainable Manufacturing     Hybrid Journal   (Followers: 4)
International Journal of Systems and Service-Oriented Engineering     Full-text available via subscription  
International Journal of Systems Assurance Engineering and Management     Hybrid Journal  
International Journal of Systems, Control and Communications     Hybrid Journal   (Followers: 2)
International Journal of Technoethics     Full-text available via subscription  
International Journal of Technology Management and Sustainable Development     Hybrid Journal   (Followers: 1)
International Journal of Technology Policy and Law     Hybrid Journal   (Followers: 4)
International Journal of Telemedicine and Applications     Open Access   (Followers: 2)
International Journal of Thermal Sciences     Hybrid Journal   (Followers: 7)
International Journal of Thermodynamics     Open Access   (Followers: 2)
International Journal of Turbo & Jet-Engines     Full-text available via subscription  
International Journal of Ultra Wideband Communications and Systems     Hybrid Journal  
International Journal of Vehicle Autonomous Systems     Hybrid Journal   (Followers: 1)
International Journal of Vehicle Design     Hybrid Journal   (Followers: 6)
International Journal of Vehicle Information and Communication Systems     Hybrid Journal   (Followers: 2)
International Journal of Vehicle Noise and Vibration     Hybrid Journal   (Followers: 3)
International Journal of Vehicle Safety     Hybrid Journal   (Followers: 5)
International Journal of Vehicular Technology     Open Access   (Followers: 2)
International Journal of Virtual Technology and Multimedia     Hybrid Journal   (Followers: 4)
International Journal of Wavelets, Multiresolution and Information Processing     Hybrid Journal  
International Journal on Artificial Intelligence Tools     Hybrid Journal   (Followers: 4)
International Nano Letters     Open Access   (Followers: 9)
International Review of Applied Sciences and Engineering     Full-text available via subscription  
Inverse Problems in Science and Engineering     Hybrid Journal   (Followers: 2)
Ionics     Hybrid Journal  
IPTEK The Journal for Technology and Science     Open Access  
IRBM News     Full-text available via subscription  
Ironmaking & Steelmaking     Hybrid Journal   (Followers: 2)
Irrigation and Drainage Systems     Hybrid Journal  
ISA Transactions     Full-text available via subscription   (Followers: 1)
ISRN - International Scholarly Research Notices     Open Access   (Followers: 68)
ISRN Nanotechnology     Open Access  

  First | 2 3 4 5 6 7 8 9 | Last

Journal Cover   Journal of Electronic Testing
  [SJR: 0.241]   [H-I: 24]   [3 followers]  Follow
    
   Hybrid Journal Hybrid journal (It can contain Open Access articles)
   ISSN (Print) 1573-0727 - ISSN (Online) 0923-8174
   Published by Springer-Verlag Homepage  [2302 journals]
  • Reusing RTL Assertion Checkers for Verification of SystemC TLM Models
    • Abstract: The recent trend towards system-level design gives rise to new challenges for reusing existing (RTL) intellectual properties (IPs) and their verification environment in (TLM). While techniques and tools to abstract (RTL) IPs into TLM models have begun to appear, the problem of reusing, at TLM, a verification environment originally developed for an RTL IP is still under-explored, particularly when (ABV) is adopted. Some frameworks have been proposed to deal with ABV at TLM, but they assume a top-down design and verification flow, where assertions are defined ex-novo at TLM level. In contrast, the reuse of existing assertions in an RTL-to-TLM bottom-up design flow has not been analyzed yet, except by using transactors to create a mixed simulation between the TLM design and the RTL checkers corresponding to the assertions. However, the use of transactors may lead to longer verification time due to the need of developing and verifying the transactors themselves. Moreover, the simulation time is negatively affected by the presence of transactors, which slow down the simulation at the speed of the slowest parts (i.e., RTL checkers). This article proposes an alternative methodology that does not require transactors for reusing assertions, originally defined for a given RTL IP, in order to verify the corresponding TLM model. Experimental results have been conducted on benchmarks with different characteristics and complexity to show the applicability and the efficiency of the proposed methodology.
      PubDate: 2015-03-20
       
  • A Shift-Register Based BIST Architecture for FPGA Global Interconnect
           Testing and Diagnosis
    • Abstract: Abstract This paper describes the implementation of a shift-register based Built-In Self-Test (BIST) architecture for FPGA global interconnection resources testing. Through this, it is possible to configure FPGA resources that need to be tested in order to obtain high reliability FPGA-based systems. The proposed BIST approach takes advantage of FPGA low-level resources in order to generate cyclic test patterns, analyse testing response and store test results in a simple way. Additionally, the same BIST configuration set is capable of diagnosing the tested interconnection resources with no additional configurations thereby reducing time requirements. This paper presents the proposed BIST architecture and its diagnosis scheme, its implementation on a Xilinx FPGA, and experimental results.
      PubDate: 2015-03-13
       
  • Detecting Hardware Trojans using On-chip Sensors in an ASIC Design
    • Abstract: Abstract The modern integrated circuit (IC) manufacturing process has exposed the fabless semiconductor industry to hardware Trojans that threaten circuits bound for critical applications. This paper investigates an on-chip sensor’s effectiveness for Trojan detection in an application specific integrated circuit (ASIC) and proposes new techniques to improve the sensor’s sensitivity to Trojan switching activity. The sensors serve as power supply monitors by detecting fluctuations in their characteristic frequencies due to malicious inclusions (i.e. hardware Trojans) in the circuit under authentication. Our proposed on-chip structure was implemented and fabricated on an ASIC test chip using IBM 90nm technology with controlled hardware Trojans. This work analyzes the impact of both sequential and combinational Trojans with varied partial activity, area, and location on the proposed on-chip structure and demonstrates that stealthy Trojans can be effectively detected with this technique, even when obfuscated by circuit switching activity and process and environmental variations.
      PubDate: 2015-02-20
       
  • Application-Based Analysis of Register File Criticality for Reliability
           Assessment in Embedded Microprocessors
    • Abstract: Abstract There is an increasing concern to reduce the cost and overheads during the development of reliable systems. Selective protection of most critical parts of the systems represents a viable solution to obtain a high level of reliability at a fraction of the cost. In particular to design a selective fault mitigation strategy for processor-based systems, it is mandatory to identify and prioritize the most vulnerable registers in the register file as best candidates to be protected (hardened). This paper presents an application-based metric to estimate the criticality of each register from the microprocessor register file in microprocessor-based systems. The proposed metric relies on the combination of three different criteria based on common features of executed applications. The applicability and accuracy of our proposal have been evaluated in a set of applications running in different microprocessors. Results show a significant improvement in accuracy compared to previous approaches and regardless of the underlying architecture.
      PubDate: 2015-02-20
       
  • Analog Circuit Fault Diagnosis via Sensitivity Computation
    • Abstract: Abstract In this paper, we present a new recursive method to compute higher order sensitivities of node voltages, as well as those of circuit performances (gain, input and output impedances, or reflection coefficients) with respect to all circuit parameters. Using the sensitivity coefficients we formulate multivariate polynomial equations. Fault identification is obtained by solving these equations with respect to element deviations. This task can be accomplished by using a multivariable Newton–Raphson procedure (mNR) for solving nonlinear multivariable equations.
      PubDate: 2015-02-19
       
  • A Power Efficient BIST TPG Method on Don’t Care Bit Based 2-D
           Adjusting and Hamming Distance Based 2-D Reordering
    • Abstract: Abstract A power efficient BIST TPG method is proposed to reduce test power dissipation during scan testing. Before the test patterns are injected into scan chain, the test set adopts a series of preprocessed strategies including don’t care bit based 2-D adjusting, Hamming Distance based 2-D reordering and test cube matrix based two transpose, all steps will be orderly executed in interspersed way. The six largest ISCAS’89 benchmark circuits verify the proposed method. Experimental results show that the switching activities are effectively reduced when the test set is loaded for on-chip scan testing. ASDFR with MT-filling scheme ensures high compression ratio, the scan-in test power dissipation is further decreased by don’t care bit based 2-D adjusting and Hamming Distance 2-D reordering. In addition, the BIST TPG method with less test application time and smaller algorithm complexity can be widely applied to actual chip design without adding extra decoder area overhead.
      PubDate: 2015-02-17
       
  • Editorial
    • PubDate: 2015-02-05
       
  • New Editors – 2015
    • PubDate: 2015-02-04
       
  • On-Wafer Calibration Technique for High Frequency Measurement with
           Simultaneous Voltage and Current Tuning
    • Abstract: Abstract This paper presents a novel on wafer calibration method for the measurement of radio RF passive components with R&S vector network analyzer (VNA) at RF and mm-wave frequency. This method has employed the high frequency structure simulator (HFSS) results along with multi-level optimizations to get the nominal values used for on wafer calibration. Multiline (Thru-reflect-line) TRL calibration standards fabricated on the same substrate are used with better accuracy. Measured results show that a thru line provides less than 0.015 dB insertion loss throughout the frequency range of 1GHz-67GHz. This result is much better compared to the results achieved by conventional Short-open-load-thru (SOLT) calibration and (Thru-reflect-line) TRL calibration using the available calibration substrates. Using this calibration technique, the phase variation of the thru line shows less than 3° at 67GHz which is much lower than 15° achieved by the conventional calibration methods. The measurement of the multi band characteristics of the RF passive components by simultaneous current and voltage application has also been demonstrated successfully.
      PubDate: 2015-02-01
       
  • Improving Semiconductor Reliability with Advanced Engineering Methods in
           Test Program Development
    • Abstract: Abstract Advancing semiconductor technology in combination with new assembly and packaging technologies are unfolding a new level of challenges for production testing. Reliability of semiconductors should be ensured by applying dedicated techniques within production testing addressing various aging aspects such as: device wear-out related degradation or reduced operational voltage headroom. Thus, test program quality is emerging as a major concern, as it is directly translating into microelectronics reliability and devices quality. With the heightened sensitivity of semiconductor technology to smallest deviations in test methods from the allowed operational range, the risk of accidentally degrading the integrated circuits reliability increases significant. In this paper we propose an approach that addresses the demand for improving semiconductor technology reliability production tests quality. The presented industry usage based case studies, in combination with described techniques, provide a set of valuable practical guidelines.
      PubDate: 2015-02-01
       
  • 2014 JETTA Reviewers
    • PubDate: 2015-02-01
       
  • Test Technology Newsletter
    • PubDate: 2015-01-30
       
  • Low Cost Sparse Multiband Signal Characterization Using Asynchronous
           Multi-Rate Sampling: Algorithms and Hardware
    • Abstract: Abstract Characterizing the spectrum of sparse wideband signals of high-speed devices efficiently and precisely is critical in high-speed test instrumentation design. Recently proposed sub-Nyquist rate sampling systems have the potential to significantly reduce the cost and complexity of sparse spectrum characterization; however, due to imperfections and variations in hardware design, numerous implementation and calibration issues have risen and need to be solved for robust and stable signal acquisition. In this paper, we propose a low-cost and low-complexity hardware architecture and associated asynchronous multi-rate sub-Nyquist rate sampling based algorithms for sparse spectrum characterization. The proposed scheme can be implemented with a single ADC or with multiple ADCs as in multi-channel or band-interleaved sensing architectures. Compared to other sub-Nyquist rate sampling methods, the proposed hardware scheme can achieve wideband sparse spectrum characterization with minimum cost and calibration effort. A hardware prototype built using off-the-shelf components is used to demonstrate the feasibility of the proposed approach.
      PubDate: 2015-01-30
       
  • A New Test Point Selection Method for Analog Circuit
    • Abstract: Abstract A new method to select an optimum test point set in analog fault diagnosis is proposed in this paper. As the probability density of the circuit output approximately satisfies the normal distribution, an accurate way for determining the fault ambiguity gap is used to calculate the isolation probability of the faults. The proposed fault-pair isolation table derived from the mean and standard deviation values of node voltage can exactly represent the fault-pair isolation capability of the test points. The special test points that can uniquely isolate some particular fault pairs are selected first. This step can help to save the total cost of the computation time and even find the final solution directly. After removing the isolated fault pairs (rows) and the selected test points (columns), the size of the fault-pair isolation table could reduce dramatically. If more optimum test points are needed, the normalized fault-pair isolation probability values in the table are used to select the right test point that has the largest fault-pair isolation capability among all the candidate test points. Analog circuits’ examples and the statistical experiments are given to demonstrate the feasibility and effectiveness of the proposed algorithm. The other reported algorithms are also used to do the comparison. The results indicate that the proposed algorithm has excellent performance in minimizing the size of the test point set. Therefore, it is a good solution and applicable to actual circuits and engineering practice.
      PubDate: 2015-01-22
       
  • Harzard-Based ATPG for Improving Delay Test Quality
    • Abstract: Abstract Fault coverage is a popular test criterion in delay testing. In order to improve test coverage, an efficient automatic test pattern generation (ATPG) method especially aimed at hazard-based detection condition (HDC), referred to as HDC test generation, is proposed. The proposed method effectively enhances the testability of the faults which are undetectable under conventional detection conditions (CDC) but may fail the circuit in some special function operations. The necessity and feasibility of the hazard-based detection condition is analyzed. Using the improved traditional stuck-at fault test generation tool, we have implemented an efficient HDC test generation for transition delay fault. Experimental results on ISCAS’89 benchmark circuits demonstrate that the proposed HDC test generation can improve the fault converage by an average of 3.64 % for conventional LOS test and an average of 4.6 % for conventional LOC test.
      PubDate: 2015-01-11
       
  • Erratum to: A Small Chip Area Stochastic Calibration for TDC Using Ring
           Oscillator
    • PubDate: 2014-12-23
       
  • Pattern Generation for Understanding Timing Sensitivity to Power Supply
           Noise
    • Abstract: Abstract Timing prediction has become more and more difficult with shrinking technology nodes. Combining the pre-silicon delay model with post-silicon timing measurements has the potential to improve the accuracy of timing analysis. In this work, we address the problem of automatic test pattern generation for understanding circuit timing sensitivity to power supply noise (PSN) during post-silicon validation. Long paths are selected from a pseudo functional test set to span the power delivery network. To determine the sensitivity of timing to on-chip noise, the patterns are intelligently filled to achieve the desired PSN level. Our previous PSN control scheme is enhanced to consider both spatial and temporal information for better correlation with functional PSN. These patterns can be used to understand timing sensitivity in post-silicon validation by repeatedly applying the path delay test while sweeping the PSN experienced by the path from low to high.
      PubDate: 2014-12-20
       
  • Compressive Sampling Coupled OFDM Technique for Testing Continuous Wave
           Radar
    • Abstract: Abstract Testing continuous wave (CW) radar circuitry is a challenging and time consuming process that requires characterizing system response over a wide range of frequencies. Step frequency continuous wave (SFCW) functional test is widely adopted for CW radar through a large number of frequency tones generation and characterization. For an ultra-wideband radar system, SFCW testing can be very time consuming. In this paper, we propose a new approach to increase test speed at low cost and low design overhead by combining OFDM (Orthogonal Frequency Division Multiplexing) in conjunction with compressive sampling (CS) algorithm. In the test, OFDM is applied for multi-tone signal generation while compressive sampling is for frequency tone reduction. To show equivalent test performance, SFCW test and OFDM-CS test are both performed to characterize a sample ground penetrating radar (GPR). Simulation results are presented for validations.
      PubDate: 2014-12-19
       
  • Pseudo Functional Path Delay Test through Embedded Memories
    • Abstract: Abstract Memory arrays cannot be as easily tested as other storage elements. They can be considered as non-scan cells. Memory built-in self-test (MBIST), functional test, and macro test are used to test memory arrays. However, these methods do not focus on the interaction between memory and surrounding logic, so may not cover timing critical paths. In this paper, we propose path delay test through memory arrays using pseudo functional test with K Longest Paths Per Gate (PKLPG). Long paths captured into a non-scan cell (including a memory cell) are propagated to a scan cell or primary output, and non-scan cells are initialized so that they can launch transitions onto long paths. This allows scan tests to cover critical paths into and out of memory arrays.
      PubDate: 2014-12-18
       
  • 2013 JETTA-TTTC Best Paper Award
    • PubDate: 2014-11-29
       
 
 
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