for Journals by Title or ISSN
for Articles by Keywords
help
  Subjects -> ENGINEERING (Total: 2235 journals)
    - CHEMICAL ENGINEERING (188 journals)
    - CIVIL ENGINEERING (178 journals)
    - ELECTRICAL ENGINEERING (102 journals)
    - ENGINEERING (1194 journals)
    - ENGINEERING MECHANICS AND MATERIALS (374 journals)
    - HYDRAULIC ENGINEERING (54 journals)
    - INDUSTRIAL ENGINEERING (60 journals)
    - MECHANICAL ENGINEERING (85 journals)

ENGINEERING (1194 journals)            First | 2 3 4 5 6 7 8 9 | Last

International Journal of Environmental Engineering     Hybrid Journal   (Followers: 5)
International Journal of Experimental Design and Process Optimisation     Hybrid Journal   (Followers: 4)
International Journal of Fatigue     Hybrid Journal   (Followers: 35)
International Journal of Flow Control     Full-text available via subscription   (Followers: 4)
International Journal of Foresight and Innovation Policy     Hybrid Journal   (Followers: 8)
International Journal of Fracture     Hybrid Journal   (Followers: 9)
International Journal of Geotechnical Engineering     Full-text available via subscription   (Followers: 5)
International Journal of Grid and Utility Computing     Hybrid Journal   (Followers: 1)
International Journal of Heat and Fluid Flow     Hybrid Journal   (Followers: 24)
International Journal of Heat and Mass Transfer     Hybrid Journal   (Followers: 112)
International Journal of Heavy Vehicle Systems     Hybrid Journal   (Followers: 8)
International Journal of Hypersonics     Full-text available via subscription   (Followers: 4)
International Journal of Imaging Systems and Technology     Hybrid Journal   (Followers: 1)
International Journal of Impact Engineering     Hybrid Journal   (Followers: 9)
International Journal of Information Acquisition     Hybrid Journal   (Followers: 1)
International Journal of Innovation and Applied Studies     Open Access   (Followers: 5)
International Journal of Innovation Science     Full-text available via subscription   (Followers: 8)
International Journal of Innovative Technology and Research     Open Access   (Followers: 1)
International Journal of Integrated Engineering     Open Access  
International Journal of Intelligent Engineering Informatics     Hybrid Journal  
International Journal of Intelligent Systems and Applications in Engineering     Open Access  
International Journal of Lifecycle Performance Engineering     Hybrid Journal   (Followers: 1)
International Journal of Machine Tools and Manufacture     Hybrid Journal   (Followers: 6)
International Journal of Manufacturing Research     Hybrid Journal   (Followers: 6)
International Journal of Manufacturing Technology and Management     Hybrid Journal   (Followers: 8)
International Journal of Materials and Product Technology     Hybrid Journal   (Followers: 3)
International Journal of Mathematical Education in Science and Technology     Hybrid Journal   (Followers: 8)
International Journal of Mathematics in Operational Research     Hybrid Journal   (Followers: 1)
International Journal of Medical Engineering and Informatics     Hybrid Journal   (Followers: 5)
International Journal of Micro Air Vehicles     Full-text available via subscription   (Followers: 5)
International Journal of Microwave and Wireless Technologies     Hybrid Journal   (Followers: 1)
International Journal of Microwave Science and Technology     Open Access   (Followers: 4)
International Journal of Mobile Network Design and Innovation     Hybrid Journal   (Followers: 2)
International Journal of Multiphase Flow     Hybrid Journal   (Followers: 4)
International Journal of Nanomanufacturing     Hybrid Journal  
International Journal of Nanoscience     Hybrid Journal  
International Journal of Nanotechnology     Hybrid Journal   (Followers: 6)
International Journal of Nanotechnology and Molecular Computation     Full-text available via subscription   (Followers: 3)
International Journal of Navigation and Observation     Open Access   (Followers: 13)
International Journal of Network Management     Hybrid Journal  
International Journal of Nonlinear Sciences and Numerical Simulation     Hybrid Journal  
International Journal of Numerical Methods for Heat & Fluid Flow     Hybrid Journal   (Followers: 8)
International Journal of Optics     Open Access   (Followers: 1)
International Journal of Organisational Design and Engineering     Hybrid Journal   (Followers: 6)
International Journal of Pattern Recognition and Artificial Intelligence     Hybrid Journal   (Followers: 7)
International Journal of Pavement Engineering     Hybrid Journal   (Followers: 3)
International Journal of Physical Modelling in Geotechnics     Hybrid Journal   (Followers: 3)
International Journal of Plasticity     Hybrid Journal   (Followers: 6)
International Journal of Plastics Technology     Hybrid Journal   (Followers: 1)
International Journal of Polymer Analysis and Characterization     Hybrid Journal   (Followers: 6)
International Journal of Polymer Science     Open Access   (Followers: 21)
International Journal of Precision Engineering and Manufacturing     Hybrid Journal   (Followers: 6)
International Journal of Precision Engineering and Manufacturing-Green Technology     Hybrid Journal  
International Journal of Precision Technology     Hybrid Journal  
International Journal of Pressure Vessels and Piping     Hybrid Journal   (Followers: 4)
International Journal of Production Economics     Hybrid Journal   (Followers: 14)
International Journal of Quality and Innovation     Hybrid Journal   (Followers: 5)
International Journal of Quality Assurance in Engineering and Technology Education     Full-text available via subscription   (Followers: 2)
International Journal of Quality Engineering and Technology     Hybrid Journal   (Followers: 2)
International Journal of Quantum Information     Hybrid Journal  
International Journal of Rapid Manufacturing     Hybrid Journal   (Followers: 4)
International Journal of Reliability, Quality and Safety Engineering     Hybrid Journal   (Followers: 9)
International Journal of Renewable Energy Technology     Hybrid Journal   (Followers: 10)
International Journal of Robust and Nonlinear Control     Hybrid Journal   (Followers: 3)
International Journal of Science Engineering and Advance Technology     Open Access  
International Journal of Sediment Research     Full-text available via subscription   (Followers: 2)
International Journal of Self-Propagating High-Temperature Synthesis     Hybrid Journal   (Followers: 2)
International Journal of Signal and Imaging Systems Engineering     Hybrid Journal  
International Journal of Six Sigma and Competitive Advantage     Hybrid Journal  
International Journal of Social Robotics     Hybrid Journal   (Followers: 2)
International Journal of Software Engineering and Knowledge Engineering     Hybrid Journal   (Followers: 2)
International Journal of Space Science and Engineering     Hybrid Journal   (Followers: 2)
International Journal of Speech Technology     Hybrid Journal   (Followers: 6)
International Journal of Spray and Combustion Dynamics     Full-text available via subscription   (Followers: 7)
International Journal of Surface Engineering and Interdisciplinary Materials Science     Full-text available via subscription   (Followers: 2)
International Journal of Surface Science and Engineering     Hybrid Journal   (Followers: 8)
International Journal of Sustainable Engineering     Hybrid Journal   (Followers: 7)
International Journal of Sustainable Manufacturing     Hybrid Journal   (Followers: 5)
International Journal of Systems and Service-Oriented Engineering     Full-text available via subscription  
International Journal of Systems Assurance Engineering and Management     Hybrid Journal  
International Journal of Systems, Control and Communications     Hybrid Journal   (Followers: 2)
International Journal of Technoethics     Full-text available via subscription   (Followers: 1)
International Journal of Technology Management and Sustainable Development     Hybrid Journal   (Followers: 1)
International Journal of Technology Policy and Law     Hybrid Journal   (Followers: 6)
International Journal of Telemedicine and Applications     Open Access   (Followers: 2)
International Journal of Thermal Sciences     Hybrid Journal   (Followers: 8)
International Journal of Thermodynamics     Open Access   (Followers: 4)
International Journal of Turbo & Jet-Engines     Hybrid Journal   (Followers: 2)
International Journal of Ultra Wideband Communications and Systems     Hybrid Journal  
International Journal of Vehicle Autonomous Systems     Hybrid Journal   (Followers: 1)
International Journal of Vehicle Design     Hybrid Journal   (Followers: 8)
International Journal of Vehicle Information and Communication Systems     Hybrid Journal   (Followers: 2)
International Journal of Vehicle Noise and Vibration     Hybrid Journal   (Followers: 3)
International Journal of Vehicle Safety     Hybrid Journal   (Followers: 5)
International Journal of Vehicular Technology     Open Access   (Followers: 5)
International Journal of Virtual Technology and Multimedia     Hybrid Journal   (Followers: 3)
International Journal of Wavelets, Multiresolution and Information Processing     Hybrid Journal  
International Journal on Artificial Intelligence Tools     Hybrid Journal   (Followers: 5)
International Nano Letters     Open Access   (Followers: 6)
International Review of Applied Sciences     Open Access  

  First | 2 3 4 5 6 7 8 9 | Last

Journal Cover Journal of Electronic Testing
  [SJR: 0.241]   [H-I: 24]   [1 followers]  Follow
    
   Hybrid Journal Hybrid journal (It can contain Open Access articles)
   ISSN (Print) 1573-0727 - ISSN (Online) 0923-8174
   Published by Springer-Verlag Homepage  [2279 journals]
  • 2015 JETTA Reviewers
    • PubDate: 2016-01-29
       
  • A CMOS Ripple Detector for Voltage Regulator Testing
    • Abstract: Abstract This paper presents an RMS based ripple sensor for testing of fully integrated voltage regulators. A DC signal which is proportional to the input ripple amplitude is generated. Final digital pass/fail signal is obtained with a clocked comparator. The sensor can detect a peak-to-peak ripple voltage of up to 50 millivolts on the 1.2 V supply rail and has 220 MHz bandwidth. The sensor is designed using IBM 90 nm CMOS technology and its functionality is verified in Cadence Virtuoso simulation environment.
      PubDate: 2016-01-28
       
  • New Editors – 2016
    • PubDate: 2016-01-27
       
  • Test Scheduling for Network-on-Chip Using XY-Direction Connected Subgraph
           Partition and Multiple Test Clocks
    • Abstract: Abstract It is attractive to reuse the on-chip functional interconnects as test access mechanism (TAM) in network-on-chip (NoC) system testing. However, in the methodology of NoC-reuse as TAM, the influence factors in NoC testing significantly increased. To further reduce test time and show significant gains over other work, we propose XY-direction connected subgraph partition (XYCSP) approach to eliminate the path conflicts before testing, and concurrently determine the position of test access points. We then present a multiple test clock strategy to bridge the gap between the NoC channel bandwidth and the core test wrapper bandwidth. With the help of adaptive probability gate quantum-inspired evolutionary algorithm (APGQEA) strategy, which blends adaptive strategy and multi-nary oriented techniques, the proposed NoC test scheduling algorithm permits quick exploration and exploitation of the solution space. Moreover, power constraints are also taken into account. Experimental results for the ITC’02 benchmarks show that the proposed scheme can achieve shorter test time compared to prior works.
      PubDate: 2016-01-20
       
  • A Power Efficient Test Data Compression Method for SoC using Alternating
           Statistical Run-Length Coding
    • Abstract: Abstract A power efficient System-on-a-Chip test data compression method using alternating statistical run-length coding is proposed. To effectively reduce test power dissipation, the test set is firstly preprocessed by 2D reordering scheme. To further improve the compression ratio, 4 m partitioning of the runs and a smart filling of the don’t care bits provide the nice results, and alternating statistical run-length coding scheme is developed to encode the preprocessed test set. In addition, a simple decoder is obtained which consumed a little area overhead. The benchmark circuits verify the proposed power efficient coding method well. Experimental results show it obtains a high compression ratio, low scan-in test power dissipation and little extra area overhead during System-on-a-Chip scan testing.
      PubDate: 2016-01-19
       
  • Test Technology Newsletter
    • PubDate: 2016-01-16
       
  • Practical Analog Circuit Diagnosis Based on Fault Features with Minimum
           Ambiguities
    • Abstract: Abstract As numerous faults exist in practical analog circuits, new challenges arise in the field of diagnosis with large-scale target faults as well as fault features. To address this issue, firstly, an ambiguity model is built to measure the distinguishability between two faults. Then, the optimal fault features are obtained by analyzing the response curves of the circuit under test (CUT) to minimize the ambiguities among the faults. Finally, comparisons are made among three classification methods, including the maximum likelihood classifier (MLC), artificial neural networks (ANNs) and support vector machine (SVM), to demonstrate their own diagnostic abilities for practical use. Two examples are illustrated, and taking advantage of an automated implementation framework, 92 faults in total are examined in the second example. The experimental results show that good diagnostic performances can be obtained with the proposed method. However, when a practical case is encountered, the ANNs method may fail due to its high time and space complexity, while the MLC and SVM methods are still applicable.
      PubDate: 2016-01-14
       
  • Simulation-based Fault Injection with QEMU for Speeding-up Dependability
           Analysis of Embedded Software
    • Abstract: Simulation-based fault injection (SFI) represents a valuable solution for early analysis of software dependability and fault tolerance properties before the physical prototype of the target platform is available. Some SFI approaches base the fault injection strategy on cycle-accurate models implemented by means of Hardware Description Languages (HDLs). However, cycle-accurate simulation has revealed to be too time-consuming when the objective is to emulate the effect of soft errors on complex microprocessors. To overcome this issue, SFI solutions based on virtual prototypes of the target platform have started to be proposed. However, current approaches still present some drawbacks, like, for example, they work only for specific CPU architectures, or they require code instrumentation, or they have a different target (i.e., design errors instead of dependability analysis). To address these disadvantages, this paper presents an efficient fault injection approach based on QEMU, one of the most efficient and popular instruction-accurate emulator for several microprocessor architectures. As main goal, the proposed approach represents a non intrusive technique for simulating hardware faults affecting CPU behaviours. Permanent and transient/intermittent hardware fault models have been abstracted without losing quality for software dependability analysis. The approach minimizes the impact of the fault injection procedure in the emulator performance by preserving the original dynamic binary translation mechanism of QEMU. Experimental results for both x86 and ARM processors proving the efficiency and effectiveness of the proposed approach are presented.
      PubDate: 2016-01-09
       
  • Layout-based Single Event Mitigation Techniques for Dynamic Logic Circuits
    • Abstract: Abstract Due to the intrinsic lack of restoring paths, dynamic logic circuits have significant single-event susceptibility, and thus, they are not preferred in applications requiring high reliability when compared to static logic. However, in high speed applications, this circuit family is still very attractive. This papers presents two layout-based single-event resilient dynamic logic designs. The resultant SET pulse is suppressed because of charge-sharing in the layout-level. Simulation results verify that they enjoy higher single event tolerance. Experimental results validate the fact that approximately 20 ~ 30 % of magnitude reduction in cross-section is achieved in both designs. On the other hand, the increase in single-event performance is achieved at the expense of power and area overheads of 10 and 15 %, respectively, using our layout style in 130 nm CMOS bulk technology.
      PubDate: 2015-12-29
       
  • A Built-in Single Event Upsets Detector for Sequential Cells
    • Abstract: Abstract A built-in single event upsets (SEUs) detector is presented in this paper. This detector utilizes charge sharing to detect an SEU in a sequential cell, and the detection process is analyzed through Accuro simulations in a 65 nm technology. The normal operation of this detector would not induce obvious performance degradation of the target circuit. Through using this detector, error correction can be achieved based on dual modular redundancy (DMR) while the related power is about 20.4 % lower than that induced by triple modular redundancy (TMR).
      PubDate: 2015-12-22
       
  • SSB Phase Noise Evaluation of Analog/IF Signals on Standard Digital ATE
    • Abstract: Abstract This paper presents a low-cost solution for the evaluation of frequency-domain phase noise characteristics for analog/IF signals. The technique is based on 1-bit signal acquisition with a standard digital channel of an Automated Test Equipment (ATE) and a dedicated post-processing algorithm that permits to reconstruct the time-domain phase fluctuations of the analog/RF signal from the captured binary vector. Single SideBand (SSB) phase noise is then obtained based on FFT applied on the reconstructed phase fluctuations. Simulation results demonstrate a very good agreement between SSB phase noise obtained using the proposed digital method and the conventional analog method on a large range of measurement frequency offset. The digital method also permits spur detection and exhibits similar performance than the conventional method in terms of measurement variability. The technique is also validated through hardware measurements on a practical case study, i.e. SSB phase noise evaluation on the 1.3125 MHz sinusoidal signal delivered by the transceiver of a JN5168 wireless microcontroller.
      PubDate: 2015-12-17
       
  • Erratum to: Speeding Up Logic Locking via Fault Emulation and Dynamic
           Multiple Fault Injection
    • PubDate: 2015-12-15
       
  • Design and Implementation of an FPGA-Based Data/Timing Formatter
    • Abstract: Abstract The data/timing formatter is a key module in automatic electronics test equipment; it formats the test data to the desired wave shape and places the timing edges at the designated locations. In this work, we investigate the design and implementation of the FPGA-based data/timing formatter. Compared to its ASIC counterpart, the FPGA-based formatter is more flexible because it can be reconfigured to best fit the target test specifications. However, routing uncertainty and limited types of available logic and interconnect resources also pose great challenges. This work proposes a formatter design that is suitable for FPGA implementation. Several high-linearity FPGA-based programmable delay lines are developed. According to its characteristics, each type of delay lines is assigned a different role in the formatter. The formatter is also equipped with a calibration unit to further improve the edge placement resolution and accuracy. A 100-Msps FPGA-based data/timing formatter with 20-ps edge placement resolution has been implemented on an FPGA development board to validate our ideas.
      PubDate: 2015-12-03
       
  • Editorial
    • PubDate: 2015-12-03
       
  • Spot Defect Diagnosis in Analog Nonlinear Circuits with Possible Multiple
           Operating Points
    • Abstract: Abstract The paper is focused on local spot defect diagnosis in nonlinear analog integrated circuits. The defects are simulated by finite resistors, high in the case of open and low in the case of short. A diagnostic method that allows detecting, locating, and estimating the value of the defect is developed. The method employs the simulation before test approach leading to a fault dictionary and brings a procedure for locating the defect and estimating its value, on the basis of some quantities measured during the diagnostic test. Because the nonlinear circuit under test may have multiple operating points, even if the fault-free circuit has a unique solution, building the fault dictionary requires a special approach. It is based on some families of characteristics, expressing the resistances that simulate the defects in terms of several voltages, taking into account the deviations of the fault-free parameters within their tolerance ranges. To illustrate the proposed approach two numerical examples are given.
      PubDate: 2015-11-28
       
  • Double Node Upsets Hardened Latch Circuits
    • Abstract: Abstract A radiation hardened by design (RHBD) latch and its temporally hardened version to tolerate double node upsets are proposed in this paper. C-Elements are used to construct structures for fault correction. The temporally hardened version can further tolerate some single-event transients (SETs) at input port and clock line. Compared with Quintuple Modular Redundancy (QMR), the proposed non-temporally and temporally hardened latches are more area and power efficient with improved propagation delays. Compared with several previously reported temporally hardened latches, the proposed temporally hardened latch may introduce lower performance loss induced as setup time increase. Several multi-node upset tolerant latches are also compared with these two designs in terms of area, power, and delay. A cell level soft error analysis (TFIT) shows that the upset threshold LETs of the proposed latches in 180 nm process are higher than 16 MeV-cm2/mg.
      PubDate: 2015-11-17
       
  • Simulation and Experimental Evaluation of a Soft Error Tolerant Layout for
           SRAM 6T Bitcell in 65nm Technology
    • Abstract: Abstract In this paper, a new layout for SRAM 6T bitcell is presented. The new layout is a simple modification over the traditional 6T layout, but it has demonstrated better soft error tolerance over the traditional layout in radiation experiments. The area of the new layout is 31 % larger than the traditional layout. In TCAD simulation, it demonstrates over 2× smaller error cross section than the traditional layout. In alpha particle and proton experiments, its soft error rate can be reduced up to 73 % compared to the traditional layout.
      PubDate: 2015-11-14
       
  • 2014 JETTA-TTTC Best Paper Award
    • PubDate: 2015-11-13
       
  • Test Technology Newsletter
    • PubDate: 2015-11-06
       
  • Speeding Up Logic Locking via Fault Emulation and Dynamic Multiple Fault
           Injection
    • Abstract: Abstract Today’s Integrated Circuit (IC) industry is suffering from piracy, overbuild ICs, and hardware Trojans. One way to protect ICs is logic locking. Logic locking is done by inserting extra logic to the original design’s netlist such that correct outputs are produced only when the correct key is applied. However, the determination of locations to insert logic is a computationally expensive process. In this paper, we propose a fault emulation technique to speed up the process of determination of fault locations. Our fault emulation technique enables dynamic multiple fault injection as well as real-time fault impact computation in a single FPGA configuration. The effectiveness of the proposed emulation technique is evaluated with ISCAS’89 sequential benchmark circuits and results are presented.
      PubDate: 2015-10-31
       
 
 
JournalTOCs
School of Mathematical and Computer Sciences
Heriot-Watt University
Edinburgh, EH14 4AS, UK
Email: journaltocs@hw.ac.uk
Tel: +00 44 (0)131 4513762
Fax: +00 44 (0)131 4513327
 
About JournalTOCs
API
Help
News (blog, publications)
JournalTOCs on Twitter   JournalTOCs on Facebook

JournalTOCs © 2009-2015