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Publisher: STM Journals   (Total: 67 journals)   [Sort by number of followers]

Showing 1 - 67 of 67 Journals sorted alphabetically
Current Trends in Information Technology     Full-text available via subscription   (Followers: 3)
Current Trends in Signal Processing     Full-text available via subscription   (Followers: 5)
Emerging Trends in Chemical Engineering     Full-text available via subscription   (Followers: 4)
J. of Advancements in Library Sciences     Open Access   (Followers: 44)
J. of Aerospace Engineering & Technology     Full-text available via subscription   (Followers: 13)
J. of Alternate Energy Sources & Technologies     Full-text available via subscription   (Followers: 1)
J. of AYUSH :- Ayurveda, Yoga, Unani, Siddha and Homeopathy     Full-text available via subscription   (Followers: 9)
J. of Catalyst & Catalysis     Full-text available via subscription   (Followers: 3)
J. of Communication Engineering & Systems     Full-text available via subscription   (Followers: 1)
J. of Computer Technology & Applications     Full-text available via subscription  
J. of Construction Engineering, Technology & Management     Full-text available via subscription   (Followers: 4)
J. of Control & Instrumentation     Full-text available via subscription   (Followers: 13)
J. of Electronic Design Technology     Full-text available via subscription   (Followers: 6, SJR: 0.1, CiteScore: 0)
J. of Energy, Environment & Carbon Credits     Full-text available via subscription   (Followers: 2)
J. of Experimental & Applied Mechanics     Full-text available via subscription   (Followers: 2)
J. of Geotechnical Engineering     Full-text available via subscription   (Followers: 3)
J. of Herbal Science     Full-text available via subscription   (Followers: 4)
J. of Industrial Safety Engineering     Full-text available via subscription   (Followers: 6)
J. of Instrumentation Technology & Innovations     Full-text available via subscription  
J. of Materials & Metallurgical Engineering     Full-text available via subscription   (Followers: 2)
J. of Modern Chemistry & Chemical Technology     Open Access   (Followers: 3)
J. of NanoScience, NanoEngineering & Applications     Full-text available via subscription  
J. of Network Security     Full-text available via subscription   (Followers: 2)
J. of Nuclear Engineering & Technology     Full-text available via subscription   (Followers: 2)
J. of Nursing Science & Practice     Full-text available via subscription   (Followers: 2)
J. of Offshore Structure and Technology     Full-text available via subscription   (SJR: 0.1, CiteScore: 0)
J. of Petroleum Engineering & Technology     Full-text available via subscription   (Followers: 3)
J. of Polymer & Composites     Full-text available via subscription   (Followers: 16)
J. of Power Electronics & Power Systems     Full-text available via subscription   (Followers: 11, SJR: 0.284, CiteScore: 1)
J. of Production Research & Management     Full-text available via subscription   (Followers: 2)
J. of Remote Sensing & GIS     Full-text available via subscription   (Followers: 23)
J. of Thin Films, Coating Science Technology and Application     Full-text available via subscription  
J. of VLSI Design Tools & Technology     Full-text available via subscription   (Followers: 9)
J. of Water Resource Engineering and Management     Full-text available via subscription   (Followers: 3)
OmniScience : A Multi-disciplinary J.     Full-text available via subscription   (Followers: 2)
Recent Trends In Civil Engineering & Technology     Full-text available via subscription   (Followers: 5)
Research & Reviews : A J. of Bioinformatics     Full-text available via subscription   (Followers: 3)
Research & Reviews : A J. of Dentistry     Full-text available via subscription   (Followers: 1)
Research & Reviews : A J. of Drug Design & Discovery     Full-text available via subscription  
Research & Reviews : A J. of Health Professions     Full-text available via subscription  
Research & Reviews : A J. of Immunology     Full-text available via subscription   (Followers: 6)
Research & Reviews : A J. of Life Sciences     Open Access  
Research & Reviews : A J. of Medicine     Full-text available via subscription   (Followers: 2)
Research & Reviews : A J. of Microbiology & Virology     Full-text available via subscription   (Followers: 6)
Research & Reviews : A J. of Neuroscience     Full-text available via subscription   (Followers: 2)
Research & Reviews : A J. of Pharmaceutical Science     Full-text available via subscription   (Followers: 1)
Research & Reviews : A J. of Pharmacognosy     Full-text available via subscription  
Research & Reviews : A J. of Pharmacology     Full-text available via subscription   (Followers: 1)
Research & Reviews : A J. of Toxicology     Full-text available via subscription   (Followers: 4)
Research & Reviews : J. of Agricultural Science and Technology     Full-text available via subscription  
Research & Reviews : J. of Agriculture Science and Technology     Full-text available via subscription   (Followers: 2)
Research & Reviews : J. of Botany     Full-text available via subscription   (Followers: 1)
Research & Reviews : J. of Crop Science and Technology     Full-text available via subscription   (Followers: 4)
Research & Reviews : J. of Dairy Science and Technology     Open Access   (Followers: 3)
Research & Reviews : J. of Ecology     Full-text available via subscription   (Followers: 2)
Research & Reviews : J. of Embedded System & Applications     Full-text available via subscription   (Followers: 5)
Research & Reviews : J. of Food Science and Technology     Open Access  
Research & Reviews : J. of Medical Science and Technology     Full-text available via subscription   (Followers: 2)
Research & Reviews : J. of Oncology and Hematology     Full-text available via subscription   (Followers: 3)
Research & Reviews : J. of Physics     Open Access   (Followers: 2)
Research & Reviews : J. of Space Science & Technology     Full-text available via subscription   (Followers: 10)
Research & Reviews : J. of Statistics     Open Access   (Followers: 6)
Research & Reviews : J. of Surgery     Full-text available via subscription   (Followers: 1)
Research & Reviews : J. of Veterinary Science and Technology     Open Access   (Followers: 1)
Trends in Electrical Engineering     Full-text available via subscription   (Followers: 4)
Trends in Mechanical Engineering & Technology     Full-text available via subscription   (Followers: 3)
Trends in Opto-Electro & Optical Communications     Full-text available via subscription   (Followers: 1)
Journal Cover
Journal of VLSI Design Tools & Technology
Number of Followers: 9  
 
  Full-text available via subscription Subscription journal
ISSN (Print) 2321-6492 - ISSN (Online) 2249-474X
Published by STM Journals Homepage  [67 journals]
  • Circular Retiming technique to design Optimized Least Mean square
           architecture for adaptive filter
    • Authors: Jalaja S., Vijaya Prakash A. M
      Pages: 1 - 9
      Abstract: Circular retiming improves performance and power consumption of the Least Mean Square (LMS) adaptive filter. It is implemented for weight updated block and error computational block to minimize the adaptive filter error without violating the functional equivalence output. Here, filter multiplication block is updated in a circular convolution format and is retimed to reduce the dynamic power consumption. Additional retime flip-flops shows better performance result compared with the existing state-of-the-art research architecture. This retiming adaptive filter architecture improves the system performance of the design. Using 90 nm technology, node power analysis is done for 8-bit input sample with different tap lengths. Synthesis results show that the retimed adaptive filter mechanism achieves an average of 82.9 and 82.6% less power consumption for the input sample of 8 and 16-bit respectively compared to existing result. The physical design for 16-bit input data with 24 tap length, LMS filter architecture is implemented using 45 nm CMOS technology. Effectiveness of retime version of LMS model experimental result shows better performance in terms power consumption.
      Keywords: Retiming least mean square, circular retiming technique, optimized powerCite this Article
      Jalaja S, Vijaya Prakash AM. Circular Retiming Technique to Design Optimized Least Mean Square Architecture for Adaptive Filter. Journal of VLSI Design Tools & Technology. 2018; 8(3): 1–9p.

      PubDate: 2018-12-03
      Issue No: Vol. 8, No. 3 (2018)
       
  • An Area Delay Optimized Carry-Select Adder
    • Authors: Sareeka Tulshiram Deore
      Pages: 10 - 14
      Abstract: In arithmetic and logic unit of digital signal processor (DSP), adder is the important hardware unit. Carry select adder (CSLA) is the best example of the adder used in DSP and it is widely used in many data processors to increase speed. So, the adder performance affects the overall system-performance. The Regular Square root (SQRT) CSLA consists of two Ripple Carry Adders (RCA), so it consumes more area due to the presence of two Ripple Carry Adders (RCA) in the structure. To minimize the area of Regular SQRT CSLA, one of the RCAs was replaced by a Binary to Excess-1 Converter (BEC) with slight increase in delay. Many such techniques have provided to design variety of SQRT CSLAs by using Common Boolean Logic (CBL), First Addition Logic (FAL), Add-one circuit, Modified Reduced Logic Block (MRLB) etc. to achieve low area, delay and power. This work proposes a new design comprising of Carry generation (CG) and Carry Select (CS) to reduce the area as compared to the Regular SQRT CSLA and Modified SQRT CSLA using BEC. The proposed design is synthesized and simulated in Xilinx ISE design suite 14.2 and is implemented on Spartan 3E XC3S1600E-5-FG484 FPGA device. The comparison shows how the proposed SQRT CSLA is better than the existing regular SQRT CSLA and SQRT CSLA using BEC. The speed of proposed model is also enhanced for higher number of bits than the SQRT CSLA.
      Keywords: CSLA, BEC, FPGA, SQRT, CBLCite this ArticleSareeka Deore. An Area Delay Optimized Carry-Select Adder. Journal of VLSI Design Tools & Technology. 2018; 8(3): 10–14p.
      PubDate: 2018-12-03
      Issue No: Vol. 8, No. 3 (2018)
       
  • Design, Verification and Circuit Level Implementation of a Ballistic
           MOSFET
    • Authors: Arun Kumar Chatterjee, B. Prasad
      Pages: 15 - 22
      Abstract: A drain current expression is obtained for a nanoscale ballistic MOSFET within the framework of Landauer-Buttiker formalism considering intrinsic silicon channel at low temperature. The model drain current is compared with the numerical simulations of near ballistic nanoMOSFET structure. There is a reasonable agreement between the model and the numerical simulation results. This demonstrates the remarkably low value of the subthreshold slope of ballistic nanoMOSFET. Further, the design structure is incorporated in an inverter circuit which works well verifying its functionality in the integrated circuits.
      Keywords: Ballistic MOSFET, charge density, triangular potential well, wave function, drain currentCite this Article
      Arun Kumar Chatterjee, Prasad B. Design, Verification and Circuit Level Implementation of a Ballistic MOSFET. Journal of VLSI Design Tools & Technology. 2018; 8(3): 15–22p.

      PubDate: 2018-12-03
      Issue No: Vol. 8, No. 3 (2018)
       
  • Performance Analysis of CMOS and FinFET Based SRAM
    • Authors: Jeny Elsa Joji, Sreekala K. S., Dhanusha P. B.
      Pages: 23 - 27
      Abstract: As CMOS devices are scaled to nanometer regime, the consequences such as short channel effects and variations in the process parameters are increased which affects the reliability and performance of the circuit. In order to over these issues, FinFET can be used as a suitable replacement for CMOS as it is a promising and better technology without sacrificing the reliability and performance of the applications and the circuit design. In this study, comparison of performance of CMOS and FINFET based SRAM is done. This comparison study will help to select the better technology to design the circuits in future.
      Keywords: CMOS, FinFET, short channel effect, SRAM, reliabilityCite this ArticleJeny Elsa Joji, Sreekala KS, Dhanusha PB. Performance Analysis of CMOS and FinFET Based SRAM. Journal of VLSI Design Tools & Technology. 2018; 8(3): 23–27p.

      PubDate: 2018-12-03
      Issue No: Vol. 8, No. 3 (2018)
       
  • Design and Analysis of MAC Unit Using Single Precision Floating Point
           Vedic Multiplier
    • Authors: Athira A D, Anjaly Krishnan
      Pages: 28 - 35
      Abstract: Multiplication and accumulation are the basic operations which are important in several microprocessors and digital signal processing (DSP) applications to execute dedicated algorithms. Developing high speed MAC is essential for real time DSP application. The MAC unit determines the speed of the overall system and it lies in the critical path. As the demand for high speed design is continuously increasing, the studies related to the field of multipliers and adders are endless and still significant. Multiplication of floating point numbers gives high resolution and has found extensive use in DSP applications. The critical part in single precision floating point multiplication is the 24×24 bit mantissa calculation. The speed of the system can be improved by enhancing the speed of multiplication. In this study, a 24 bit Vedic multiplier has been proposed using 3×3 Vedic multiplier as its basic block. This study proposes MAC unit using modified single precision floating point Vedic multiplier using 'Urdhava-Triyakbhyam' sutra. In this work, MAC unit for DSP application using 32 bit modified single precision floating point Vedic multiplier is simulated in Xilinx ISE 14.7 using Virtex 6 FPGA. Keywords: Multiply and accumulate, Institute of Electrical and Electronics Engineers, digital signal processingCite this ArticleAthira AD, Anjaly Krishnan. Design and Analysis of MAC Unit Using Single Precision Floating Point Vedic Multiplier. Journal of VLSI Design Tools & Technology. 2018; 8(3): 28–35p.
      PubDate: 2018-12-26
      Issue No: Vol. 8, No. 3 (2018)
       
  • A Time Domain Analysis on Chip High Speed VLSI Optical Interconnection
           Network
    • Authors: Abhishek Sharma, Sudhir Kumar Sharma
      Pages: 36 - 44
      Abstract: Intrachip optical interconnects (OIs) have the potential to outperform electrical wires and to ultimately, solve the communication problem, and to obtain high-performance integrated circuits. In this study, the International Technology Roadmap for Semiconductors (ITRS) is used as a reference to fulfill the requirements of silicon-based ICs must satisfy to successfully perform copper electrical interconnects (IEs). Keywords: Integrated optoelectronic circuits, optoelectronics, optical interconnects (ICs), silicon photonicsCite this ArticleAbhishek Sharma, Sudhir Kumar Sharma. A Time Domain Analysis on Chip High Speed VLSI Optical Interconnection Network. Journal of VLSI Design Tools & Technology. 2018; 8(3): 36–44p. 
      PubDate: 2018-12-26
      Issue No: Vol. 8, No. 3 (2018)
       
  • A Dual Material Control Gate Tunnel Field Effect Transistor for an
           Asymmetric Doping at Source and Drain Regions
    • Authors: Pratiksha Kharat
      Pages: 45 - 53
      Abstract: Double-Gate tunnel FET devices, which uses high-κ gate dielectric, are explored using realistic design parameters, showing an ON-current as high as 0.23 mA, a gate voltage of 1.8 V, an OFF-current of not more than 1 fA (neglecting gate leakage), an improved ordinary subthreshold swing of 57 mV/dec, and a lower point slope of 11 mV/dec. A dual material control gate tunnel field effect transistor for an asymmetric doping at source and drain regions is suggested. The gate consists of three segments with different work functions φ1, φ2, and φ3, which are named as tunnelling gate (M1), control gate (M2), and auxiliary gate (M3), individually. The 2-D nature of tunnel FET current flow is studied, which indicates that the current is not confined to a channel at the gate-dielectric surface. When temperature is varied, tunnel FETs with a high-κ gate dielectric have a smaller threshold voltage shift than those using SiO2, while the subthreshold slope for fixed values of Vg remains nearly unchanged, in contrast with the traditional MOSFET. Moreover, an Ion/Ioff ratio of greater than 2×1011 is shown for simulated device with a gate length (over the intrinsic region) of 50 nm, which indicates that the tunnel FET is encouraging candidate to achieve better-than-ITRS low-standby-power switch activity. Keywords: Band-to-band tunneling, double gate (DG), gated p-i-n diode, high-κ dielectric, subthreshold swing, tunnel field effect transistor (FET)Cite this ArticlePratiksha Kharat. A Dual Material Control Gate Tunnel Field Effect Transistor for an Asymmetric Doping at Source and Drain Regions. Journal of VLSI Design Tools & Technology. 2018; 8(3): 45–53p.
      PubDate: 2018-12-26
      Issue No: Vol. 8, No. 3 (2018)
       
 
 
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